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User’s Guide
DS90UB95x-Q1EVM Deserializer User's Guide
Liam Keese
ABSTRACT
The Texas Instruments DS90UB95x-Q1EVM evaluation modules (EVM) are functional board designs for
evaluating the DS90UB95x-Q1 FPD-Link III and TDES954 V3Link deserializers, which convert serialized camera
data to MIPI CSI-2 for processing. The MIPI CSI-2 output has four available lanes, and can be configured for
either four-lane output or replicated two-lane output. When paired with a compatible serializer, the deserializers
receive data from imager(s) supporting cameras as well as satellite RADAR. The DS90UB954-Q1 also supports
DS90UB913A/933 serializers.
Some variants are single channel; for these variants ignore references to RX1. Some references are made to
serializer backward compatibility; refer to the product datasheet for serializer compatibility.
The DS90UB954-Q1EVM is configured for communication with DS90UB953-Q1 and TSER953 on channel
0 (RX0), and DS90UB933-Q1 on channel 1 (RX1). The EVM has two Rosenberger FAKRA connectors and
configurable Power-over-Coax (PoC) voltage for connecting the camera modules (not included). FPD-Link III
and V3Link interfaces also include a separate low latency bidirectional control channel that conveys control
information from an I2C port. General purpose I/O signals, such as those required for camera synchronization
and functional safety features, also make use of this bidirectional control channel to program registers in the
DS90UB954-Q1 and TDES954, as well as the connected serializer and any remote I2C connected devices.
There is an onboard MSP430 which functions as a USB2ANY bridge for interfacing with a PC for evaluation. The
USB2ANY interfaces with the Analog LaunchPAD GUI tool.
Table of Contents
1 Trademarks..............................................................................................................................................................................4
2 Introduction.............................................................................................................................................................................4
3 Quick Start Guide....................................................................................................................................................................5
3.1 System Requirements........................................................................................................................................................5
3.1.1 Included Components..................................................................................................................................................5
3.1.2 Additional Required Components................................................................................................................................5
3.2 Applications Diagram......................................................................................................................................................... 5
3.3 Major Components of DS90UB95x-Q1EVM...................................................................................................................... 5
3.4 DS90UB95x-Q1EVM Setup............................................................................................................................................... 6
4 DS90UB95x-Q1EVM Board Configuration............................................................................................................................6
4.1 Default Configuration......................................................................................................................................................... 6
4.2 Power Supply..................................................................................................................................................................... 7
4.3 Power-over-Coax Interface................................................................................................................................................ 7
4.4 MIPI CSI-2 Output Signals................................................................................................................................................. 8
4.5 FPD-Link III Signals......................................................................................................................................................... 10
4.6 I2C Interface..................................................................................................................................................................... 10
4.7 Control Interface............................................................................................................................................................... 11
5 Enable and Reset..................................................................................................................................................................12
6 Use with DS90UB936-Q1......................................................................................................................................................12
7 Typical Connection and Test Equipment............................................................................................................................13
8 Termination Device............................................................................................................................................................... 13
9 Typical Test Setup.................................................................................................................................................................13
10 Equipment References.......................................................................................................................................................14
11 Cable References................................................................................................................................................................14
12 Software for DS90UB95xQ1-EVM Evaluation - Analog LaunchPAD (ALP) Software Setup........................................ 15
12.1 System Requirements....................................................................................................................................................15
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Table of Contents
12.2 Download Contents........................................................................................................................................................15
12.3 Installation of the ALP Software..................................................................................................................................... 15
12.4 Startup - First Launch.....................................................................................................................................................16
13 Using ALP and DS90UB95x Profile...................................................................................................................................20
13.1 Information Tab.............................................................................................................................................................. 20
13.2 Registers Tab................................................................................................................................................................. 21
13.3 Registers Tab - Address 0x00 Expanded.......................................................................................................................22
13.3.1 Port Specific Registers............................................................................................................................................ 22
13.4 Saving and Loading Register Settings........................................................................................................................... 22
13.5 Scripting Tab.................................................................................................................................................................. 26
13.5.1 Example Functions.................................................................................................................................................. 28
13.6 GPIO Tab....................................................................................................................................................................... 30
13.7 Forwarding Tab.............................................................................................................................................................. 31
13.8 CSI Registers Tab.......................................................................................................................................................... 32
13.9 Remote Registers Tab....................................................................................................................................................33
14 Troubleshooting ALP Software......................................................................................................................................... 34
14.1 ALP Does Not Detect The EVM..................................................................................................................................... 34
14.2 USB2ANY Firmware Issues........................................................................................................................................... 35
15 DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic..................... 37
16 DS90UB95x-Q1 EVM PCB Layout..................................................................................................................................... 45
17 DS90UB95xQ1-EVM Bill of Materials................................................................................................................................ 55
18 Revision History................................................................................................................................................................. 60
List of Figures
Figure 2-1. DS90UB95x-Q1EVM.................................................................................................................................................4
Figure 3-1. Applications Diagram................................................................................................................................................ 5
Figure 3-2. Interfacing to the EVM...............................................................................................................................................5
Figure 4-1. DS90UB95x-Q1EVM with Jumpers Highlighted........................................................................................................6
Figure 4-2. Power-over-Coax Network For Use With DS90UB953............................................................................................. 7
Figure 4-3. Power-over-Coax Network For Use With DS90UB933............................................................................................. 8
Figure 9-1. Typical Test Setup for Evaluation............................................................................................................................ 13
Figure 12-1. Launching ALP Splash Screen..............................................................................................................................16
Figure 12-2. Initial ALP Screen..................................................................................................................................................16
Figure 12-3. Select USB2ANY/Aardvark Setup to Change Profile............................................................................................ 17
Figure 12-4. ALP Profiles Dialog............................................................................................................................................... 18
Figure 12-5. ALP Profiles Dialog (continued)............................................................................................................................ 19
Figure 13-1. ALP Information Tab..............................................................................................................................................20
Figure 13-2. ALP Registers Tab.................................................................................................................................................21
Figure 13-3. ALP Device ID Expanded......................................................................................................................................22
Figure 13-4. Save Register Settings Step 1.............................................................................................................................. 23
Figure 13-5. Save Register Settings Step 2.............................................................................................................................. 23
Figure 13-6. Save Register Settings Step 3.............................................................................................................................. 24
Figure 13-7. Load Register Settings Step 1...............................................................................................................................24
Figure 13-8. Load Register Settings Step 2...............................................................................................................................25
Figure 13-9. Load Register Settings Step 3...............................................................................................................................25
Figure 13-10. ALP Scripting Tab................................................................................................................................................26
Figure 13-11. Pre-Defined Scripts..............................................................................................................................................27
Figure 13-12. Custom Button Creation Step 1...........................................................................................................................27
Figure 13-13. Custom Button Creation Step 2...........................................................................................................................28
Figure 13-14. GPIO Tab.............................................................................................................................................................30
Figure 13-15. Forwarding Tab....................................................................................................................................................31
Figure 13-16. CSI Registers Tab............................................................................................................................................... 32
Figure 13-17. Remote Registers Tab.........................................................................................................................................33
Figure 14-1. ALP No Devices Error........................................................................................................................................... 34
Figure 14-2. Windows 7, ALP USB2ANY Driver........................................................................................................................34
Figure 14-3. ALP in Demo Mode............................................................................................................................................... 35
Figure 14-4. ALP Preferences Menu......................................................................................................................................... 35
Figure 14-5. USB2ANY Firmware Update Notice......................................................................................................................36
Figure 14-6. USB2ANY Firmware Update Procedure............................................................................................................... 36
Figure 15-1. DS90UB95x-Q1EVM Block Diagram.................................................................................................................... 37
Figure 15-2. DS90UB95x-Q1EVM Main Circuit - Page 1.......................................................................................................... 38
Figure 15-3. DS90UB95x-Q1EVM CSI-2 Connectors - Page 2.................................................................................................39
Figure 15-4. DS90UB95x-Q1EVM PoC Circuits - Page 3......................................................................................................... 40
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Figure 15-5. DS90UB95x-Q1EVM Power Distribution Circuits - Page 4................................................................................... 41
Figure 15-6. DS90UB95x-Q1EVM LED Circuits - Page 5......................................................................................................... 42
Figure 15-7. DS90UB95x-Q1EVM USB2ANY Circuits - Page 6............................................................................................... 43
Figure 15-8. DS90UB95x-Q1EVM Miscellaneous Hardware.................................................................................................... 44
Figure 16-1. Top View Composite..............................................................................................................................................45
Figure 16-2. Layer 1: Top Signal Layer......................................................................................................................................46
Figure 16-3. Layer 2: GND Plane 1........................................................................................................................................... 47
Figure 16-4. Layer 3: Mid Signal Layer 1...................................................................................................................................48
Figure 16-5. Layer 4: GND Plane 2........................................................................................................................................... 49
Figure 16-6. Layer 5: GND Plane 3........................................................................................................................................... 50
Figure 16-7. Layer 6: Mid Signal Layer 2...................................................................................................................................51
Figure 16-8. Layer 7: GND Plane 4........................................................................................................................................... 52
Figure 16-9. Layer 8: Bottom Signal Layer................................................................................................................................ 53
Figure 16-10. Bottom View Composite...................................................................................................................................... 54
List of Tables
Table 4-1. Power Supply..............................................................................................................................................................7
Table 4-2. Power-over-Coax Power Supply Feed Configuration................................................................................................. 8
Table 4-3. MIPI CSI-2 Output Signals - J5 and J6 Pinout............................................................................................................9
Table 4-4. FPD-Link III Signals.................................................................................................................................................. 10
Table 4-5. IDx I2C Device Address Select - J23........................................................................................................................ 10
Table 4-6. I2C Interface Header - J25........................................................................................................................................ 10
Table 4-7. VDDIO Interface Header - J16.................................................................................................................................. 11
Table 4-8. GPIO Interface Header - J22.....................................................................................................................................11
Table 4-9. CMLOUT Output Signals...........................................................................................................................................11
Table 4-10. FPD-Link III Mode Control- J15...............................................................................................................................11
Table 4-11. Device Mode Control - J11...................................................................................................................................... 11
Table 4-12. LEDs....................................................................................................................................................................... 12
Table 17-1. DS90UB95x-Q1EVM BOM..................................................................................................................................... 55
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Trademarks
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1 Trademarks
All trademarks are the property of their respective owners.
2 Introduction
Note
The demo board is not optimized for EMI testing. The demo board was designed for easy accessibility
to device pins with tap points for monitoring or applying signals, additional pads for termination, and
multiple connector options.
Figure 2-1. DS90UB95x-Q1EVM
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Quick Start Guide
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3 Quick Start Guide
3.1 System Requirements
3.1.1 Included Components
The major components of the DS90UB95x-Q1EVM are:
• DS90UB95x-Q1
• On-board Power-over-Coax (PoC) interface
• FAKRA coax connector(s) for digital video, power, control and diagnostics
• Samtec QSH type connector for CSI-2 interface
• On-board I2C programming interface
3.1.2 Additional Required Components
To demonstrate the functionality of the DS90UB95x-Q1, the following components are required (not included):
• One compatible serializer.
• One DACAR/FAKRA coax cable
• USB to mini USB cable OR I2C host controller that supports clock stretching (such as USB2ANY)
• Power supply for 12V @ 1A (current limited bench supply recommended)
• Optional: MIPI CSI-2 output analyzer or host processor
3.2 Applications Diagram
DS90UB953
Serializer
RAW 10/12
DS90UB933
Serializer
DS90UB954-Q1
Deserializer
CSI-2
Tx Port
MIPI CSI-2
3.2 Gbps
MIPI CSI-2
1.6 Gbps/lane X 4
Host / ISP
Figure 3-1. Applications Diagram
3.3 Major Components of DS90UB95x-Q1EVM
Figure 3-2. Interfacing to the EVM
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3.4 DS90UB95x-Q1EVM Setup
1. Use the mini USB to USB cable to connect J2 to computer USB port for register programming and open
Analog LaunchPAD. See Section 12 for details on installing and using Analog LaunchPAD.
2. Configure jumpers J8, J10, J11, J15, J16, J23, J27 to set device’s operating modes. The default
configuration can be seen in Figure 4-1.
3. Configure Power-over-Coax power supplies for RX0 and RX1 with J18 and J17 respectively.
4. Connect the DS90UB95x-Q1EVM to DS90UB953-Q1EVM (or variant) to RX0 and/or DS90UB933-Q1EVM
to RX1 using a coax cable.
5. Interface MIPI CSI-2 output signals (J24) to test equipment or host processor (optional, not required to check
status of FPD-Link III connection between serializer and deserializer).
6. Provide power to board. TI recommends using current limited bench supply to provide power to J1 (barrel
jack) or J3.
4 DS90UB95x-Q1EVM Board Configuration
4.1 Default Configuration
Default jumper placement shown in red. This configuration sets the device into the following mode
• Device is set for FPD-Link III inputs from coax in CSI mode (for DS90UB953-Q1EVM (or variant))
• VDDIO is set to 1.8V
• VDD5V is powered by the 5V LDO
• The 3.3V + 1.1V LDO (U10) is powered by VDD5V
• The 9V LDO for PoC for RX0 and RX1 are enabled
Figure 4-1. DS90UB95x-Q1EVM with Jumpers Highlighted
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4.2 Power Supply
Table 4-1. Power Supply
Reference
J1/J3
Signal
+12V
Description
Main Power
Single +12VDC (nominal) power connector that supplies power to
the entire board.
4.3 Power-over-Coax Interface
The DS90UB95x-Q1EVM offers two Power-over-Coax interfaces (PoC) to connect cameras through a coaxial
cable with FAKRA connectors. Power is delivered on the same conductor that is used to transmit video and
control channel data between the host and the camera. By default, 5V power supply is applied over the coax
cable. Refer to for other PoC configurations.
Note
For port RX0, the PoC network is configured for a DS90UB953-Q1EVM (or variant), and for RX1 the
PoC network is configured for a DS90UB933-Q1. Only use a serializer EVM with the correct PoC
network. To use PoC with two DS90UB953-Q1EVM (or variant) or DS90UB933-Q1 EVM's, one of the
PoC networks must be reworked. You may also open the PoC circuit and power the serializer EVM
directly from another supply.
For Power-over-Coax (PoC) on the EVM, the circuit uses a filter network as shown in Figure 4-3. The PoC
network frequency response corresponds to the bandwidth compatible with DS90UB953-Q1EVM (or variant)
chipsets.
Figure 4-2. Power-over-Coax Network For Use With DS90UB953
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Figure 4-3. Power-over-Coax Network For Use With DS90UB933
WARNING
Verify that the Power-over-Coax voltage is properly set before plugging into RX0 or RX1. Power
supply is not fused. Over-voltage will cause damage to boards directly connected due to incorrect
input power supplies. DS90UB913A-Q1EVM is designed for a maximum of 5V PoC. To use
DS90UB913A-Q1EVM with DS90UB954-Q1EVM, open J17 or J18 to disable PoC, and either
power the DS90UB913A-Q1EVM separately or by applying 5V to the J17 or J18 pin on DS90UB954Q1EVM.
Table 4-2. Power-over-Coax Power Supply Feed Configuration
Reference
Signal
Description
This sets the voltage for Power-over-Coax on RX0
J18
VPOC_RX0
Jumper installed: +9V power supply from VPOC_LDO0_9V
Jumper Open: No PoC connected. Apply power to pin1 or leave open and power serializer
separately.
This sets the voltage for Power-over-Coax on RX1
J17
VPOC_RX1
Jumper installed: +9V power supply from VPOC_LDO1_9V
Jumper Open: No PoC connected. Apply power to pin1 or leave open and power serializer
separately.
4.4 MIPI CSI-2 Output Signals
There are two options provided for passing out the deserialized data on the DS90UB95x-Q1EVM . The first
is a Samtec QSH-type connector, J24, on the top of the board that can be mated with a matching QTH type
connector. The mating connector part number for the J24 connector is QTH-020-01-H-D-DP-A. On the bottom
of the board is a Samtec QTH-type connector, J26, meant for mating with a TDAx evaluation kit. The signals
to the connectors are the same, including access to I2C and other signals including PDB and GPIO. Only one
connector should be used at a time. If the J6 connector on the bottom is to be used, populate the zero ohm
resistors on the bottom of the board which extend the traces to the J26 connector.
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There are third party solutions like the HDR-128291-XX breakout board from Samtec which can be used. The
HDR- 128291-XX is a breakout board with a mating connector to J24 or J26, providing access to each pin
through standard SMA male connectors. More info on this breakout board can be obtained from Samtec website.
Another third party option is the ZX100 by Zebax Technologies. More information on this board can be obtained
from Zebax website.
Table 4-3. MIPI CSI-2 Output Signals - J5 and J6 Pinout
Pin #
Signal Name
Pin #
Signal Name
1
NC
2
EXP_SCL
(I2C_SCL or I2C_SCL2)
3
NC
4
EXP_SDA
(I2C_SDA or
I2C_SDA2)
5
CSI_CLK0_P
6
NC
7
CSI_CLK0_N
8
NC
9
CSI_D0_P
10
EXP_REF_CLK
(REFCLK)
11
CSI_D0_N
12
GND
13
CSI_D1_P
14
RESET
(PDB)
15
CSI_D1_N
16
GND
17
CSI_D2_P
18
SPI_MOSI
(GPIO0 or GPIO3)
19
CSI_D2_N
20
SPI_SCLK
(GPIO1 or GPIO4)
21
CSI_D3_P
22
SPI_CS
(GPIO2 or GPIO5)
23
CSI_D3_N
24
GND
25
CSI_CLK1_P
26
NC
27
CS_CLK1_N
28
NC
29
NC
30
VDD_3V3
31
NC
32
VDD_3V3
33
NC
34
VDD_3V3
35
NC
36
VDD_3V3
37
NC
38
VDD_1V8
39
NC
40
VDD_1V8
Note
Populate R60-R69, R71,R72 (0Ω resistors) only when using the J26 connector on the bottom of the
board. Do not use J24 and J26 connectors at the same time.
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4.5 FPD-Link III Signals
Table 4-4. FPD-Link III Signals
Reference
Signal
Description
RX0p
RIN0+
FAKRA connector for DS90UB953-Q1EVM (or variant) serializer
RX0n
RIN0-
FAKRA connector footprint for use with STP applications.
RX1
RIN1+
FAKRA connector for DS90UB933-Q1 serializer
4.6 I2C Interface
In addition to the on-board USB2ANY controller accessible via the mini-USB port, a standalone external I2C host
can connect via J25 for programming purposes. Examples of external I2C host controllers are Texas Instruments
USB2ANY and Total Phase Aardvark I2C/SPI host adapter (Total Phase Part#: TP240141).
When the I2C interface is accessed through connector J25, I2C signal levels can be configured through J16 to
be at 1.8V or 3.3V. Optional access to I2C signals are also available via CSI-2 connectors J24 (top) and J26
(bottom).
Table 4-5. IDx I2C Device Address Select - J23
Reference
Signal
Description
Selects
J23
IDX Select
I2C
Device Address
Open: 0x30 (7'b) or 0x60 (8'b)
Short: 0x3D (7'b) or 0x7A (8'b) (Default)
Table 4-6. I2C Interface Header - J25
10
Reference
Signal
Description
J25.1
VDDIO
I2C bus voltage (tied to VDDIO)
J25.2
I2C_SCL
I2C Clock Interface for I2C bus
J25.3
I2C_SDA
I2C Data Interface for I2C bus
J25.4
GND
Ground
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4.7 Control Interface
Table 4-7. VDDIO Interface Header - J16
Reference
Signal
Description
Selects VDDIO bus voltage
J16
VDDIO
Short pins 1-2: 3.3V IO (Default)
Short pins 2-3: 1.8V IO
Table 4-8. GPIO Interface Header - J22
Reference
Signal
Description
J22.1
GPIO0
General Purpose Input/Output 0
J22.3
GPIO1
General Purpose Input/Output 1
J22.5
GPIO2
General Purpose Input/Output 2
J22.7
GPIO3/INTB
J22.9
GPIO4
General Purpose Input/Output 4
J22.11
GPIO5
General Purpose Input/Output 5
J22.13
GPIO6
General Purpose Input/Output 6
J22.15
EN 25MHz
Enable/Disable 25MHz Oscillator
General Purpose Input/Output 3 / Interrupt (Active Low).
Pulled up to VDDIO by 4.7kΩ
Table 4-9. CMLOUT Output Signals
Reference
Signal
Description
TP16
CMLOUTP
Test Pad for Channel Monitor Loop-through Driver
TP17
CMLOUTN
Test Pad for Channel Monitor Loop-through Driver
Table 4-10. FPD-Link III Mode Control- J15
(1)
(2)
Reference
Mode(1)
J15.1
1
CSI Mode (DS90UB953-Q1 compatible)(2)
J15.2
2
RAW12 / LF (DS90UB933 compatible)
J15.3
3
RAW12 / HF (DS90UB933 compatible)
J15.4
4
RAW10 (DS90UB933 compatible)
Description
Only set one ON.
This function is only available with 2-MP ADAS chipsets.
Table 4-11. Device Mode Control - J11
Reference
Signal
Input = L
Input = H
Description
J11.1
BISTEN
For Normal operation (Default)
Test Mode enable
Test Mode
J11.2
RSVD
Tied to GND (Default)
N/A
Reserved
J11.3
VDD_SEL
Internal 1.1V regulator from
1.8V supply (Default)
1.1V is supplied to VDD1V1
pins
VDD 1.1V Source Select
J11.4
PDB
Device is powered down
Device is enabled (Default)
Power-down Mode
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Table 4-12. LEDs
Reference
LED Color
LED Name
Description
D3
Red
VDDIO
Illuminates on VDDIO Power
D4
Red
VDD5V
Illuminates on +5V
D5
Red
VDD_EXT
Illuminates if 12V Power is applied to DC-IN J24
D6
Orange
VPOC_RX1
Illuminates if VPOC_RX1 is ON
D7
Orange
VPOC_RX0
Illuminates if VPOC_RX0 is ON
D8
Orange
PASS
Illuminates if PASS pin is HIGH
D9
Green
LOCK
Illuminates if LOCK pin is HIGH
D10
Green
GPIO6
Illuminates if GPIO6 is HIGH
D11
Green
GPIO5
Illuminates if GPIO5 is HIGH
D12
Green
GPIO4
Illuminates if GPIO4 is HIGH
D13
Green
GPIO3/INTB
Illuminates if GPIO3 is HIGH, or GPIO3 disabled (pulled-up)
D14
Green
GPIO2
Illuminates if GPIO2 is HIGH
D15
Green
GPIO1
Illuminates if GPIO1 is HIGH
D16
Green
GPIO0
Illuminates if GPIO0 is HIGH
5 Enable and Reset
The DS90UB95x-Q1 is enabled and reset by controlling the PDB input level. PDB has an internal pull down, and
should remain low until all supplies are stable. There are three device enable and reset/power-down options for
the EVM.
•
•
•
RC timing option: The RC delay created with C123 and R131 connected to the PDB pin is the default option
for delaying PDB on the EVM. This is used for simplicity of debugging and using the device. TI recommends
using a GPIO signal from a host process or to drive PDB after all rails have settled in customer designs.
External control option: A momentary push-button switch, SW1, is available for manually driving the PDB
signal low while the button is held.
Software control option: The PDB pin is also made available in the J24 and J26 CSI-2 output connectors,
allowing a host processor to control the PDB pin.
6 Use with DS90UB936-Q1
The DS90UB954-Q1EVM may also be used to evaluate the DS90UB936-Q1. The only modification required is
to swap the DS90UB954-Q1 with the DS90UB936-Q1.
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Typical Connection and Test Equipment
7 Typical Connection and Test Equipment
The following is a list of typical test equipment that may be used to monitor the MIPI CSI-2 signals from the
DS90UB95x-Q1:
1.
2.
3.
4.
5.
Logic Analyzer
Any SCOPE with a bandwidth of at least 4 GHz for observing differential signals.
UNH-IOL MIPI D-PHY Reference Termination Board (RTB)
UNH-IOL MIPI D-PHY/CSI/DSI Probing Board
UNH-IOL CSIGUI Tool
8 Termination Device
A termination device is required to properly monitor and measure the transmission of the MIPI DPHY signals.
The termination device should support the change of signals as it switches between LP and HS modes. This can
be provided by either a CSI-2 receiver or a dedicated dynamic termination board. The recommended termination
board is the UNH-IOL MIPI D-PHY Reference Termination Board (RTB).
9 Typical Test Setup
Figure 9-1 illustrates a typical test set up used to measure and evaluate DS90UB95x-Q1.
Figure 9-1. Typical Test Setup for Evaluation
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Equipment References
www.ti.com
10 Equipment References
Note
Please note that the following references are supplied only as a courtesy to our valued customers. It is
not intended to be an endorsement of any particular equipment or supplier.
Logic Analyzer:
Keysight Technologies
www.keysight.com
MIPI Test Fixtures:
University of New Hampshire InterOperability Laboratory (UNH-IOL)
www.iol.unh.edu/services/testing/mipi/fixtures.php
Aardvark I2C/SPI Host Adapter Part Number: TP240141
www.totalphase.com/products/aardvark_i2cspi
11 Cable References
FAKRA coaxial cable:
www.leoni-automotive-cables.com
Rosenberger FAKRA connector:
http://www.rosenberger.com/en/products/automotive/fakra.php
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Software for DS90UB95xQ1-EVM Evaluation - Analog LaunchPAD (ALP) Software Setup
12 Software for DS90UB95xQ1-EVM Evaluation - Analog LaunchPAD (ALP) Software
Setup
12.1 System Requirements
Operating System:
Windows 7 64-bit
USB:
USB2ANY (on-board, accessible via mini
USB connector)
USB2ANY Firmware Version:
2.5.2.0
USB:
Aardvark I2C/SPI host adapter
p/n TP240141
12.2 Download Contents
Latest TI Analog LaunchPAD can be downloaded from: http://www.ti.com/tool/alp.
Download and extract the zip file to a temporary location that can be deleted later.
The following installation instructions are for a PC running Windows 7 64-bit Operating System.
12.3 Installation of the ALP Software
Execute the ALP Setup Wizard program called “ALPF_setup_v_x_x_x.exe” that was extracted to a temporary
location on the local drive of your PC.
There are 7 steps to the installation once the setup wizard is started:
1.
2.
3.
4.
5.
Select the "Next" button.
Select “I accept the agreement” and then select the “Next” button.
Select the location to install the ALP software and then select the “Next” button.
Select the location for the start menu shortcut and then select the “Next” button.
There will then be a screen that allows the creation of a desktop icon. After selecting the desired choices
select the “Next” button.
6. Select the “Install” button, and the software will then be installed to the selected location.
7. Uncheck “Launch Analog LaunchPAD” and select the “Finish” button. The ALP software will start if “Launch
Analog LaunchPAD” is checked, but it will not be useful until the USB driver is installed and board is
attached.
Power the DS90UB95x-Q1 EVM board with a 12 VDC power supply.
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Software for DS90UB95xQ1-EVM Evaluation - Analog LaunchPAD (ALP) Software Setup
12.4 Startup - First Launch
Make sure all the software has been installed and the hardware is powered on and connected to the PC.
Execute “Analog LaunchPAD” shortcut from the start menu. The default start menu location is under All
Programs > Texas Instruments > Analog LaunchPAD vx.x.x > Analog LaunchPAD to start MainGUI.exe.
Figure 12-1. Launching ALP Splash Screen
Upon first launch of the Analog LaunchPAD utility, the default device will be DS90UB925. The active device can
be seen as highlighted in Figure 12-2, here showing the DS90UB95x as active. If the active device is already set
to DS90UB95x you may skip to Section 13.
Figure 12-2. Initial ALP Screen
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Software for DS90UB95xQ1-EVM Evaluation - Analog LaunchPAD (ALP) Software Setup
Follow the steps beginning with Figure 12-3 to change the ALP profile to DS90UB95x.
Figure 12-3. Select USB2ANY/Aardvark Setup to Change Profile
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Select the active profile and click "Remove". Scroll down the list of available profiles to DS90UB95x, click to
highlight it, click "Add", and click "Ok".
Figure 12-4. ALP Profiles Dialog
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Figure 12-5. ALP Profiles Dialog (continued)
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13 Using ALP and DS90UB95x Profile
13.1 Information Tab
Under the Devices tab click on “DS90UB95x” to select the device and open up the device profile and its
associated tabs. After selecting the DS90UB95x, the following screen should appear. Figure 13-1 shows the
Information tab. The information tab shown assumes active and locked connection to a DS90UB953 on RX0,
and an open port on RX1.
Figure 13-1. ALP Information Tab
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13.2 Registers Tab
The Registers tab is shown in Figure 13-2. Note that the value of the currently selected register is populated in
the "Value: " box at the top. Figure 13-2 shows the register I2C_DEVICE_ID is reading a hexadecimal value of
0x60.
Figure 13-2. ALP Registers Tab
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13.3 Registers Tab - Address 0x00 Expanded
By double clicking on the Address bar
or a single click on
expanded.
. Address 0x00 expanded reveals contents by bits. Any register address displayed can be
Figure 13-3. ALP Device ID Expanded
Any RW Type register can be written into by writing the hex value into the “Value:” box,
or putting
the pointer into the individual register bit(s) box by a left mouse click to put a check mark (indicating a “1”) or
unchecking to remove the check mark (indicating a “0”). Click the “Apply” button to write to the register, and
“refresh” to see the new value of the selected (highlighted) register.
The box toggles on every mouse click.
13.3.1 Port Specific Registers
13.3.2
Certain registers in the DS90UB95x-Q1 are port specific and have two copies, one for each FPD-Link RX port.
The "Select RX Port" drop-down menu controls which port's registers are read. If the "Write All RX Ports" box
is checked, both ports' registers will be written to. If it is not checked, only the port indicated by the drop-down
menu will be written to. These controls set the value of register 0x4C, which is used to set which port is being
read and which port(s) are being written to.
13.4 Saving and Loading Register Settings
Register settings can be saved and later loaded to the device using the "Save" and "Load" buttons. To save,
click on the "Save" button, select the file location, and name the file. If desired, comments may be recorded
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about the register settings . After the registers are saved, a dialog box will appear confirming that the registers
were saved successfully. To load saved registers, click the "Load" button and select the .nrd file. Additional
information about the register settings, including any comments, will be displayed in the dialog box. After
confirming these are the desired registers settings, a message will appear confirming that the registers were
successfully loaded.
1
2
Figure 13-4. Save Register Settings Step 1
3
Figure 13-5. Save Register Settings Step 2
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4
Figure 13-6. Save Register Settings Step 3
1
2
Figure 13-7. Load Register Settings Step 1
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3
Figure 13-8. Load Register Settings Step 2
4
Figure 13-9. Load Register Settings Step 3
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13.5 Scripting Tab
Figure 13-10 shows the Scripting tab. The script window provides a full Python scripting environment which can
be for running scripts and interacting with the device in an interactive or automated fashion. Commands may be
written directly into the Scripting tab or may be run from a .py file using the "Run" button. Example scripts may
be found using the "Run PreDef Script" button.
Figure 13-10. ALP Scripting Tab
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Figure 13-11. Pre-Defined Scripts
It is also possible to create custom buttons on the Scripting tab to run a desired script. To do so, click on the
"Setup" button, then say "Add", and select the desired name and script. To make the button appear in future
instances of ALP, click the "Set As Default" button.
1
3
4
2
5
Figure 13-12. Custom Button Creation Step 1
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7
6
Figure 13-13. Custom Button Creation Step 2
WARNING
Directly interacting with devices either through register modifications or calling device support library
functions can effect the performance and/or functionality of the user interface and may even crash
the ALP Framework application.
13.5.1 Example Functions
The following are Python functions commonly used to interact with FPD-Link devices.
13.5.1.1 Local I2C Reads/Writes
These functions will perform reads and writes only for the I2C assigned to board.devAddr, which by default will
be the detected address for the DS90UB95x-Q1.
board.ReadReg(Register
Address , # of Bytes)
OR board.ReadReg(Register
Address)
I2C Read Command
board.WriteReg(Register
Address , Data)
I2C Write Command
•
•
•
•
•
Accepts both hex & decimal inputs
Number of bytes will default to 1 if omitted
Ex: board.ReadReg(0x00) will return the value in Register 0 for the local
device
Accepts both hex & decimal inputs
Ex: board.WriteReg(0x01, 0x01) will set Register 0 to have a value of 1
board.devAddr = [I2C Address] Assigns I2C address to be used for board.ReadReg and board.WriteReg
commands
•
•
28
Accepts both hex & decimal inputs
Uses the 8-bit form of the I2C address
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•
•
Can be used to shorten read/write commands
Ex: board.devAddress = 0x60 sets the board address to 0x60
13.5.1.2 General I2C Reads/Writes:
These I2C commands will work for any I2C address on the local bus and remote devices configured in the slave
ID and slave alias registers of the device. The 8-bit form of I2C addresses should be used.
board.ReadI2C(Device Address, I2C Read Command
Register Address , # of Bytes) OR
• Accepts both hex & decimal inputs
board.ReadI2C(Device Address,
• Number of bytes will default to 1 if omitted
Register Address)
• Ex: board.ReadI2C(0x60, 0x00) will return the value in Register 0 for
the device with address 0x60 (8-bit form)
board.WriteI2C(Device Address,
Register Address , Data)
I2C Write Command
•
•
Accepts both hex & decimal inputs
Ex: board.WriteI2C(0x60, 0x01, 0x01) will set Register 1 of the device
with address 0x60 (8-bit form) to have a value of 1
13.5.1.3 I2C Reads/Writes with Multi-Byte Register Addresses
These I2C commands will work for any I2C address on the local bus and remote devices configured in the slave
ID and slave alias registers of the device. The 8-bit form of I2C addresses should be used.
board.ReadI2C(Device Address,
Register Address Byte 2,[Register
Address Byte 1, # of Bytes])
OR board.ReadI2C(Device Address,
Register Address Byte 2, [Register
Address Byte 1])
I2C Read Command for devices with multi-byte register addresses
board.WriteI2C(Device Address,
Register Address Byte 2, [Register
Address Byte 1, Data])
I2C Write Command for devices with multi-byte register addresses
•
•
•
•
•
•
Accepts both hex & decimal inputs
Number of bytes will default to 1 if omitted
Ex: board.ReadI2C(0x60, 0x30, [0x00]) will return the value in
Register 0x3000 for the device with address 0x60 (8-bit form)
Accepts both hex & decimal inputs
Number of bytes will default to 1 if omitted
• Ex: board.WriteI2C(0x60, 0x30, [0x01, 0x01]) will set Register
0x3000 of the device with address 0x60 (8-bit form) to have a
value of 1
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13.6 GPIO Tab
Figure 13-14 shows the GPIO tab. This tab may be used to configure the DS90UB95x-Q1 GPIO pins, including
the configuration of back channel GPIOs, and FrameSync generation.
Figure 13-14. GPIO Tab
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13.7 Forwarding Tab
Figure 13-15 shows the Forwarding tab. This tab may be used to configure the forwarding of CSI-2 data.
Figure 13-15. Forwarding Tab
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13.8 CSI Registers Tab
Figure 13-16 shows the CSI Registers tab. This tab operates in the same way as the Registers tab, but holds the
indirect access registers used to configure pattern generation.
Figure 13-16. CSI Registers Tab
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13.9 Remote Registers Tab
Figure 13-17 shows the Remote Registers tab. This tab may be used to read and write to the registers of the
partner serializer. The RX Port selection drop-down controls which serializer is communicated with, the serializer
connect to Port 0 or the serializer connected to Port 1.
Figure 13-17. Remote Registers Tab
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Troubleshooting ALP Software
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14 Troubleshooting ALP Software
14.1 ALP Does Not Detect The EVM
If the following window opens after starting the ALP software, double check the hardware setup.
Figure 14-1. ALP No Devices Error
It may also be that the USB2ANY driver is not installed. Check the device manager. There should be a
“HID-compliant device” under the “Human Interface Devices” as shown in Figure 14-2.
Figure 14-2. Windows 7, ALP USB2ANY Driver
The software should start with only “DS90UB95x” in the “Devices” pull down menu. If there are more devices
then the software is most likely in demo mode. When the ALP is operating in demo mode there is a “(Demo
Mode)” indication in the lower left of the application status bar as shown in Figure 14-3.
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Troubleshooting ALP Software
Figure 14-3. ALP in Demo Mode
Disable the demo mode by selecting the “Preferences” pull down menu and un-checking “Enable Demo Mode”.
Figure 14-4. ALP Preferences Menu
After demo mode is disabled, the ALP software will poll the ALP hardware. The ALP software will update and
have only “DS90UB95x” under the “Devices” pull down menu.
14.2 USB2ANY Firmware Issues
If upon plugging in the board to the PC, the user is presented with a message stating USB2ANY firmware is
out of date or is 0.0.0.0, similar to Figure 14-5, try unplugging the USB cable and plugging it in again (holding
S1 while plugging in the USB cable puts the USB2ANY into firmware update mode). If that does not solve
the problem you will have to re-flash the on-board USB2ANY firmware. To re-flash the USB2ANY, download
USB2ANY Explorer and install the application. Launch the USB2ANY Firmware Loader available at "C:\Program
Files (x86)\TI USB2ANY SDK\bin\USB2ANY Firmware Loader.exe" and follow the instructions to flash the latest
version of USB2ANY firmware. The firmware loading screen is shown in Figure 14-6.
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Troubleshooting ALP Software
Figure 14-5. USB2ANY Firmware Update Notice
Figure 14-6. USB2ANY Firmware Update Procedure
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DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
15 DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
Re vision History
1.1V
Re v
ECN #
Approve d Da te
Approve d by
Note s
N/A
N/A
N/A
N/A
N/A
(Optiona l)
1.8V
P OC
P owe r
3.3V
VDDIO
VS S
I2C
RX0
EXT CONN
CS I
RX1
25 MHz EXT OS C
DS 90UB954-Q1
GP IOn
MODE
LEDs
GP IO
IDX
INTB
P DB
P owe r
VDD_S EL
S tra p Re s is tors / J umpe rs
Copyright © 2017, Texas Instruments Incorporated
Figure 15-1. DS90UB95x-Q1EVM Block Diagram
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DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
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DS90UB954 Configuration
De fa ult is 1.8V. On-boa rd le ve l shifte r (pa ge 7) to conve rt loca l
3.3V logic from on-boa rd US B2ANY to 1.8V logic
VDDIO Se lect
3.3V or 1.8V
VDD1V8
L6
120 ohm
VDD3V3
C92
C82
C71
C80
10µF
1µF
0.1µF
0.01µF
C93
22µF
VDD1V8
VDDIO
C29
22µF
J16
1
2
3
L4
120 ohm C46
GND
L7
C66
1µF
C45
C65
0.1µF 0.01µF
C62
22µF
0.01µF
C67
22µF
U5
120 ohm
C57
C59
10µF
C63
1µF
C64
C54
0.1µF 0.01µF
22µF
7
29
VDDIO
VDDIO
CS I_CLK0+
CS I_CLK0-
12
11
45
36
VDD18_P 0
VDD18_P 1
CS I_CLK1+
CS I_CLK1-
19
18
VDD1V8_CS I
17
VDD18_CS I
VDD1V8_FP D
14
13
40
31
CS I_D0+
CS I_D0-
VDD_18_FP D0
VDD_18_FP D1
C53
22µF
GND
VDD1V8_P
GND
L8
120 ohm
C88
10µF
C73
C78
1µF
0.1µF
C68
0.01µF
C87
C86
VDD1V1_D
22µF
22µF
3
VDD1V1_CS I
20
VDD1V1_FP D0
34
GND
VDD1V1
VDD1V1_FP D1
R88
L3
120 ohm
C41
22µF
C81
22µF
43
0
VDD_S EL
VDD_S EL: This page; Config P ins
bottom right
P a ge 5 P ower; 1.1V LDO EN pin
C79
C72
C77
0.1µF
4.7µF
0.01µF
RIN0_P
RIN0_N
VDDIO
R37
L5
120 ohm
C49
22µF
C48
22µF
GND
0
C47
C61
C60
0.1µF
4.7µF
0.01µF
GND
R27
GND
120 ohm
C34
22µF
C40
22µF
C33
C43
C44
0.1µF
4.7µF
0.01µF
GND
L2
120 ohm
0
C35
R28
R53
4.7k
I2C_S CL
I2C_S DA
GP IO4
GP IO5
GP IO6
R52
4.7k
0
C42
C36
C37
22µF
0.1µF
4.7µF
0.01µF
VDD11_FP D0
22
21
CS I_D3+
CS I_D3-
24
23
IDX
VDD_S EL
RIN0+
RIN0-
32
33
RIN1+
RIN1GP IO_0
GP IO_1
GP IO_2
GP IO_3/INTB
GP IO_4
GP IO_5
GP IO_6
35
LOCK
P AS S
48
47
MODE
P DB
37
30
CMLOUT+
CMLOUT-
38
39
BIS TEN
TES T_EN
XIN/REFCLK
XOUT
I2C_S CL
I2C_S DA
P AD
CS I_D0_P
CS I_D0_N
16
15
CS I_D2+
CS I_D2-
VDD11_FP D1
CS I_CLK1_P
CS I_CLK1_N
CS I_D1_P
CS I_D1_N
CS I_D2_P
CS I_D2_N
CS I_D3_P
CS I_D3_N
IDX
LOCK
P AS S
MODE
P DB
TP 16
P DB
CMLOUT_P
CMLOUT_N
C38
TP 17
C39
6
BIS TEN
44
RS VD
5 XIN/REFCLK
XOUT
4
R24
100
0.033µF
0.033µF
XIN/REFCLK
XOUT
49
DS90UB954TRGZRQ1
J25
4
3
2
1
C32
VDD1P 1_CS I
41
42
2
1
VDDIO
VDD11_D
46
28
27
26
25
10
9
8
GP IO3/INTB
C51
0.1µF
L1
RIN1_P
RIN1_N
GP IO0
GP IO1
GP IO2
R36
4.7k
VDDIO
VDD_S EL
CS I_D1+
CS I_D1-
CS I_CLK0_P
CS I_CLK0_N
GND
R55
R54
0
0
GND
22µF
GND
10.0k
C55
12pF
BIS TEN
Y2
C75
0.1µF
C74
0.01µF
R87
10k
EN_25MHz
1
VDD
OUT
S TANDBY
GND
R85
3
J21
2
1
25 MHz
S e e pa ge 6
0
XIN/REFCLK
R31
50
IDx S e le ction
R114
10k
2
IDX
C50
0.1µF
R49
10.0k
7
5
3
1
RAW10 (933) - Coax
RAW12 High-Freq (933) - Coax
RAW12 Low-Freq (933) - Coax
CSI (953) - Coax
R119
78.7k
R117
95.3k
R115
0
33.2k
RC De la y on
P DB P in
J15
R121
97.6k
8
6
4
P DB 2
R131
MODE
8
6
4
2
R48
0
GND
1
R116
25.5k
GND
Y1
25MHz
C58
12pF
R79
R118
39.2k
J23
1
2
GND
R120
78.7k
VDD1V8
2
3
4
5
R75
0
R74
Config P ins
VDD1V8
REF CLOCK
4
XIN/REFCLK
VDDIO
MODE S e le ction
VDD1V8
DO NOT POPULATE CRYSTAL
J11
C123
10µF
H1
GND
GND
J34 OPEN: I2C Address = 0x30 (7'b)
J34 INSTALLED: I2C Address = 0x3D (7'b)
1
R125
R16 10k
10k R25
VDD_S EL
10k
GND
Mome nta ry
P DB S witch
DESERIALIZER EMI/EMC SHIELD
10.0k
RS VD
S W1
C106
0.1µF
GND
R78
0
XOUT
7
5
3
1
GND
GND
GND
Copyright © 2017, Texas Instruments Incorporated
GND
Figure 15-2. DS90UB95x-Q1EVM Main Circuit - Page 1
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DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
MIPI CSI-2 Output Connectors
CSI-2 CONNECTION
P la ce re s is tors clos e to de vice
CS I_CLK0_P
CS I_CLK0_N
CS I_D0_P
CS I_D0_N
CS I_D1_P
CS I_D1_N
CS I_D2_P
CS I_D2_N
CS I_D3_P
CS I_D3_N
CS I_CLK1_P
CS I_CLK1_N
R34
R33
0
0
TOP _CLK0_P
TOP _CLK0_N
J24
1
3
2
4
5
7
6
8
EXT_S CL
EXT_S DA
R46
R47
0
0
TOP _D0_P
TOP _D0_N
9
11
10
12
R44
R45
0
0
TOP _D1_P
TOP _D1_N
13
15
14
16
RES ET
R40
R41
0
0
TOP _D2_P
TOP _D2_N
17
19
18
20
EXT_GP IO0
EXT_GP IO1
R38
R39
0
0
TOP _D3_P
TOP _D3_N
21
23
22
24
EXT_GP IO2
R42
R43
0
0
TOP _CLK1_P
TOP _CLK1_N
25
27
26
28
29
31
30
32
33
35
34
36
37
39
38
40
MP 1
MP 3
EXT_REF_CLK
Top Side Connector
0
XIN/REFCLK
R86
EXT_REF_CLK
GND
R57
EXT_S CL
R30
0
EXT_S DA
R29
0
RES ET
R32
0
EXT_GP IO0
R130
0
EXT_GP IO1
R82
0
EXT_GP IO2
R35
0
I2C_S CL
I2C_S DA
EXT_VDD_3V3
0
R56
EXT_VDD_1V8
0
MP 2
MP 4
GND
P DB
GP IO0
GP IO1
CSI-2 CONNECTION
J26
1
3
2
4
R71
R72
0 0201 BOT_CLK0_P
0 0201 BOT_CLK0_N
5
7
6
8
R60
R61
0 0201 BOT_D0_P
0 0201 BOT_D0_N
9
11
10
12
R62
R63
0 0201 BOT_D1_P
0 0201 BOT_D1_N
13
15
14
16
RES ET
R64
R65
0 0201 BOT_D2_P
0 0201 BOT_D2_N
17
19
18
20
EXT_GP IO0
EXT_GP IO1
R66
R67
0 0201 BOT_D3_P
0 0201 BOT_D3_N
21
23
22
24
EXT_GP IO2
R68
R69
0 0201 BOT_CLK1_P
0 0201 BOT_CLK1_N
25
27
26
28
29
31
30
32
33
35
34
36
37
39
38
40
MP 1
MP 3
GP IO2
EXT_S CL
EXT_S DA
EXT_REF_CLK
GND
R50
0
R51
0
EXT_VDD_3V3
EXT_VDD_1V8
MP 2
MP 4
GND
Bottom Side Connector
Copyright © 2017, Texas Instruments Incorporated
Figure 15-3. DS90UB95x-Q1EVM CSI-2 Connectors - Page 2
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DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
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Power over Coax (POC)
VPOC_RX0
L11
L10
10µH
100µH
L13
R83
R84
C85
0.1µF
C89
10µF
C90
0.1µF
VPOC_LDO0_9V
GND
L17
47 ohm
J29
1
C91
10µF
0
GND
C83
J18
3
4
RIN0_P
0.033µF
2
3
4
5
L12
Configure d for ope ra tion with a
DS 90UB953-Q1.
RX0p
RIN0_N
49.9
1
RX0 ca n be powere d by 9VLDO0 by ins talling jumper or
an alaternate source by opening jumper and attaching a
source to pin 1
C84
2
1
R90
J30
VPOC_RX0
2
1
4.02k
L14
330 ohm
1000 ohm
0.015µF
R95
2
3
4
5
0
RX0n
GND
TP 12
L19
L18
10µH
100µH
VPOC_RX1
L20
L15
R100
R108
4.02k
4.02k
1000 ohm
C98
0.1µF
C97
10µF
C96
0.1µF
C95
10µF
L16
GND
1500 ohm
J31
VPOC_LDO1_9V
VPOC_RX1
2
1
1500 ohm
GND
J17
C70
1
RIN1_P
RX1 ca n be powere d by 9VLDO1 by ins talling jumper or
an alaternate source by opening jumper and attaching a
source to pin 1
2
3
4
5
0.1µF
RX1
GND
R96
49.9
Configure d for ope ra tion with a
DS 90UB933-Q1.
C76
RIN1_N
0.047µF
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 15-4. DS90UB95x-Q1EVM PoC Circuits - Page 3
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DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
Power Distribution
3.3V @ 1A Linear Regulator
1.8V @ 1A Linear Regulator
U10B
VDD5V
12V
External Supply
TP 3
2
4
6
8
1
3
5
7
5
6
VP OC_LDO1_EN
VP OC_LDO0_EN
C15
4.7µF
C17
0.1µF
1
2
C19
4.7µF
GND
VDD_EXT
5-146261-1
3
2
T1
C127
22µF
C128
0.1µF
C129
2.2µF
R11
0
R12
0
TP S 767D318P WP
GND
TP 10
100k
TP 9
VDD3V3
R126
0
C22
0.1µF
TP 6
3
2
1
EXT_VDD_1V8
16
19
20
21
25
26
27
1
100k
R124
1
29
3
9
EP
1GND
2GND
1EN
2EN
R133
J6
C16
10µF
NC
NC
NC
NC
NC
NC
NC
J12
C20
10µF
3
2
1
EXT_VDD_3V3
GND
GND
J28
5-146261-1
J9
4.7µH
C23
C26
1
2
VDD5V
10pF
1µF
R14
R93
124k
22.1k
GND
VCC
2
VREG5
3
S W2
SS
4
S W1
GND
12
VBS T
11
10
C109
4.7µF
C118
1µF
R113
C116
0.1µF
0
1
TP S 54225P WP R VFB
VIN
C122
5V_SW
100k
VDD_S EL
P GND2
PG
6
8
P GND1
EN
7
5
EN
4
7
5
9
IN
IN
C105
4.7µF
C110
10µF
C113
0.1µF
C107
47µF
U9
1
2
PG
FB
OUT
OUT
9
10
EP
GND
11
6
BIAS
SS
R122
0
C120
C117
0.1µF
C114
10µF
R128 GND
4.99k
C119
C115
0.01µF
1µF
R15
GND
100k
9V @ 1A Linear Regulator for PoC RX0
P AD
C24
3300pF
C25
1µF
VDD_EXT
TP 15
15
VPOC_LDO0_9V
VDD_EXT
R13
3.24k
C27
1
3
5
7
10µF
GND
GND
R102
GND
C100
1µF
10.0k
VP OC_LDO0_EN
2
4
6
8
R21
3.24k
J8
5V @ 1A
Linear Regulator
R22
0
U6
3
LM2941LD/NOP B
R26
5
IN
OUT
1
ON/OFF
ADJ
8
4
6
NC
NC
GND
GND
7
2
DAP
R132
10.0k
R127
1.87k
J14
1
2
1µF
TP S 74801TDRCRQ1
GND
TP 7
TP 8
3
8
C31
1µF
R23
34.0k
R99
5.6k
0
C69
22µF
GND
GND
9V @ 1A Linear Regulator for PoC RX1
9
GND
C30
1µF
VDD_EXT
Select 5V Supply
for VDD5V
TP 14
5V_LDO
R106
C1030
1µF
3
GND
LM2941 ON/OFF pin is active low, s o is ntall jumper to tie the
ON/OFF pin to ground and enable the device .
LM2941LD/NOP B
IN
OUT
1
ON/OFF
4
6
NC
NC
ADJ
C28
8 1µF
GND
GND
7
2
VPOC_LDO1_9V
5V_LDO
VDD5V
1
2
3
R17
5
5V_SW
R111
10.0k
VP OC_LDO1_EN
R112
3.24k
0
R18
29.4k
VDD5V
DAP
R19
3.24k
U7
R107
10.0k
9
R20
10.0k
J10
TP 13
VDD_EXT
GND
C94
22µF
C104
1µF
TP 11 J13
1
2
GND
C112
1µF
R109
0
U8
LM2941LD/NOP B
3
IN
OUT
5
1
ON/OFF
ADJ
8
4
6
NC
NC
GND
GND
7
2
DAP
13
VO
VDD1V1
R123
TS W-103-07-G-S
U4
14
3
2
1
R103
C101
1µF
R105
34.0k
R110
5.6k
9
C124
1µF
0.1µF
28
22
0
GND
EXT_VDD_3V3
L21
GND
1RES ET
2RES ET
R129
C18
0.1µF
NC
NC
NC
NC
NC
NC
NC
1.1V @ 1.5A Linear Regulator
5V @ 2A
Switching Regulator
C125
0.1µF
2OUT
2OUT
17
18
TPS767D318PWP
TP 5
GND
C121
0.1µF
4
10
GND
4
1
3
2
23
24
2IN
2IN
C21
0.1µF
D17
40V
F1
1
1OUT
1OUT
1IN
1IN
11
12
J27
TP 1
J1
VDD1V8
U10A
J3
1
2
7
8
13
14
15
TP 4
0
C99
22µF
C102
1µF
C108
100µF
GND
GND
GND
GND
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 15-5. DS90UB95x-Q1EVM Power Distribution Circuits - Page 4
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LED Indicators and GPIO Header
GPIO LEDs
GPIO3/INTB LED
Input P owe r LEDs
P owe r ove r Coa x LEDs
D16
GP IO4
GP IO5
GP IO6
R77
R80
2
1
1
2
R97
2.4k
Q1
VPOC_RX1
D3
S upe r Re d
D4
S upe r Re d
D6
Ora nge
D7
Ora nge
GP IO3/INTB
R98
2.4k
R101
220
R104
220
R94
470
R92
470
R76
100k
Gre e n
D10
220
VPOC_RX0
2
2
1
2
D5
S upe r Re d
R73
470
Gre e n
D11
220
R81
1
Gre e n
D12
220
VDDIO
1
2
220
VDD5V
1
R70
VDD_EXT
D13
Gre e n
1
Gre e n
D14
2
220
2
Gre e n
D15
2
1
R59
VDD3V3
1
GP IO2
220
1
3
GP IO1
2
2
GP IO0
R58
GND
GND
GND
GND
GND
1
GND
Gre e n
LOCK / PAS S LEDs
D9
LOCK
P AS S
GPIO He a de r
R89
220
R91
220
Ora nge
D8
2
J22
1
Gre e n
GND
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
LOCK
P AS S
GP IO0
GP IO1
GP IO2
GP IO3/INTB
GP IO4
GP IO5
GP IO6
EN_25MHz
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 15-6. DS90UB95x-Q1EVM LED Circuits - Page 5
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DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
On-Board USB2ANY
US B P ORT
US B-TO-3.3V REGULATOR
NOTE: NO P OWER DIS TRIBUTION S WITCH NEEDED FOR EXT 3.3V S UP P LY
J2
1
2
3
4
5
VBUS
R135
33
33
1
2
R3
3
33k
VCC
6
IO2
IO4
5
GND
IO3
IO1
4
R2
8
P UR
1µF
VUS B
C1
220pF
IN
OUT
EN
NR
NC
NC
NC
GND
P AD
1
C6
2.2µF
3
C2
0.01µF
4
9
GND
GND
7.5V
GND
GND
2
6
7
C5
D2
4
3
BSL
5
60 ohm
C7
22µF
S1
1
2
FB1
VBUS
GND
R4
1.2M
GND
TP 2
U2
C8
220pF
DP
1.5k
GND
U2A_3V3
DM
R134
C3
0.1µF
U1
V18
GND
TP S 73533DRBR
GND
GND
GND
GND
U11
C13
0.1µF
GND
GP IO10/VEREF-
P 3.0/UCB0S IMO/UCB0S DA
P 3.1/UCB0S OMI/UCB0S CL
P 3.2/UCB0CLK/UCA0S TE
P 3.3/UCA0TXD/UCA0S IMO
P 3.4/UCA0RXD/UCA0S OMI
P 3.5/TB0.5
P 3.6/TB0.6
P 3.7/TB0OUTH/S VMOUT
9
10
69
70
12
13
55
56
P 5.0/A8/VREF+/VEREF+
P 5.1/A9/VREF-/VEREFP 5.2/XT2IN
P 5.3/XT2OUT
P 5.4/XIN
P 5.5/XOUT
P 5.6/TB0.0
P 5.7/TB0.1
5
6
7
8
57
58
59
60
P 7.0/CB8/A12
P 7.1/CB9/A13
P 7.2/CB10/A14
P 7.3/CB11/A15
P 7.4/TB0.2
P 7.5/TB0.3
P 7.6/TB0.4
P 7.7/TB0CLK/MCLK
30pF
2
C10
1
Y3
C9
R7
0
24MHz
30pF
GND
V18
C126
0.47µF
VBUS
VUS B
U2A_3V3
GND
67
20
V18
VCORE
29
30
31
32
33
34
35
36
P 4.0/P M_UCB1S TE/P M_UCA1CLK
P 4.1/P M_UCB1S IMO/P M_UCB1S DA
P 4.2/P M_UCB1S OMI/P M_UCB1S CL
P 4.3/P M_UCB1CLK/P M_UCA1S TE
P 4.4/P M_UCA1TXD/P M_UCA1S IMO
P 4.5/P M_UCA1RXD/P M_UCA1S OMI
P 4.6/P M_NONE
P 4.7/P M_NONE
45
46
47
48
51
52
53
54
P 6.0/CB0/A0
P 6.1/CB1/A1
P 6.2/CB2/A2
P 6.3/CB3/A3
P 6.4/CB4/A4
P 6.5/CB5/A5
P 6.6/CB6/A6
P 6.7/CB7/A7
77
78
79
80
1
2
3
4
P 8.0
P 8.1
P 8.2
15
16
17
P J .0/TDO
P J .1/TDI/TCLK
P J .2/TMS
P J .3/TCK
72
73
74
75
RS T/NMI/S BWTDIO
TES T/S BWTCK
76
71
P U.0/DP
P U.1/DM
P UR
65
66
VBUS
VUS B
11
18
50
AVCC1
DVCC1
DVCC2
VS S U
AVS S 1
AVS S 2
DVS S 1
DVS S 2
GP IO6/P WM1/S P I(CS )
GP IO3/P WM2
GP IO2/S P I(S CLK)
R6
R5
LEVEL S HIFTER
U2A_I2C_S DA
0
U2A_3V3
U2A_I2C_S CL
0
U3
GP IO4/S P I(S IMO)/UART(TXD)
GP IO5/S P I(S OMI)/UART(RXD)
D1
Gre e n
J7
1
3
2
4
R1
200
GND
1
GND
VDDIO
R9
10.0k
R8
0
U2A_3V3
S CL_A
S DA_A
6
S CL_B
S DA_B
8
1
U2A_I2C_S CL
U2A_I2C_S DA
OE
3
7
VCCA
VCCB
GND
2
TCA9406DCUR
C12
0.1µF
GP IO9/ADC2
GP IO8/ADC3
5
4
I2C_S CL
I2C_S DA
2
37
38
39
40
41
42
43
44
P 2.0/TA1.1
P 2.1/TA1.2
P 2.2/TA2CLK/S MCLK
P 2.3/TA2.0
P 2.4/TA2.1
P 2.5/TA2.2
P 2.6/RTCCLK/DMAE0
P 2.7/UCB0S TE/UCA0CLK
1
GP IO11/VEREF+
P 1.0/TA0CLK/ACLK
P 1.1/TA0.0
P 1.2/TA0.1
P 1.3/TA0.2
P 1.4/TA0.3
P 1.5/TA0.4
P 1.6/TA1CLK/CBOUT
P 1.7/TA1.0
3
GP IO7/P WM0
21
22
23
24
25
26
27
28
C4
0.1µF
Q2
2
EFC0/GP IO12/CLOCK
62
64
63
61
14
68
19
49
GND
GND
DP
U2A_3V3
DM
P UR
R10
33k
C11
2200pF
MSP430F5529IPN
C14
0.1µF
C111
0.1µF
GND
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 15-7. DS90UB95x-Q1EVM USB2ANY Circuits - Page 6
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DS90UB95x-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB95x-Q1EVM Schematic
H5
H1
1
H6
1
NY P MS 440 0025 P H
H2
1
NY P MS 440 0025 P H
1
NY P MS 440 0025 P H
Guiding hole s for CS I conne ctor
NY P MS 440 0025 P H
MH3
C52
4700pF
GND
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C131
4700pF
GND
C56
4700pF
MH4
C130
4700pF
GND
S H-J 7
P CB
LOGO
Te xa s Ins trume nts
P CB
LOGO
P b-Fre e S ymbol
FID2
FID3
FID4
FID5
FID6
GND
S H-J 1
P CB Numbe r: HS DC007
P CB Re v: A
FID1
S H-J 2
S H-J 3
S H-J 8
S H-J 9
S H-J 4
S H-J 10
S H-J 5
S H-J 11
S H-J 6
S H-J 12
PCB
LOGO
FCC dis cla ime r
Va ria nt/La be l Ta ble
Va ria nt
001
La be l Te xt
DS 90UB954-Q1EVM
ZZ3
As se mbly Note
The s e a s se mblie s a re ES D se ns itive , ES D pre ca utions sha ll be obs e rve d.
ZZ2
As se mbly Note
The s e a s se mblie s mus t be cle a n a nd fre e from flux a nd a ll conta mina nts. Use of no cle a n flux is not a cce pta ble .
ZZ4
As se mbly Note
The s e a s se mblie s mus t comply with workma ns hip sta nda rds IP C-A-610 Cla s s 2, unle s s othe rwis e spe cifie d.
Copyright © 2017, Texas Instruments Incorporated
Figure 15-8. DS90UB95x-Q1EVM Miscellaneous Hardware
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16 DS90UB95x-Q1 EVM PCB Layout
Figure 16-1. Top View Composite
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Figure 16-2. Layer 1: Top Signal Layer
46
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Figure 16-3. Layer 2: GND Plane 1
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Figure 16-4. Layer 3: Mid Signal Layer 1
48
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Figure 16-5. Layer 4: GND Plane 2
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Figure 16-6. Layer 5: GND Plane 3
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Figure 16-7. Layer 6: Mid Signal Layer 2
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Figure 16-8. Layer 7: GND Plane 4
52
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Figure 16-9. Layer 8: Bottom Signal Layer
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Figure 16-10. Bottom View Composite
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DS90UB95xQ1-EVM Bill of Materials
17 DS90UB95xQ1-EVM Bill of Materials
Table 17-1. DS90UB95x-Q1EVM BOM
ITEM
QTY
DESIGNATOR
1
1
!PCB1
2
2
C1, C8
3
1
4
VALUE
PART NUMBER
MANUFACT
URER
DESCRIPTION
HSDC007
Any
Printed Circuit Board
220pF
06035A221FAT2A
AVX
CAP, CERM, 220 pF, 50 V, +/- 1%, C0G/
NP0, 0603
C2
0.01uF
C1608X7R1H103K080AA
TDK
CAP, CERM, 0.01 µF, 50 V, +/- 10%, X7R,
0603
5
C3, C13, C14,
C75, C111
0.1uF
0603YC104JAT2A
AVX
CAP, CERM, 0.1 µF, 16 V, +/- 5%, X7R,
0603
5
2
C4, C12
0.1uF
GRM155R71C104KA88D
MuRata
CAP, CERM, 0.1 µF, 16 V, +/- 10%, X7R,
0402
6
1
C5
1uF
C0805C105K3RACTU
Kemet
CAP, CERM, 1 µF, 25 V, +/- 10%, X7R,
0805
7
1
C6
2.2uF
0805YD225KAT2A
AVX
CAP, CERM, 2.2 µF, 16 V, +/- 10%, X5R,
0805
8
1
C7
22uF
EEE-1AA220WR
Panasonic ECG
CAP ALUM 22UF 10V 20% SMD
9
2
C9, C10
30pF
GRM1885C2A300JA01D
MuRata
CAP, CERM, 30 pF, 100 V, +/- 5%, C0G/
NP0, 0603
10
1
C11
2200pF
C0603X222K5RACTU
Kemet
CAP, CERM, 2200 pF, 50 V, +/- 10%, X7R,
0603
11
4
C15, C19, C105,
C109
4.7uF
GRM21BR71C475KA73L
MuRata
CAP, CERM, 4.7uF, 16V, +/-10%, X7R,
0805
12
5
C16, C20, C110,
C114, C123
10uF
GRM21BR71A106KE51L
MuRata
CAP, CERM, 10uF, 10V, +/-10%, X7R,
0805
13
12
C17, C18, C21,
0.1uF
C22, C51, C113,
C116, C117, C121,
C122, C125, C128
GRM155R71C104KA88D
MuRata
CAP, CERM, 0.1uF, 16V, +/-10%, X7R,
0402
14
1
C23
10pF
GRM1555C1H100JA01D
MuRata
CAP, CERM, 10pF, 50V, +/-5%, C0G/NP0,
0402
15
1
C24
3300pF
GRM155R71H332KA01D
MuRata
CAP, CERM, 3300pF, 50V, +/-10%, X7R,
0402
16
2
C25, C124
1uF
GCM188R71C105KA64D
MuRata
CAP, CERM, 1 µF, 16 V, +/- 10%, X7R,
AEC-Q200 Grade 1, 0603
17
9
C26, C28, C30,
1uF
C31, C101, C102,
C104, C119, C120
GRM185R61C105KE44D
MuRata
CAP, CERM, 1 µF, 16 V, +/- 10%, X5R,
0603
18
1
C27
10uF
GRM188R61E106MA73D
MuRata
CAP, CERM, 10 µF, 25 V, +/- 20%, X5R,
0603
19
14
C29, C34, C40,
C41, C48, C49,
C53, C54, C62,
C67, C81, C86,
C87, C93
22uF
GRT31CR61E226KE01L
MuRata
CAP, CERM, 22 µF, 25 V,+/- 10%, X5R,
AEC-Q200 Grade 3, 1206
20
2
C32, C35
22uF
GRT31CR61E226KE01L
MuRata
CAP, CERM, 22 µF, 25 V, +/- 10%, X5R,
AEC-Q200 Grade 3, 1206
21
8
C33, C42, C47,
C63, C66, C71,
C78, C79
0.1uF
CGA2B3X7R1H104K050BB TDK
CAP, CERM, 0.1 µF, 50 V, +/- 10%, X7R,
AEC-Q200 Grade 1, 0402
22
4
C36, C43, C61,
C72
4.7uF
C0805C475K3PACTU
Kemet
CAP, CERM, 4.7 µF, 25 V, +/- 10%, X5R,
0805
23
9
C37, C44, C45,
C60, C64, C65,
C68, C77, C80
0.01uF
GCM155R71H103KA55D
MuRata
CAP, CERM, 0.01uF, 50V, +/-10%, C0G/
NP0, 0402
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Table 17-1. DS90UB95x-Q1EVM BOM (continued)
ITEM
QTY
DESIGNATOR
VALUE
24
3
C38, C39, C83
0.033uF CGA2B3X7R1H333K050BB TDK
25
8
C46, C59, C73,
1uF
C82, C100, C103,
C112, C118
C1005JB1V105K050BC
TDK
CAP, CERM, 1 µF, 35 V, +/- 10%, JB, 0402
26
2
C50, C106
0.1uF
C1005X5R1H104K050BB
TDK
CAP, CERM, 0.1 µF, 50 V, +/- 10%, X5R,
0402
27
4
C52, C56, C130,
C131
4700pF
08051C472KAT2A
AVX
CAP, CERM, 4700 pF, 100 V, +/- 10%,
X7R, 0805
28
2
C55, C58
12pF
GRM1555C1E120JA01D
MuRata
CAP, CERM, 12pF, 25V, +/-5%, C0G/NP0,
0402
29
3
C57, C88, C92
10uF
CL21A106KAFN3NE
Samsung
CAP, CERM, 10 µF, 25 V, +/- 10%, X5R,
0805
30
4
C69, C94, C99,
C127
22uF
293D226X0025D2TE3
VishaySprague
CAP, TA, 22uF, 25V, +/-20%, 0.7 ohm,
SMD
31
5
C70, C85, C90,
C96, C98
0.1uF
C1005X7R1H104K050BB
TDK
CAP, CERM, 0.1 µF, 50 V, +/- 10%, X7R,
0402
32
1
C74
0.01uF
06031C103KAT2A
AVX
CAP, CERM, 0.01 µF, 100 V, +/- 10%,
X7R, 0603
33
1
C76
0.047uF C1005X7R1H473K050BB
TDK
CAP, CERM, 0.047 µF, 50 V, +/- 10%,
X7R, 0402
34
1
C84
0.015uF CGA2B3X7R1H153K050BB TDK
CAP, CERM, 0.015 µF, 50 V, +/- 10%,
X7R, AEC-Q200 Grade 1, 0402
35
4
C89, C91, C95,
C97
10uF
C1608X5R1E106M080AC
TDK
CAP, CERM, 10 µF, 25 V, +/- 20%, X5R,
0603
36
1
C107
47uF
GRM32ER61C476ME15L
MuRata
CAP, CERM, 47uF, 16V, +/-20%, X5R,
1210
37
1
C108
100uF
T495D107M016ATE100
Kemet
CAP, TA, 100uF, 16V, +/-20%, 0.1 ohm,
SMD
38
1
C115
0.01uF
06031C103JAT2A
AVX
CAP, CERM, 0.01uF, 100V, +/-5%, X7R,
0603
39
1
C126
0.47uF
GRM188R71A474KA61D
MuRata
CAP, CERM, 0.47 µF, 10 V, +/- 10%, X7R,
0603
40
1
C129
2.2uF
293D225X9025A2TE3
VishaySprague
CAP, TA, 2.2uF, 25V, +/-10%, 6.3 ohm,
SMD
41
9
D1, D8, D10, D11, Green
D12, D13, D14,
D15, D16
150060VS75000
Wurth
Elektronik
eiSos
LED, Green, SMD
42
1
D2
7.5V
1SMB5922BT3G
ON
Diode, Zener, 7.5 V, 550 mW, SMB
Semiconduct
or
43
3
D3, D4, D5
Super
Red
150060SS75000
Wurth
Elektronik
eiSos
LED, Super Red, SMD
44
3
D6, D7, D9
Orange
LTST-C190KFKT
Lite-On
LED, Orange, SMD
45
1
D17
40V
46
1
F1
47
1
FB1
48
6
49
50
51
56
PART NUMBER
MANUFACT
URER
DESCRIPTION
CAP, CERM, 0.033 µF, 50 V, +/- 10%,
X7R, AEC-Q200 Grade 1, 0402
1N5819HW-7-F
Diodes Inc.
Diode, Schottky, 40V, 1A, SOD-123
0440002.WR
Littelfuse
Fuse, 2 A, 32 V, SMD
BK1608HS600-T
Taiyo Yuden
Ferrite Bead, 60 ohm @ 100 MHz, 0.8 A,
0603
FID1, FID2, FID3,
FID4, FID5, FID6
N/A
N/A
Fiducial mark. There is nothing to buy or
mount.
1
H1
BMI-S-201-F
Laird
EMI SHIELD, 13.66 x 12.70 mm, SMT
4
H1, H2, H5, H6
NY PMS 440 0025 PH
BF Fastener
Supply
Machine Screw, Round, 4-40 x 1/4, Nylon,
Philips panhead
1
J1
PJ-102A
CUI Inc.
Connector, DC Jack 2.1X5.5 mm, TH
60 ohm
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Table 17-1. DS90UB95x-Q1EVM BOM (continued)
ITEM
QTY
DESIGNATOR
52
1
53
VALUE
PART NUMBER
MANUFACT
URER
DESCRIPTION
J2
1734035-2
TE
Connectivity
Connector, Receptacle, Mini-USB Type B,
R/A, Top Mount SMT
7
J3, J13, J14, J17,
J18, J23, J28
5-146261-1
TE
Connectivity
Header, 100mil, 2x1, Gold plated, TH
54
5
J6, J9, J10, J12,
J16
TSW-103-07-G-S
Samtec, Inc.
Header, TH, 100mil, 3x1, Gold plated, 230
mil above insulator
55
1
J7
TSW-102-07-G-D
Samtec
Header, 100mil, 2x2, Gold, TH
56
4
J8, J11, J15, J27
TSW-104-07-G-D
Samtec
Header, 100mil, 4x2, Gold, TH
57
1
J21
MMCX-J-P-H-ST-TH1
Samtec
Connector, MMCX 50 ohm, TH
58
1
J22
TSW-110-07-G-D
Samtec
Header, 100mil, 10x2, Gold, TH
59
1
J24
QSH-020-01-H-D-DP-A
Samtec
Receptacle, Differential, 0.5mm, 10 pair
x2, Gold, SMT
60
1
J25
0022112042
Molex
Header, 100mil, 4x1, White, TH
61
1
J26
QTH-020-04-L-D-DP-A
Samtec
Header(shrouded), 0.5mm, 10 pair x 2,
Gold, SMT
62
3
J29, J30, J31
59S20X-40ML5-Z
Rosenberger Connector, RF, 50 Ohm, R/A, TH
63
8
L1, L2, L3, L4, L5, 120 ohm BLM18SG121TN1D
L6, L7, L8
MuRata
Ferrite Bead, 120 ohm @ 100 MHz, 3 A,
0603
64
2
L10, L18
100uH
CLF6045NIT-101M-D
TDK
Inductor, Wirewound, Ferrite, 100 µH, 0.61
A, 0.32 ohm, AEC-Q200 Grade 0, SMD
65
1
L11
10uH
LQH3NPN100NG0
MuRata
Inductor, Wirewound, Ferrite, 10 µH, 0.5 A,
0.57 ohm, SMD
66
1
L12
DLW21SN900HQ2L
MuRata
Coupled inductor, 0.28 A, 0.41 ohm, +/25%, SMD
67
2
L13, L20
1000
ohm
BLM18AG102SN1D
MuRata
Ferrite Bead, 1000 ohm @ 100 MHz, 0.4
A, 0603
68
1
L14
330 ohm MPZ1005S331ETD25
TDK
Ferrite Bead, 330 ohm @ 100 MHz, 0.7 A,
0402
69
2
L15, L16
1500
ohm
BLM18HE152SN1D
MuRata
Ferrite Bead, 1500 ohm @ 100 MHz, 0.5
A, 0603
70
1
L17
47 ohm
MPZ1005F470ETD25
TDK
Ferrite Bead, 47 ohm @ 100 MHz, 0.45 A,
0402
71
1
L19
10uH
LQH3NPN100MJRL
MuRata
Inductor, Wirewound, Ferrite, 10 µH, 0.81
A, 0.24 ohm, SMD
72
1
L21
4.7uH
7440650047
Wurth
Elektronik
Inductor, Shielded Drum Core, Ferrite, 4.7
µH, 4.2 A, 0.02 ohm, SMD
73
2
Q1, Q2
50V
BSS138
Fairchild
MOSFET, N-CH, 50 V, 0.22 A, SOT-23
Semiconduct
or
74
1
R1
200
CRCW0603200RFKEA
Vishay-Dale
RES, 200, 1%, 0.1 W, 0603
75
1
R2
1.5k
CRCW04021K50JNED
Vishay-Dale
RES, 1.5k ohm, 5%, 0.063W, 0402
76
2
R3, R10
33k
CRCW040233K0JNED
Vishay-Dale
RES, 33k ohm, 5%, 0.063W, 0402
77
1
R4
1.2Meg
CRCW06031M20JNEA
Vishay-Dale
RES, 1.2 M, 5%, 0.1 W, 0603
78
12
R5, R6, R29, R30, 0
R32, R35, R48,
R75, R82, R85,
R86, R130
ERJ-2GE0R00X
Panasonic
RES, 0, 5%, 0.063 W, 0402
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Table 17-1. DS90UB95x-Q1EVM BOM (continued)
ITEM
QTY
DESIGNATOR
VALUE
PART NUMBER
MANUFACT
URER
DESCRIPTION
79
25
R7, R33, R34,
R38, R39, R40,
R41, R42, R43,
R44, R45, R46,
R47, R60, R61,
R62, R63, R64,
R65, R66, R67,
R68, R69, R71,
R72
0
ERJ-1GE0R00C
Panasonic
RES, 0, 5%, 0.05 W, 0201
80
7
R8, R11, R12,
R54, R55, R78,
R115
0
ERJ-2GE0R00X
Panasonic
RES, 0 ohm, 5%, 0.063W, 0402
81
1
R9
10.0k
CRCW040210K0FKED
Vishay-Dale
RES, 10.0 k, 1%, 0.063 W, 0402
82
4
R13, R19, R21,
R112
3.24k
CRCW04023K24FKED
Vishay-Dale
RES, 3.24k ohm, 1%, 0.063W, 0402
83
1
R14
124k
CRCW0402124KFKED
Vishay-Dale
RES, 124k ohm, 1%, 0.063W, 0402
84
5
R15, R76, R123,
R124, R133
100k
CRCW0402100KJNED
Vishay-Dale
RES, 100k ohm, 5%, 0.063W, 0402
85
4
R16, R25, R87,
R125
10k
CRCW040210K0JNED
Vishay-Dale
RES, 10k ohm, 5%, 0.063W, 0402
86
14
R17, R22, R26,
0
R50, R51, R56,
R57, R103, R106,
R109, R113,
R122, R126, R129
CRCW06030000Z0EA
Vishay-Dale
RES, 0 ohm, 5%, 0.1W, 0603
87
1
R18
29.4k
CRCW040229K4FKED
Vishay-Dale
RES, 29.4 k, 1%, 0.063 W, 0402
88
7
R20, R74, R79,
10.0k
R102, R107, R111,
R132
CRCW040210K0FKED
Vishay-Dale
RES, 10.0k ohm, 1%, 0.063W, 0402
89
2
R23, R105
34.0k
CRCW040234K0FKED
Vishay-Dale
RES, 34.0 k, 1%, 0.063 W, 0402
90
1
R24
100
ERJ-2RKF1000X
Panasonic
RES, 100, 1%, 0.1 W, 0402
91
5
R27, R28, R37,
R88, R95
0
CRCW02010000Z0ED
Vishay-Dale
RES, 0, 5%, 0.05 W, 0201
92
1
R31
50
504L50R0FTNCFT
AT Ceramics
RES, 50, 1%, 0.125 W, AEC-Q200 Grade
1, 0402
93
3
R36, R52, R53
4.7k
CRCW04024K70JNED
Vishay-Dale
RES, 4.7k ohm, 5%, 0.063W, 0402
94
1
R49
10.0k
ERJ-2RKF1002X
Panasonic
RES, 10.0 k, 1%, 0.1 W, 0402
95
10
R58, R59, R70,
R77, R80, R81,
R89, R91, R101,
R104
220
CRCW0402220RJNED
Vishay-Dale
RES, 220, 5%, 0.063 W, 0402
96
1
R73
470
CRCW0402470RJNED
Vishay-Dale
RES, 470 ohm, 5%, 0.063W, 0402
97
3
R83, R100, R108
4.02k
CRCW06034K02FKEA
Vishay-Dale
RES, 4.02 k, 1%, 0.1 W, 0603
98
1
R84
0
CRCW06030000Z0EA
Vishay-Dale
RES, 0, 5%, 0.1 W, 0603
99
1
R90
49.9
CRCW020149R9FKED
Vishay-Dale
RES, 49.9, 1%, 0.05 W, 0201
100
2
R92, R94
470
CRCW0402470RJNED
Vishay-Dale
RES, 470, 5%, 0.063 W, 0402
101
1
R93
22.1k
CRCW040222K1FKED
Vishay-Dale
RES, 22.1k ohm, 1%, 0.063W, 0402
102
1
R96
49.9
ERJ-2RKF49R9X
Panasonic
RES, 49.9, 1%, 0.1 W, AEC-Q200 Grade
0, 0402
103
2
R97, R98
2.4k
CRCW04022K40JNED
Vishay-Dale
RES, 2.4 k, 5%, 0.063 W, 0402
104
2
R99, R110
5.6k
CRCW04025K60JNED
Vishay-Dale
RES, 5.6 k, 5%, 0.063 W, 0402
105
1
R114
10k
CRCW040210K0JNED
Vishay-Dale
RES, 10 k, 5%, 0.063 W, 0402
106
1
R116
25.5k
CRCW040225K5FKED
Vishay-Dale
RES, 25.5 k, 1%, 0.063 W, 0402
107
1
R117
95.3k
CRCW040295K3FKED
Vishay-Dale
RES, 95.3 k, 1%, 0.063 W, 0402
58
DS90UB95x-Q1EVM Deserializer User's Guide
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DS90UB95xQ1-EVM Bill of Materials
Table 17-1. DS90UB95x-Q1EVM BOM (continued)
ITEM
QTY
DESIGNATOR
VALUE
PART NUMBER
MANUFACT
URER
DESCRIPTION
108
1
R118
39.2k
CRCW040239K2FKED
Vishay-Dale
RES, 39.2 k, 1%, 0.063 W, 0402
109
2
R119, R120
78.7k
CRCW040278K7FKED
Vishay-Dale
RES, 78.7 k, 1%, 0.063 W, 0402
110
1
R121
97.6k
CRCW040297K6FKED
Vishay-Dale
RES, 97.6 k, 1%, 0.063 W, 0402
111
1
R127
1.87k
CRCW04021K87FKED
Vishay-Dale
RES, 1.87k ohm, 1%, 0.063W, 0402
112
1
R128
4.99k
CRCW04024K99FKED
Vishay-Dale
RES, 4.99k ohm, 1%, 0.063W, 0402
113
1
R131
33.2k
CRCW040233K2FKED
Vishay-Dale
RES, 33.2 k, 1%, 0.063 W, 0402
114
2
R134, R135
33
CRCW040233R0JNED
Vishay-Dale
RES, 33 ohm, 5%, 0.063W, 0402
115
1
S1
EVQ-PSD02K
Panasonic
Switch, Tactile, SPST-NO, SMT
116
12
SH-J1, SH-J2, SH- 1x2
J3, SH-J4, SHJ5, SH-J6, SH-J7,
SH-J8, SH-J9, SHJ10, SH-J11, SHJ12
2SN-BK-G
Samtec
Shunt, 2mm, Gold plated, Black
117
1
SW1
KSR221GLFS
C and K
Components
Switch, Normally open, 2.3N force, 200k
operations, SMD
118
1
T1
ACM9070-701-2PL-TL01
TDK
Coupled inductor, 5 A, 0.01 ohm, SMD
119
1
U1
TPD4E004DRYR
Texas
Instruments
4-CHANNEL ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES,
DRY006A
120
1
U2
TPS73533DRBR
Texas
Instruments
500mA, Low Quiescent Current, Ultra-Low
Noise, High PSRR Low-Dropout Linear
Regulator, DRB0008A
121
1
U3
TCA9406DCUR
Texas
Instruments
TCA9406 Dual Bidirectional 1-MHz I2CBUS and SMBus Voltage Level-Translator,
1.65 to 3.6 V, -40 to 85 degC, 8-pin US8
(DCU), Green (RoHS & no Sb/Br)
122
1
U4
TPS54225PWPR
Texas
Instruments
4.5V to 18V Input, 2-A Synchronous StepDown SWIFT™ Converter, PWP0014E
123
1
U5
DS90UB954TRGZRQ1
Texas
Instruments
FPD\Link III Deserializer with CSI\2
interface for 2.3MP/60fps cameras,
RGZ0048B (VQFN-48)
124
3
U6, U7, U8
LM2941LD/NOPB
Texas
Instruments
1A Low Dropout Adjustable Regulator, 8pin LLP, Pb-Free
125
1
U9
TPS74801TDRCRQ1
Texas
Instruments
Single Output LDO, 1.5 A, Adjustable
0.8 to 3.6 V Output, 0.8 to 5.5 V Input,
with Programmable Soft Start, 10-pin SON
(DRC), -40 to 105 degC, Green (RoHS &
no Sb/Br)
126
1
U10
TPS767D318PWP
Texas
Instruments
Dual Output LDO, 1 A, Fixed 1.8, 3.3 V
Output, 2.7 to 10 V Input, 28-pin HTSSOP
(PWP), -40 to 125 degC, Green (RoHS &
no Sb/Br)
127
1
U11
MSP430F5529IPN
Texas
Instruments
25 MHz Mixed Signal Microcontroller with
128 KB Flash, 8192 B SRAM and 63
GPIOs, -40 to 85 degC, 80-pin QFP (PN),
Green (RoHS & no Sb/Br)
128
1
Y1
ABM3-25.000MHZ-D2W-T
Abracon
Corportation
Crystal, 25 MHz, 18 pF, SMD
129
1
Y2
SG-210STF25.000000MHZY Epson
OSC, 25 MHz, 1.6 to 3.6 V, SMD
130
1
Y3
ECS-240-20-5PX-TR
Crystal, 24.000MHz, 20pF, SMD
ECS Inc.
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59
Revision History
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18 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (May 2019) to Revision B (April 2021)
Page
3
• Updated Abstract section to include V Link TDES954....................................................................................... 1
Changes from Revision * (August 2017) to Revision A (May 2019)
Page
• Updated User's Guide throughout...................................................................................................................... 1
60
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