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HD3SS3202
SLASEO1A – MAY 2018 – REVISED SEPTEMBER 2018
HD3SS3202 Two-Channel Differential 2:1/1:2 USB3.1 Mux/Demux
1 Features
3 Description
•
The HD3SS3202 is a high-speed bidirectional
passive switch in mux or demux configurations suited
for USB Type-C™ applications that support USB 3.1
Gen 1 and Gen 2 data rates. Based on control pin
SEL, the device supplies switching on differential
channels between Port B or Port C to Port A.
1
•
•
•
•
•
•
•
•
•
Provides MUX/DEMUX Solution for USB
Type-C™ Ecosystem for USB 3.1 Gen 1 and
Gen 2 Data Rates
Compatible With MIPI DSI/CSI-2 DPHY, LVDS,
PCIE Gen III, SATA Express, SATA
Operates up to 10 Gbps
Wide –3-dB Differential BW of over 8 GHz
Excellent Dynamic Characteristics (at 5 GHz)
– Crosstalk = –41 dB
– Off Isolation = –20 dB
– Insertion Loss = –2.4 dB
– Return Loss = –8 dB
Bidirectional "Mux/De-Mux" Differential Switch
Supports Common Mode Voltage 0 to 2 V
Single Supply Voltage VCC of 3.3 V ±10%
Commercial Temperature Range of 0°C to 70°C
(HD3SS3202)
Industrial Temperature Range of –40°C to 85°C
(HD3SS3202I)
The device allows high-speed switching with
minimum attenuation to the signal eye diagram with
little added jitter. It uses < 1.65 mW (typical) of power
when in operation. It has a shutdown mode that is
used by the OEn pin resulting < .02 µW (typical).
Device Information(1)
PART NUMBER
HD3SS3202
HD3SS3202I
2 Applications
•
•
•
•
•
•
•
The HD3SS3202 is a generic analog differential
passive switch. It works with any high-speed interface
application that requires a common mode voltage
range of 0 to 2 V, and requires a differential signaling
with differential amplitude at a maximum of 1800
mVpp. The device has adaptive tracking that makes
sure the channel stays unchanged for the full
common mode voltage range.
PACKAGE
UQFN (16)
BODY SIZE (NOM)
2.60 mm x 1.80 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
USB Type-C™ Ecosystem
Desktop and Notebook PCs
Shared I/O Ports
Docking Stations
Monitors, TVs
Set Top Box
Network Security Cameras
Simplified Schematic
B0+
B0±
A0+
A0±
C0+
C0±
SEL
B1+
B1±
A1+
A1±
C1+
C1±
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
HD3SS3202
SLASEO1A – MAY 2018 – REVISED SEPTEMBER 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
4
5
5
6
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
High-Speed Performance Parameters ......................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 7
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes........................................ 10
9
Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Applications ................................................ 14
9.3 Systems Examples.................................................. 15
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 18
11.1 Layout Guidelines ................................................. 18
11.2 Layout Example .................................................... 18
12 Device and Documentation Support ................. 19
12.1
12.2
12.3
12.4
12.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
19
13 Mechanical, Packaging, and Orderable
Information ........................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (May 2018) to Revision A
•
2
Page
Changed ICC max from 0.6mA to 0.8mA................................................................................................................................. 5
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SLASEO1A – MAY 2018 – REVISED SEPTEMBER 2018
5 Pin Configuration and Functions
A0n
B0n
B0p
14
1
13
OEn
15
16
A0p
RSV Package
16-Pin UQFN
Top View
12
B1p
VCC
3
10
C0p
A1p
4
9
C0n
C1p
C1n
SEL
A1n
8
B1n
7
11
6
2
5
GND
Not to scale
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
A0n
1
I/O
Port A, channel 0, high-speed negative signal
GND
2
G
Ground
VCC
3
P
3.3-V power
A1p
4
I/O
Port A, channel 1, high-speed positive signal
A1n
5
I/O
Port A, channel 1, high-speed negative signal
SEL
6
I
C1n
7
I/O
Port C, channel 1, high-speed negative signal (connector side)
C1p
8
I/O
Port C, channel 1, high-speed positive signal (connector side)
C0n
9
I/O
Port C, channel 0, high-speed negative signal (connector side)
C0p
10
I/O
Port C, channel 0, high-speed positive signal (connector side)
B1n
11
I/O
Port B, channel 1, high-speed negative signal (connector side)
B1p
12
I/O
Port B, channel 1, high-speed positive signal (connector side)
B0n
13
I/O
Port B, channel 0, high-speed negative signal (connector side)
B0p
14
I/O
Port B, channel 0, high-speed positive signal (connector side)
OEn
15
I
A0p
16
I/O
Port select pin. To help with noise immunity, a 0.01 µF capacitor to GND on this pin is
suggested.
L: Port A to Port B
H: Port A to Port C
Active-low chip enable. To help with noise immunity, a 0.01 µF capacitor to GND on this pin
is suggested.
L: Normal operation
H: Shutdown
Port A, channel 0, high-speed positive signal
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HD3SS3202
SLASEO1A – MAY 2018 – REVISED SEPTEMBER 2018
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCC
Supply voltage
Voltage
Tstg
(1)
MIN
MAX
–0.5
4
Differential I/O
–0.5
2.5
Control pins
–0.5
VCC+ 0.5
–65
150
Storage temperature
UNIT
V
V
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Theseare stress ratings
only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under Recommended
OperatingConditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device reliability.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safemanufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safemanufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
VCC
Supply voltage
3
3.3
3.6
UNIT
V
Vih
Input high voltage (SEL, OEn pins)
2
VCC
V
Vil
Input low voltage (SEL, OEn pins)
–0.1
0.8
V
Vdiff
High-speed signal pins differential voltage
0
1.8
Vpp
Vcm
High speed signal pins common mode voltage
0
2
TA
Operating free-air/ambient temperature
HD3SS3202RSV
0
70
HD3SS3202IRSV
–40
85
V
°C
6.4 Thermal Information
HD3SS3202
THERMAL METRIC (1)
RSV (VQFN)
UNIT
16 PINS
RθJA
Junction-to-ambient thermal resistance
117.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
52.1
°C/W
RθJB
Junction-to-board thermal resistance
52.6
°C/W
ψJT
Junction-to-top characterization parameter
1.2
°C/W
ψJB
Junction-to-board characterization parameter
51.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W
(1)
4
For more information about traditional and new thermalmetrics, see the Semiconductor and IC Package ThermalMetrics application
report.
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6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.5
0.8
mA
0.005
1
µA
ICC
Device active current
VCC = 3.3 V, OEn = 0
ISTDN
Device shutdown current
VCC = 3.3 V, OEn = VCC
CON
Output ON capacitance to GND
0.6
pF
COFF
Output OFF capacitance to GND
0.8
pF
RON
Output ON resistance
VCC = 3.3 V; VCM = 0 to 2 V;
IO = –8 mA
ΔRON
On-resistance match between pairs of the
same channel
RFLAT_ON
On-resistance flatness RON(MAX) –
RON(MIN)
IIH,CTRL
IIL,CTRL
8
Ω
VCC = 3.3 V; –0.35 V ≤ VIN ≤ 2.35 V;
IO = –8 mA
0.7
Ω
VCC = 3.3 V; –0.35 V ≤ VIN ≤ 2.35 V
1
Ω
Input high current, control pins (SEL, OEn)
1
µA
Input low current, control pins (SEL, OEn)
1
µA
1
µA
140
µA
1
µA
IIH,HS
Input high current, high-speed pins
[Ax/Bx/Cx][p/n]
VIN = 2 V for selected port, A and B
with SEL = 0, and A and C with
SEL = VCC
IIH,HS
Input high current, high-speed pins
[Ax/Bx/Cx][p/n]
VIN = 2 V for non-selected port, C
with SEL = 0, and B with
SEL = VCC (1)
IIL,HS
Input low current, high-speed pins
[Ax/Bx/Cx][p/n]
(1)
5
100
There is a 20-kΩ pull-down in non-selected port.
6.6 High-Speed Performance Parameters
PARAMETER
IL
BW
RL
Differential insertion loss
TEST CONDITION
ƒ = 0.625 MHz
-0.4
ƒ = 2.5 GHz
-1.3
ƒ = 4 GHz
-2.0
ƒ = 5 GHz
-2.4
ƒ = 0.3 MHz
-27
ƒ = 2.5 GHz
-11
8
ƒ = 4 GHz
ƒ = 5 GHz
OIRR
XTALK
Differential OFF isolation
Differential crosstalk
TYP
-0.4
–3-dB bandwidth
Differential return loss
MIN
ƒ = 0.3 MHz
-9
MAX
UNIT
dB
GHz
dB
-8
ƒ = 0.3 MHz
-77
ƒ = 2.5 GHz
-23
ƒ = 4 GHz
-21
ƒ = 5 GHz
-20
ƒ = 0.3 MHz
-82
ƒ = 2.5 GHz
-44
ƒ = 4 GHz
-41
ƒ = 5 GHz
-41
dB
dB
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6.7 Switching Characteristics
PARAMETER
MIN
TYP
MAX
UNIT
tPD
Switch propagation delay (see Figure 4)
80
ps
tSW_ON
Switching time SEL-to-Switch ON (see Figure 3)
0.5
µs
tSW_OFF
Switching time SEL-to-Switch OFF (see Figure 3)
0.5
µs
tSK_INTRA
Intra-pair output skew (see Figure 4)
6
ps
tSK_INTER
Inter-pair output skew (see Figure 4)
20
ps
tPD
Average propagation delay, see Figure 1
ƒ = 100 MHz
16
54
ƒ = 200 MHz
33
63
ƒ = 300 MHz
33
59
ƒ = 400 MHz
33
57
ƒ = 500 MHz
33
56
ƒ = 600 MHz
33
53
ƒ = 700 MHz
33
50
ƒ = 750 MHz
33
50
ƒ = 800 MHz
33
50
ƒ = 900 MHz
31
50
ƒ = 1000 MHz
30
50
ps
6.8 Typical Characteristics
70
Average Prop Delay (ps)
60
50
40
30
20
10
Average Prop Delay
0
0
5E+8
1E+9
Frequency (Hz)
1.5E+9
D001
Figure 1. Average Propagation Delay vs Frequency
6
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7 Parameter Measurement Information
VCC
RSC = 50 Ÿ
Bxp/Cxp
Axp
RL = 50 Ÿ
RSC = 50 Ÿ
Axn
Bxn/Cxn
RL = 50 Ÿ
SEL
Figure 2. Test Setup
50%
50%
SEL
90%
10%
VOUT
tSW_ON
tSW_OFF
Figure 3. Switch On and Off Timing Diagram
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Parameter Measurement Information (continued)
2.6-V Max
50%
VIN
50%
0V
2.6-V Max
50%
VOUT
0V
50%
tPD
VOUTp
50%
VOUTn
TSK_INTRA
B0/C0
VOUT
50%
50%
50%
B1/C1
VOUT
50%
tSK_INTER
Figure 4. Timing Diagrams and Test Setup
8
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8 Detailed Description
8.1 Overview
The HD3SS3202 is a generic analog differential passive switch that can works for any high-speed interface
applications requiring a common mode voltage range of 0 to 2 V and differential signaling with differential
amplitude up to 1800 mVpp. It uses adaptive tracking to ensures the channel remain unchanged for the entire
common mode voltage range.
Excellent dynamic characteristics of the device allow high-speed switching with minimum attenuation to the
signal eye diagram with little added jitter. It consumes < 1.65 mW (typ) of power when operational and has a
shutdown mode exercisable by OEn pin resulting < .02 µW (typical).
8.2 Functional Block Diagram
B0+
B0±
A0+
A0±
C0+
C0±
SEL
B1+
B1±
A1+
A1±
C1+
C1±
8.3 Feature Description
8.3.1 Output Enable and Power Savings
The HD3SS3202 has two power modes, active/normal operating mode and standby/shutdown mode. During
standby mode, the device consumes little current to save the maximum power. To enter standby mode, the OEn
control pin is pulled high through a resistor and must remain high. For active/normal operation, the OEn control
pin should be pulled low to GND.
HD3SS3202 consumes < 1.65 mW (typ) of power when operational and has a shutdown mode exercisable by
the OEn pin resulting < .02 µW (typ).
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HD3SS3202
SLASEO1A – MAY 2018 – REVISED SEPTEMBER 2018
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8.4 Device Functional Modes
Table 1. Port Select Control Logic (1)
PORT A CHANNEL
(1)
10
PORT B OR PORT C CHANNEL CONNECTED TO PORT A CHANNEL
SEL = L
SEL = H
A0p
B0p
C0p
A0n
B0n
C0n
A1p
B1p
C1p
A1n
B1n
C1n
The HD3SS3202 can tolerate polarity inversions for all differential signals on Ports A, B, and C. Take
care to ensure the same polarity is maintained on Port A versus Ports B/C.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The HD3SS3202 is a generic 2-channel high-speed mux/demux type of switch that can be used for routing highspeed signals between two different locations on a circuit board. The HD3SS3202 supports several high-speed
data protocols with a differential amplitude of
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