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HDC2021DEBR

HDC2021DEBR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    WSON6_3X3MM_EP

  • 描述:

    湿度,温度 传感器 I²C 输出

  • 数据手册
  • 价格&库存
HDC2021DEBR 数据手册
HDC2021 SNAS773A – DECEMBER 2019 – REVISEDHDC2021 JUNE 2020 SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 www.ti.com HDC2021 High-Accuracy, Low-Power Humidity and Temperature Sensor With Assembly Protection Cover 1 Features 3 Description • The HDC2021 is an integrated relative humidity and temperature sensor with a factory-installed polyimide tape cover over the opening of the relative humidity sensor element. The tape cover provides protection against pollutants that can appear in certain stages of the manufacturing process, such as SMT assembly, PCB board wash, and conformal coating. The tape design allows for a full conformal coating of the PCB, and includes an adhesive free corner tab for quick removal using tweezers. • • • • • • • • • • Factory-installed polyimide tape to protect sensor during assembly RH measurement range: 0% to 100% Temperature measurement range: –40°C to 125°C Humidity accuracy: ±2% (typical), ±3% (maximum) Temperature accuracy: ±0.2°C (typical), ±0.4°C (maximum) Supply voltage range: 1.62 V to 3.6 V I2C interface compatibility 50 nA sleep mode current 550 nA average supply current (11-bit accuracy option, 1 measurement/second) Continuous conversion or one-shot measurement mode Backward-compatible with HDC2080 2 Applications • • • • • • Thermostats Smart speakers (with voice assistant) Washers and dryers HVAC sensor transmitters (temperature, pressure, and humidity) HVAC system controllers Wireless environmental sensors VDD VDD HDC2021 I2 C Master SDA ADC Registers + Logic Temperature Sensor I2 C DRDY/INT Device Information PART NUMBER HDC2021 VDD SCL RH Sensor The HDC2021 device is backward-compatible with the HDC2080, providing high accuracy measurements with very low power consumption in a small DFN package. The capacitive-based sensor includes new integrated digital features and a heating element to dissipate condensation and moisture. The HDC2021 digital features include programmable interrupt thresholds to provide alerts and system wake-ups without requiring a microcontroller to continuously monitor the system. Combined with programmable sampling intervals, low power consumption, and 1.8-V supply voltage support, the HDC2021 is designed for ultra-low power battery-operated systems. (1) PACKAGE (1) WSON (6) BODY SIZE (NOM) 3.00 mm × 3.00 mm For all available packages, see the orderable addendum at the end of the data sheet. 10 GPIO Typical ADDR MCU 9 8 Calibration Typical Application GND Accuracy (r%RH) GND 7 6 5 4 3 2 1 0 0 10 20 30 40 50 60 70 80 90 100 RH (%RH) RH Accuracy (TA = 30°C) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated intellectual property matters and other important disclaimers. PRODUCTION DATA. 1 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 Pin Functions.................................................................... 3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information....................................................4 6.5 Electrical Characteristics.............................................5 6.6 Switching Characteristics............................................6 6.7 Timing Diagram...........................................................7 6.8 Typical Characteristics................................................ 8 7 Detailed Description......................................................10 7.1 Overview................................................................... 10 7.2 Functional Block Diagram......................................... 10 7.3 Feature Description...................................................11 7.4 Device Functional Modes..........................................18 7.5 Programming............................................................ 18 7.6 Register Maps...........................................................20 8 Application and Implementation.................................. 33 8.1 Application Information............................................. 33 8.2 Typical Application.................................................... 33 9 Power Supply Recommendations................................35 10 Layout...........................................................................35 10.1 Layout Guidelines................................................... 35 10.2 Layout Example...................................................... 36 11 Device and Documentation Support..........................37 11.1 Documentation Support.......................................... 37 11.2 Receiving Notification of Documentation Updates.. 37 11.3 Support Resources................................................. 37 11.4 Trademarks............................................................. 37 11.5 Electrostatic Discharge Caution.............................. 37 11.6 Glossary.................................................................. 37 12 Mechanical, Packaging, and Orderable Information.................................................................... 38 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from December 19, 2019 to June 26, 2020 (from Revision * (December 2019) to Revision A (June 2020)) Page • Changed data sheet status from Advanced Information to Production Data......................................................1 • Updated the numbering format for tables, figures, and cross-references throughout the document..................1 2 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 5 Pin Configuration and Functions SDA 1 6 SCL GND 2 5 VDD ADDR 3 4 DRDY/INT Figure 5-1. DEB Package 6-Pin WSON Transparent Top View Pin Functions PIN NAME NO. TYPE(1) DESCRIPTION ADDR 3 I Address select pin – connect to VDD, GND or float. Connect to GND or float: address= 1000000X Connect to VDD: address= 1000001X where 'X' represents the read-write (R/W) bit. DRDY/INT 4 O Data ready/Interrupt. Push-Pull Output. GND 2 G Ground SCL 6 I Serial clock line for I2C. SDA 1 I/O VDD 5 P (1) Serial data line for I2C. Open-drain output that requires a pullup resistor. Positive Supply Voltage The definitions below define the functionality of the TYPE cells for each pin: • I = input • O = output • I/O = input/output • G = ground • P = power Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 3 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX VDD Applied Voltage on VDD pin –0.3 3.9 V ADDR Applied Voltage on ADDR pin –0.3 3.9 V SCL Applied Voltage on SCL pin –0.3 3.9 V SDA Applied Voltage on SDA pin –0.3 3.9 V DRDY/INT Applied Voltage on DRDY/INT pin –0.3 VDD+ 0.3 V TJ Junction temperature –40 150 °C Tstg Storage temperature –65 150 °C (1) UNIT Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) PARAMETER MIN MAX 1.62 3.6 Temperature Sensor - Operating free-air temperature –40 125 °C Relative Humidity Sensor - Operating free-air temperature –20 70 °C –40 85 °C 20 80 %RH VDD Supply voltage TTEMP TRH THEATER Integrated Heater - Operating free-air temperature RHOR (1) Relative Humidity Sensor (Non-condensing)(1) UNIT V Recommended humidity operating range is 20% to 80% RH (non-condensing) over 0°C to 60°C. Prolonged operation beyond these ranges may result in a shift of sensor reading, with slow recovery time. 6.4 Thermal Information HDC2021 THERMAL METRIC(1) WSON (DEB) UNIT 6 PINS RθJA Junction-to-ambient thermal resistance 57.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 58.7 °C/W RθJB Junction-to-board thermal resistance 27.0 °C/W ΨJT Junction-to-top characterization parameter 5.6 °C/W ΨJB Junction-to-board characterization parameter 26.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 16.5 °C/W (1) 4 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report SPRA953. Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 6.5 Electrical Characteristics TA = 30°C, VDD = 1.8 V, 20% ≤ RH ≤ 80% (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNIT ±2 ±3 %RH RELATIVE HUMIDITY SENSOR RHACC Accuracy(3) (4) (5) RHREP Repeatability(6) RHHYS Hysteresis(8) RHRT Response time(9) RHCT Conversion time(6) RHLTD Long-term drift(11) RHPSRR Supply Sensitivity accuracy 14 bit accuracy option Rising, 30% to 75% RH, t63% step(10) ±0.1 %RH ±1 %RH 6 s 9 bit accuracy option 254 µs 11 bit accuracy option 383 µs 14 bit accuracy option 640 µs ±0.25 %RH/yr VDD = 1.8V to 3.6V ±0.3 %RH/V 5°C ≤ TA ≤ 60°C ±0.2 ±0.7 °C ±0.4 °C TEMPERATURE SENSOR TEMPACC Accuracy(7) 10°C ≤ TA ≤ 35°C ±0.2 TEMPREP Repeatability(6) 14 bit accuracy option ±0.1 °C 9 bit accuracy option 208 µs TEMPCT Conversion time(6) 11 bit accuracy option 336 µs 14 bit accuracy option 594 µs TEMPPSRR Supply Sensitivity accuracy VDD = 1.8V to 3.6V 0.05 ℃/V TEMPLTD Long term drift(6) High Temperature Operating Life (HTOL) tested at 125°C for 1000 hours Normalized using Arrhenius-Peck Acceleration Model TA = 30°C, 0.7eV activation energy ±0.04 °C/yr POWER CONSUMPTION Averaged at 1 sample per RH & TEMP sensor: 14 bit second accuracy option(1) (2) Averaged at 1 sample every two seconds No Measurement (Sleep Mode) IDD Supply current µA 0.3 µA One-shot 0.05 Continuous conversion 0.1 µA 0.05 0.1 µA During RH + TEMP measurement(1) 650 890 µA During TEMP measurement only(1) 550 730 µA Startup Serial Bus Active. fSCL = 400 kHz IHEATER 0.55 Peak 200 µA Average 80 µA One-shot 12 µA Continuous conversion 12 µA Integrated heater (enabled) VDD = 3.3V; THEATER - TA = 80°C Steady state measurement 90 mA Power-on reset voltage TA = -40°C to 125°C 1.4 V SUPPLY RAIL VDD_POR SCL, SDA PINS VIH High level input voltage VIL Low level input voltage Copyright © 2020 Texas Instruments Incorporated 0.7 x VDD V 0.3 x VDD V Submit Document Feedback 5 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 PARAMETER TEST CONDITION VOL Low level output voltage IOL = 3 mA CI Input pin capacitance(12) VI = VDD or GND II Input leakage current VI = VDD, or 3.6V, or GND MIN TYP MAX 0.4 SCL 1.7 SDA 1.6 UNIT V pF pF SCL -0.1 0.1 µA SDA -0.1 0.1 µA DRDY/INT PIN VDD = 1.62V to 3.60V High Level Output Voltage (Figure 6-11) VDD = 3.3V VOH VDD = 1.8V VOL Low Level Output Voltage (Figure 6-10) IOZ_DRDY Output leakage current in Hi-Z VDD = 1.62V to 3.60V VDD = 3.3V VDD = 1.8V IOH = -100 µA. IOH = -2 mA. VDD – 0.2 V 2.4 V 1.1 V IOL = 100 µA. IOL = 2 mA. DRDY/INT Pin = Hi-Z. -0.1 0.2 V 0.4 V 0.45 V 0.1 µA (1) (2) (3) (4) Does not include I2C read/write communication or pullup resistor current through SCL and SDA Average current consumption while conversion is in progress Excludes hysteresis and long-term drift Excludes the impact of dust, gas phase solvents and other contaminents such as vapors from packaging materials, adhesives, or tapes, etc. (5) Limits apply over the humidity operating 20% to 80% RH (non-condensing) from 0°C to 60°C (6) This parameter is specified by design and/or characterization and is not tested in production (7) Over-temperature performance is specified by design and/or characterization (8) The hysteresis value is the difference between the RH measurement in a rising and falling RH environment, at a specific RH point (9) Actual response times will vary dependent on system thermal mass and air-flow (10) Time for the RH output to change by 63% of the total RH change after a step change in environmental humidity (11) Drift due to aging effects at typical conditions (30°C and 20% to 50% RH). This value may be impacted by dust, vaporized solvents, outgassing tapes, adhesives, packaging materials, etc. (12) Guaranteed by design/characterization; not production tested 6.6 Switching Characteristics TA = -40°C to 125°C and VDD = 1.62V to 3.60V (unless otherwise noted) PARAMETER MIN TYP MAX UNIT 400 kHz SCL, SDA PINS fSCL SCL clock frequency(1) 10 tLOW LOW period of the SCL clock(1) 1.3 µs tHIGH High period of the SCL clock(1) tSU;DAT Setup Time: Data(1) tHD;DAT Hold Time: tSU;STA Set-up time: Repeated START condition(1) condition(1) (2) tHD;STA Hold time: Repeated START tSU;STO Set-up time: STOP condition(1) µs ns 0 µs 0.6 µs 0.6 µs 0.6 µs tR;SCL Rise Time: SCL(1) 300 ns tR;SDA Rise Time: SDA(1) 300 ns tF;SCL Fall Time: SCL(1) 20*(VDD/5.5V) 300 ns tF;SDA Fall Time: SDA(1) 20*(VDD/5.5V) 300 ns tBUF Bus free time between a STOP and START tVD;DAT Data valid time(1) (3) tVD;ACK 6 Data(1) 0.6 100 Data valid acknowledge Submit Document Feedback time(1) (4) condition(1) 1.3 µs 0.9 µs 0.9 µs Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 PARAMETER MIN TYP MAX UNIT SUPPLY RAIL Power-On Reset or Software Reset Duration(1) tPOR (1) (2) (3) (4) 3.5 ms This parameter is specified by design and/or characterization and is not tested in production After this period, the first clock pulse is generated Time for data signal from SCL low to SDA output (high to low, depending on which is worse) Time for acknowledement signal from SCL low to SDA output (high or low, depending on which is worse) 6.7 Timing Diagram S P tLOW tR tHD:DAT tHIGH SCL VIH(MIN) VIL(MAX) tF tHD:STA tSU:DAT Sr P tSU:STA tSU:STO VIH(MIN) VIL(MAX) SDA tBUF Figure 6-1. I2C Timing Diagram Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 7 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 6.8 Typical Characteristics Unless otherwise noted, TA = 30°C, VDD = 1.8 V. 1 10 Typical 9 0.9 8 0.8 7 0.7 Accuracy (r°C) Accuracy (r%RH) Typical 6 5 4 0.6 0.5 0.4 0.3 3 0.2 2 0.1 1 0 -40 0 0 10 20 30 40 50 60 70 80 90 100 -25 -10 5 20 Figure 6-2. RH Accuracy vs. RH Set Point 65 80 95 110 125 800 T = -40°C T = -20°C T = 0°C T = 25°C T = 85°C T = 125°C 750 700 750 700 VDD = 1.71V VDD = 1.8V VDD = 2.5V VDD = 3V VDD = 3.3V VDD = 3.6V 650 IDD (nA) 650 IDD (nA) 50 Figure 6-3. Temperature Accuracy vs. Temperature Set Point 800 600 600 550 550 500 500 450 450 400 1.6 35 Temp (°C) RH (%RH) 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 400 -40 3.6 -15 10 35 60 85 110 125 Temp (°C) VDD (V) Figure 6-4. Supply Current vs. Supply Voltage, Figure 6-5. Supply Current vs. Temperature, Average at 1 Measurement/Second, RH (11-Bit) and Average at 1 Measurement/Second, RH (11-Bit) and Temperature (11-Bit) Temperature (11-Bit) 400 400 T = -40°C T = -20°C T = 0°C T = 25°C T = 50°C T = 85°C T = 125°C 350 300 350 300 250 IDD (nA) IDD (nA) 250 200 150 100 100 50 50 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VDD (V) Figure 6-6. Supply Current vs. Supply Voltage, Sleep Mode 8 200 150 0 1.6 VDD = 1.71V VDD = 1.8V VDD = 2.5V VDD = 3V VDD = 3.3V VDD = 3.6V Submit Document Feedback 0 -40 -15 10 35 60 85 110 125 Temp (°C) Figure 6-7. Supply Current vs. Temperature, Sleep Mode Copyright © 2020 Texas Instruments Incorporated www.ti.com Figure 6-8. Supply Sensitivity- Humidity Measurement Accuracy Figure 6-10. Average Measurement Sensitivity vs. Accuracy Option Figure 6-12. Output Voltage (DRDY/INT Pin) vs. Output Current (Logic High) Copyright © 2020 Texas Instruments Incorporated HDC2021 SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 Figure 6-9. Supply Sensitivity- Temperature Measurement Accuracy Figure 6-11. Output Voltage (DRDY/INT Pin) vs. Output Current (Logic Low) Figure 6-13. Sampling Period Variation (Continuous Conversion Mode) vs. Temperature Submit Document Feedback 9 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7 Detailed Description 7.1 Overview The HDC2021 is a highly integrated digital humidity and temperature sensor that incorporates both humiditysensing and temperature-sensing elements, an analog-to-digital converter, calibration memory, and an I2C interface that are all contained in a 3.00-mm × 3.00-mm, 6-pin WSON package. The HDC2021 provides excellent measurement accuracy with very low power consumption and features configurable accuracy options for both the humidity and temperature sensors: • Temperature accuracy options: 9, 11, or 14 bits • Humidity accuracy options: 9, 11, or 14 bits The conversion time during measurements is dependent upon the configured accuracy option for humidity and temperature. The flexable programmability allows the device to be configured for optimal measurement accuracy and power consumption. The HDC2021 device incorporates a state-of-the-art polymer dielectric to provide capacitive-sensing measurements. As with most relative humidity sensors that include this type of technology, the user must meet these application requirements to ensure optimal device performance for the sensing element: • • • • Follow the correct storage and handling procedures during board assembly. See Humidity Sensor: Storage and Handling Guidelines. (SNIA025) for these guidelines. Protect the sensor from contaminants during operation. Reduce prolonged exposure to both high temperature and humidity extremes that may impact sensor accuracy. Follow the correct layout guidelines for best performance. See Optimizing Placement and Routing for Humidity Sensors (SNAA297) for these guidelines. 7.2 Functional Block Diagram VDD HDC2021 SCL RH Sensor SDA ADC Registers + Logic Temperature Sensor I2C DRDY/INT ADDR Calibration GND 10 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated www.ti.com HDC2021 SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.3 Feature Description 7.3.1 Factory Installed Polyimide Tape A polyimide tape covers the opening of the humidity sensor element. The tape protects the humidity sensor element from pollutants that can be produced as part of the manufacturing process, such as SMT assembly, PCB board wash, and conformal coating. The tape must be removed after the final stages of assembly for accurate measurement of relative humidity in the ambient environment. The tape can withstand at least three standard reflow cycles. To remove the polyimide tape from the humidity sensor element, TI recommends to use a ESD-safe tweezer to grip the adhesive free tab in the lower right corner, then slowly peel from the bottom right corner towards the top left corner (pin 1 designator) in an upward direction (as opposed to across the surface). This will help to reduce the risk of scratching the humidity sensor element. 7.3.2 Sleep Mode Power Consumption One key feature of the HDC2021 is the low power consumption designed for battery-powered or energyharvesting applications. In these applications, the HDC2021 can be put into sleep mode with a typical current consumption of 50 nA, minimizing the average power consumption and self-heating. The sleep mode is the default operating mode upon power-on reset. 7.3.3 Measurement Modes: One-Shot vs. Continuous Conversion There are two types of measurement modes are available on the HDC2021: one-shot mode and continuous conversion mode. During one-shot mode, each measurement is initiated through an I2C command on an as-needed basis. After the measurement is completed, the device goes back to the sleep mode automatically until another I2C command to initiate a measurement is received. The HDC2021 can also be configured to perform measurements on a periodic basis in continuous conversion mode to eliminate the need to initiate multiple measurement requests through I2C commands. The user can adjust the Device Configuration register to select one of 7 different sampling rates spanning from 1 sample every 2 minutes to 5 samples every second. In continuous conversion mode, the HDC2021 periodically wakes up from the sleep mode based on the selected sampling rate. 7.3.4 Heater The HDC2021 includes an integrated heating element that can be switched on briefly to prevent or remove any condensation that may build up in high humidity environments. Additionally, the heater can be used to verify functionally of the integrated temperature sensor. If the dew point of an application is continuously calculated and tracked, and the application firmware is written such that it can detect a potential condensing situation (or a period of it), a software subroutine can be run, as a precautionary measure, to activate the onboard heater as an attempt to remove the condensate. The device shall continue to measure and track the %RH level after the heater is activated. Once the %RH reading goes to zero % (or near it), the heater can be subsequently turned off, allowing the device to cool down. Cooling of the device can takes minutes and temperature measurement shall continue to be performed to ensure the device goes back to normal operating condition before restarting the device for normal service. Note once the heater activates, the operating temperature of the device shall be limited to below 100°C. The heater has a typical current draw of 90 mA at 3.3-V operation and 55 mA at 1.8-V operation. It is important to recognize that the integrated heater evaporates condensate that forms on top of the humidity sensor, but does not remove any dissolved contaminants. Any contaminant residue, if present, may impact the accuracy of the humidity sensor. Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 11 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.3.5 Interrupt Note When multiple bits are enabled, the DRDY/INT pin can only reflect the status of one interrupt bit at a time. The DRDY/INT pin DOES NOT function as the logical ‘OR’ of interrupt bits that have been enabled. The highest priority is given to TH_ENABLE bit, followed by TL_ENABLE, HH_ENABLE, and HL_ENABLE bits in descending order. Therefore, programming recommendations are provided as below. Note the DataReady (DRDY) interrupt has the same priority as the winner of the other 4 interrupts (TH_ENABLE, TL_ENABLE, HH_ENABLE, and HL_ENABLE). • The DRDY/INT will track the HL_ENABLE, if enabled, and all other ENABLE bits are disabled. • The DRDY/INT will track the HH_ENABLE, if enabled, and the TH_ENABLE and TL_ENABLE are disabled. • The DRDY/INT will track the TL_ENABLE, if enabled, and the TH_ENABLE is disabled. • The DRDY/INT will track the TH_ENABLE, if enabled, and is independent of other ENABLE bit settings. 12 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.3.5.1 DataReady (DRDY) Interrupt When DRDY_ENABLE is enabled in the Interrupt Configuration register (address 0x07), and a humidity and/or temperature conversion is complete, the DRDY_STATUS bit of the Status register (address 0x04) is asserts to 1. To enable hardware interrupt generation on the DRDY/INT pin of HDC2021, the DRDY/INT_EN bit must be set to 1 and the INT_MODE bit must be set to 0 in the Device Configuration register (address 0x0E). If these bits are not configured, the DRDY/INT pin is kept in high impedance regardless of the interrupt status. The INT_POL bit of this register defines the interrupt polarity of the DRDY/INT pin. Figure 7-1 and Figure 7-2 display the output behavior of the DRDY/INT pin for both interrupt polarity cases: INT_POL= 0 and INT_POL= 1. The interrupt is cleared upon reading the Status register (address 0x04). Previous Data New Data Available 1 DRDY_STATUS 0 VDD DRDY/INT [INT_POL = 1] 0 Figure 7-1. Data Ready Interrupt - Active High (INT_POL = 1) Previous Data New Data Available 1 DRDY_STATUS 0 VDD DRDY/INT [INT_POL = 0] 0 Figure 7-2. Data Ready Interrupt - Active Low (INT_POL = 0) Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 13 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.3.5.2 Threshold Interrupt 7.3.5.2.1 Temperature High (TH) When TH_ENABLE is enabled in the Interrupt Configuration register (address 0x07) and the temperature is over the programmed threshold level stored in the Temperature Threshold HIGH register (address 0x0B), the TH_STATUS bit of the Status register (address 0x04) asserts to 1. The interrupt is cleared upon reading the Status register. The polarity and interrupt mode of the TH_STATUS bit and the DRDY/INT pin can be configured through the INT_POL and INT_MODE bits of the Device Configuration Register (address 0x0E). The INT_MODE bit sets the threshold to either comparator mode or clear-on-read mode. When the INT_MODE bit is set to 0, the TH_STATUS bit remains set to 1 until it is read. When the INT_MODE bit is set to 1, the TH_STATUS bit status reflects the current temperature conversion result. The polarity of the DRDY/INT pin is set by INT_POL bit. T [°C] Temperature Threshold High Time TH_STATUS [INT_MODE = 0] 1 0 DRDY/INT pin [INT_MODE = 0] [INT_POL = 1] VDD DRDY/INT pin [INT_MODE = 0] [INT_POL = 0] VDD TH_STATUS [INT_MODE = 1] Status Register Read 0 0 1 0 DRDY/INT pin [INT_MODE = 1] [INT_POL = 1] VDD DRDY/INT pin [INT_MODE = 1] [INT_POL = 0] VDD 0 0 Figure 7-3. INTERRUPT on Threshold - Temperature High 14 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.3.5.2.2 Temperature Low (TL) When TL_ENABLE is enabled in the Interrupt Configuration register (address 0x07) and the temperature is under the programmed threshold level stored in the Temperature Threshold LOW register (address 0x0C), the TL_STATUS bit of the Status register (address 0x04) asserts to 1. The interrupt is cleared upon reading the Status register. The polarity and interrupt mode of the TL_STATUS bit and the DRDY/INT pin can be configured through the INT_POL and INT_MODE bits of the Device Configuration Register (address 0x0E). The INT_MODE bit sets the threshold to either comparator mode or clear-on-read mode. When the INT_MODE bit is set to 0, the TL_STATUS bit remains set to 1 until it is read. When the INT_MODE bit is set to 1, the TL_STATUS bit status reflects the current temperature conversion result. The polarity of the DRDY/INT pin is set by INT_POL bit. T [°C] Temperature Threshold Low Time TL_STATUS [INT_MODE = 0] 1 Status Register Read 0 V DRDY/INT pin [INT_MODE = 0] [INT_POL = 1] 0 DD V DRDY/INT pin [INT_MODE = 0] [INT_POL = 0] 0 DD TL_STATUS [INT_MODE = 1] 1 0 VDD DRDY/INT pin [INT_MODE = 1] [INT_POL = 1] 0 V DRDY/INT pin [INT_MODE = 1] [INT_POL = 0] 0 DD Figure 7-4. INTERRUPT on Threshold - Temperature Low Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 15 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.3.5.2.3 Humidity High (HH) When HH_ENABLE is enabled in the Interrupt Configuration register (address 0x07) and the temperature is under the programmed threshold level stored in the Humidity Threshold HIGH register (address 0x0D), the HH_STATUS bit of the Status register (address 0x04) asserts to 1. The interrupt is cleared upon reading the Status register. The polarity and interrupt mode of the HH_STATUS bit and the DRDY/INT pin can be configured through the INT_POL and INT_MODE bits of the Device Configuration Register (address 0x0E). The INT_MODE bit sets the threshold to either comparator mode or clear-on-read mode. When the INT_MODE bit is set to 0, the HH_STATUS bit remains set to 1 until it is read. When the INT_MODE bit is set to 1, the HH_STATUS bit status reflects the current temperature conversion result. The polarity of the DRDY/INT pin is set by INT_POL bit. H [%RH] Humidity Threshold High Time 1 HH_STATUS [INT_MODE = 0] Status Register Read 0 VDD DRDY/INT pin [INT_MODE = 0] [INT_POL = 1] 0 VDD DRDY/INT pin [INT_MODE = 0] [INT_POL = 0] 0 HH_STATUS [INT_MODE = 1] 1 DRDY/INT pin [INT_MODE = 1] [INT_POL = 1] VDD DRDY/INT pin [INT_MODE = 1] [INT_POL = 0] VDD 0 0 0 Figure 7-5. INTERRUPT on Threshold - Humidity High 16 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.3.5.2.4 Humidity Low (HL) When HL_ENABLE is enabled in the Interrupt Configuration register (address 0x07) and the temperature is under the programmed threshold level stored in the Humidity Threshold HIGH register (address 0x0E), the HL_STATUS bit of the Status register (address 0x04) asserts to 1. The interrupt is cleared upon reading the Status register. The polarity and interrupt mode of the HL_STATUS bit and the DRDY/INT pin can be configured through the INT_POL and INT_MODE bits of the Device Configuration Register (address 0x0E). The INT_MODE bit sets the threshold to either comparator mode or clear-on-read mode. When the INT_MODE bit is set to 0, the HL_STATUS bit remains set to 1 until it is read. When the INT_MODE bit is set to 1, the HL_STATUS bit status reflects the current temperature conversion result. The polarity of the DRDY/INT pin is set by INT_POL bit. H [%RH] Humidity Threshold Low Time 1 HL_STATUS [INT_MODE = 0] DRDY/INT pin [INT_MODE = 0] [INT_POL = 1] DRDY/INT pin [INT_MODE = 0] [INT_POL = 0] HL_STATUS [INT_MODE = 1] Status Register Read 0 VDD 0 VDD 0 1 0 DRDY/INT pin [INT_MODE = 1] [INT_POL = 1] VDD DRDY/INT pin [INT_MODE = 1] [INT_POL = 0] VDD 0 0 Figure 7-6. INTERRUPT on Threshold - Humidity Low Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 17 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.4 Device Functional Modes The HDC2021 has two modes of operation: sleep mode and measurement mode. 7.4.1 Sleep Mode vs. Measurement Mode After power up, the HDC2021 defaults to sleep mode and waits for an I2C instruction to set programmable conversion times, trigger a measurement or conversion, or read or write valid data. When a measurement is triggered, the HDC2021 switches to measurement mode that converts temperature or humidity values from integrated sensors through an internal ADC and stores the information in their respective data registers. The DRDY/INT pin can be monitored to verify if data is ready after measurement conversion. The DRDY/INT pin polarity and interrupt mode are set according to the configuration of the Interrupt Configuration (address 0x07) and Device Configuration (address: 0x0E) registers. After completing the conversion, the HDC2021 returns to sleep mode. 7.5 Programming 7.5.1 I2C Serial Bus Address Configuration To communicate with the HDC2021, the master must first address slave devices through a slave address byte. The slave address byte consists of seven address bits and a direction bit that indicates the intent to execute a read or write operation. The HDC2021 features an address pin (ADDR) to allow up to 2 devices to be addressed on a single bus. Table 7-1 describes the pin logic levels used to connect up to two devices, with 'X' representing the read-write (R/W) bit. The ADDR pin shall be configured before any activity on the interface occurs and remain constant while the device is powered up. Table 7-1. HDC2021 I2C Slave Address ADDR ADDRESS GND or floating 1000000X VDD 1000001X Note that the ADDR is recommended not to be left floating if the device is to be used in noisy environment. 7.5.2 I2C Interface The HDC2021 operates only as a slave device on the I2C bus interface. It is not allowed to have multiple devices on the same I2C bus with the same address. Connection to the bus is made through the SDA and SCL pins. The SDA and SCL pins feature integrated spike-suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. After power-up, the sensor needs at least 3.5 ms to be ready to start RH and temperature measurement. After power-up the device defaults in sleep mode until a communication or measurement is performed. All data bytes are transmitted MSB first. 7.5.3 Read and Write Operations Register content of the HDC2021 can be accessed and modified through a pointer mechanism using a pointer register. The user can write a register address to the pointer register to access a particular register on the device. The value for the pointer register is the first byte transferred after the slave address byte with the R/W bit low (refer to Table 7-2). Every write operation to the device requires a value for the pointer register. When reading from the device, the last value stored in the pointer register by a write operation is used to determine which register is read during a read operation. To change the register pointer for a read operation, a new value must be written to the pointer register. The user can issue an address byte with the R/W bit low, followed by the pointer register byte to write a new value for the pointer register (refer to Table 7-4). No additional data is required. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. The device also support Multibyte write and Multibyte read operations of which the register pointer is incremented automatically until the master issues a STOP (for Multibyte write) or NACK (for Multibyte read). 18 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 Note all data transferred are sent MSB first. A write operation to a read-only register such as DEVICE ID or MANUFACTURER ID returns a NACK after each data byte. A read or write operation to an unused register returns a NACK after the pointer register byte, and a read or write operation with incorrect device slave address returns a NACK after the device slave address byte. Table 7-2. Write Single Byte Master Device Slave address (W) 100000X0 START Register Pointer Slave ACK DATA STOP ACK ACK Table 7-3. Write Multibyte Master START Device Slave address (W) 100000X0 Slave Register Pointer ACK DATA DATA ACK ……… ACK STOP ACK Table 7-4. Read Single Byte Master START Device Slave address (W) 100000X0 Slave Register Pointer ACK Start Device Slave address (R) 100000X1 NACK ACK ACK STOP DATA Table 7-5. Read Multibyte Master START Slave Device Slave address (W) 100000X0 Register Pointer ACK Copyright © 2020 Texas Instruments Incorporated Start ACK Device Slave address (R) 100000X1 ACK ACK DATA ACK …… NACK STOP DATA Submit Document Feedback 19 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6 Register Maps The HDC2021 contains registers that hold configuration information, temperature and humidity measurement results, and status information. Table 7-6. Register Map 20 ADDRESS (HEX) NAME RESET VALUE (HEX) DESCRIPTION 0x00 TEMPERATURE LOW 0 Temperature data [7:0] 0x01 TEMPERATURE HIGH 0 Temperature data [15:8] 0x02 HUMIDITY LOW 0 Humidity data [7:0] 0x03 HUMIDITY HIGH 0 Humidity data [15:8] 0x04 STATUS 0 DataReady and threshold status 0x05 TEMPERATURE MAX 0 Maximum measured temperature (one-shot mode only) 0x06 HUMIDITY MAX 0 Maximum measured humidity (one-shot mode only) 0x07 INTERRUPT ENABLE 0 Interrupt enable 0x08 TEMP_OFFSET_ADJUST 0 Temperature offset adjustment 0x09 HUM_OFFSET_ADJUST 0 Humidity offset adjustment 0x0A TEMP_THR_L 1 Temperature threshold low 0x0B TEMP_THR_H FF Temperature threshold high 0x0C RH_THR_L 0 Humidity threshold low 0x0D RH_THR_H FF Humidity threshold high 0x0E DEVICE CONFIGURATION 0 Soft reset and interrupt reporting configuration 0x0F MEASUREMENT CONFIGURATION 0 Device measurement configuration 0xFC MANUFACTURER ID LOW 49 Manufacturer ID lower-byte 0xFD MANUFACTURER ID HIGH 54 Manufacturer ID higher-byte 0xFE DEVICE ID LOW D0 Device ID lower-byte 0xFF DEVICE ID HIGH 7 Device ID higher0byte Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.1 Temperature Low (Address: 0x00) Table 7-7. Temperature Low Register (Address 0x00) 7 6 5 4 3 2 1 0 TEMP[7:0] Table 7-8. Temperature Low Register Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE TEMPERATURE [7:0] R DESCRIPTION Temperature data- lower byte 0 The temperature data is a 16-bits value that spans accross the Temperature Low (address 0x00) and Temperature High (address 0x01) registers. The Temperature Low register containts the lower-byte of the 16-bits temperature data. The temperature can be calculated from the output data using Equation 1: Temperature (qC) § TEMPERATURE [15 : 0] · ¨ ¸ u 165 40 © ¹ 216 (1) 7.6.2 Temperature High (Address: 0x01) Table 7-9. Temperature High Register (Address 0x01) 7 6 5 4 3 2 1 0 TEMP[15:8] Table 7-10. Temperature High Register Field Descriptions BIT FIELD [15:8] TEMPERATURE [15:8] RESET (HEX) TYPE R 0 DESCRIPTION Temperature data- higher byte The temperature data is a 16-bits value that spans accross the Temperature Low (address 0x00) and Temperature High (address 0x01) registers. The Temperature High register containts the higher-byte of the 16bits temperature data. The temperature can be calculated from the output data using Equation 2: Temperature (qC) § TEMPERATURE [15 : 0] · ¨ ¸ u 165 40 © ¹ 216 Copyright © 2020 Texas Instruments Incorporated (2) Submit Document Feedback 21 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.3 Humidity Low (Address 0x02) Table 7-11. Humidity Low Register (Address 0x02) 7 6 5 4 3 2 1 0 HUMIDITY[7:0] Table 7-12. Humidity Low Register Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE HUMIDITY [7:0] R DESCRIPTION Humidity data- lower byte 0 The humidity data is a 16-bits value that spans accross the Humidity Low (address 0x02) and Humidity High (address 0x03) registers. The Humidity Low register containts the lower-byte of the 16-bits humidity data. The humidity can be calculated from the output data using Equation 3: § HUMIDITY [15 : 0] · ¨ ¸ u 100 216 © ¹ Humidity (%RH) (3) 7.6.4 Humidity High (Address 0x03) Table 7-13. Humidity High Register (Address 0x03) 7 6 5 4 3 2 1 0 HUMIDITY[15:8] Table 7-14. Humidity High Register Field Descriptions BIT FIELD [15:8] HUMIDITY[15:8] RESET (HEX) TYPE R 0 DESCRIPTION Humidity data- higher byte The humidity data is a 16-bits value that spans accross the Humidity Low (address 0x02) and Humidity High (address 0x03) registers. The Humidity High register containts the higher-byte of the 16-bits temperature data. The humidity can be calculated from the output data using Equation 4: Humidity (%RH) 22 § HUMIDITY [15 : 0] · ¨ ¸ u 100 216 © ¹ Submit Document Feedback (4) Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.5 Status (Address 0x04) Table 7-15. Status Register (Address 0x04) 7 6 5 4 3 2 1 0 DRDY_STATUS TH_STATUS TL_STATUS HH_STATUS HL_STATUS RES RES RES Table 7-16. Status Register Field Descriptions BIT FIELD RESET (HEX) TYPE DESCRIPTION 7 DRDY_STATUS R 0 DataReady bit status 0 = Data Not Ready 1 = Data Ready 6 TH_STATUS R 0 Temperature threshold HIGH Interrupt status 0 = No interrupt 1 = Interrupt 5 TL_STATUS R 0 Temperature threshold LOW Interrupt status 0 = No interrupt 1 = Interrupt 4 HH_STATUS R 0 Humidity threshold HIGH Interrupt status 0 = No interrupt 1 = Interrupt 3 HL_STATUS R 0 Humidity threshold LOW Interrupt status 0 = No interrupt 1 = Interrupt 2 RES 0 Reserved 1 RES 0 Reserved 0 RES 0 Reserved The DRDY_STATUS bit indicates that temperature and/or humidity conversion is completed, and its behavior is defined by the Device Configuration Register (0x0E). This bit is cleared when the any of the following registers is read: Temperature Low (0x00), Temperature High (0x01), Humidity Low (0x02), Humidity High (0x03), and Status (0x04). The bit is also cleared upon RESET. The TL_STATUS bit indicates that the Temperature Threshold LOW value is exceeded, and its behavior is defined by the Device Configuration Register (0x0E). The bit is cleared when the Status Register (0x04) is read. The bit is also cleared upon RESET. The TH_STATUS bit indicates that the Temperature Threshold HIGH value is exceeded, and its behavior is defined by the 0x0E Configuration register value. The bit is cleared when the Status Register (0x04) is read. The bit is also cleared upon RESET. The HH_STATUS bit indicates that the Humidity Threshold HIGH value is exceeded, and its behavior is defined by the Device Configuration Register (0x0E). The bit is cleared when the Status Register (0x04) is read. The bit is also cleared upon RESET. The HL_STATUS bit indicates that the Humidity Threshold LOW value is exceeded, and its behavior is defined by the Device Configuration Register (0x0E). The bit is cleared when the Status Register (0x04) is read. The bit is also cleared upon RESET. Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 23 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.6 Temperature MAX (Address: 0x05) Table 7-17. Temperature MAX Register (Address: 0x05) 7 6 5 4 3 2 1 0 TEMPERATUREMAX[7:0] Table 7-18. Temperature Max Field Descriptions BIT FIELD [7:0] RESET [HEX] TYPE TEMPERATUREMAX[7:0] R DESCRIPTION Maximum temperature measurement data (one-shot mode only) 0 This register implements temperature peak detector function. The register stores the highest temperature value converted after the last reset (power-on reset or software reset). The temperature can be calculated from the output data using Equation 5: Temperature (qC) § TEMPERATURE [7 : 0] · ¨ ¸ u 165 40 28 © ¹ (5) 7.6.7 Humidity MAX (Address: 0x06) Table 7-19. Humidity MAX Register (Address: 0x06) 7 6 5 4 3 2 1 0 HUMIDITYMAX[7:0] Table 7-20. Humidity MAX Field Descriptions BIT RESET FIELD [7:0] HUMIDITYMAX[7:0] (HEX) TYPE R 0 DESCRIPTION Maximum humidity measurement data (one-shot mode only) This register implements humidity peak detector function. The register stores the highest humidity value converted after the last reset (power-on reset or software reset). The humidity can be calculated from the output data using Equation 6: Humidity (%RH) 24 § 100 · HUMIDITYMAX >7 : 0 @ u ¨ 8 ¸ © 2 ¹ Submit Document Feedback (6) Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.8 Interrupt Enable (Address: 0x07) Table 7-21. Interrupt Enable Register (Address: 0x07) 7 6 5 4 3 2 1 0 DRDY_ENABLE TH_ENABLE TL_ENABLE HH_ENABLE HL_ENABLE RES RES RES Table 7-22. Interrupt Enable Register Field Descriptions BIT FIELD RESET (HEX) TYPE DESCRIPTION 7 DRDY_ENABLE R/W 0 DataReady Interrupt enable 0 = DataReady Interrupt disabled 1 = DataReady Interrupt enabled 6 TH_ENABLE R/W 0 Temperature threshold HIGH Interrupt enable 0 = Temperature high Interrupt disabled 1 = Temperature high Interrupt enabled 5 TL_ENABLE R/W 0 Temperature threshold LOW Interrupt enable 0 = Temperature low Interrupt disabled 1 = Temperature low Interrupt enabled 4 HH_ENABLE R/W 0 Humidity threshold HIGH Interrupt enable 0 = Humidity high Interrupt disabled 1 = Humidity high Interrupt enabled 3 HL_ENABLE R/W 0 Humidity threshold LOW Interrupt enable 0 = Humidity low Interrupt disabled 1 = Humidity low Interrupt enabled 2 RES 0 Reserved 1 RES 0 Reserved 0 RES 0 Reserved The Interrupt Enable register enables or disables interrupt asserstion on the DRDY/INT pin from DataReady, Temperature threshold High, Temperature threshold Low, Humidity threshold High, or Humidity threshold Low. The Status register (address 0x04) content is unaffected by this register. Note the settings of this regsiter only takes effect if the DRDY/INT_EN bit of the Device Configuration register (address 0x0E) is set to 1. Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 25 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.9 Temperature Offset Adjustment (Address: 0x08) Table 7-23. Temperature Offset Adjustment Register (Address: 0x08) 7 6 5 4 3 2 1 0 TEMP_OFFSET_ADJUST[7:0] Table 7-24. Temperature Offset Adjustment Register Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE TEMP_OFFSET_ADJUST [7:0] R/W 0 DESCRIPTION Temperature offset adjustment value. The value is added to the converted temperature data. The reported temperature conversion data can be adjusted by programming the Temperature Offset Adjustment Register. The following table summarizes the equivalent offset value added or subtracted for each bit of the register: 7 6 5 4 3 2 1 0 –20.63°C +10.31°C +5.16°C +2.58°C +1.29°C +0.64°C +0.32°C +0.16°C The value is added to the converted temperature value for offset adjustment as shown in Figure 7-7. Converted Value + Temperature Output User Temperature Offset Figure 7-7. Temperature Output Calculation The resulting temperature offset is a summation of the register bits that have been enabled (that is, programmed to 1). Some examples: 1. Programming TEMP_OFFSET_ADJUST to 00000001 adjusts the reported temperature by +0.16°C. 2. Programming TEMP_OFFSET_ADJUST to 00000111 adjusts the reported temperature by +1.12°C. 3. Programming TEMP_OFFSET_ADJUST to 00001101 adjusts the reported temperature by +2.08°C. 4. Programming TEMP_OFFSET_ADJUST to 11111111 adjusts the reported temperature by –0.16°C. 5. Programming TEMP_OFFSET_ADJUST to 11111001 adjusts the reported temperature by –1.12°C. 6. Programming TEMP_OFFSET_ADJUST to 11110011 adjusts the reported temperature by –2.08°C. 26 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.10 Humidity Offset Adjustment (Address 0x09) Table 7-25. Humidity Offset Adjustment Register (Address: 0x09) 7 6 5 4 3 2 1 0 HUM_OFFSET_ADJUST [7:0] Table 7-26. Humidity Offset Adjustment Register Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE HUM_OFFSET_ADJUST [7:0] R/W 0 DESCRIPTION Humidity offset adjustment value. The value is added to the converted humidity data. The reported humidity conversion data can be adjusted by programming the Humidity Offset Adjustment Register. The following table summarizes the equivalent offset value added or subtracted for each bit of the register: 7 6 5 4 3 2 1 0 –25%RH +12.5%RH +6.3%RH +3.1%RH +1.6%RH +0.8%RH +0.4%RH +0.2%RH The value is added to the converted humidity value for offset adjustment as shown in Figure 7-8 Converted Value + Humidity Output User Humidity Offset Figure 7-8. Humidity Output Calculation The resulting humidity offset is a summation of the register bits that have been enabled (that is, programmed to 1). Some examples: 1. Programming HUM_OFFSET_ADJUST to 00000001 adjusts the reported humidity by +0.20%RH. 2. Programming HUM_OFFSET_ADJUST to 00000101 adjusts the reported humidity by +1.00%RH. 3. Programming HUM_OFFSET_ADJUST to 00001010 adjusts the reported humidity by +2.00%RH. 4. Programming HUM_OFFSET_ADJUST to 11111111 adjusts the reported humidity by –0.10%RH. 5. Programming HUM_OFFSET_ADJUST to 11111011 adjusts the reported humidity by –0.90%RH. 6. Programming HUM_OFFSET_ADJUST to 11110101 adjusts the reported humidity by –2.10%RH. Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 27 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.11 Temperature Threshold LOW (Address 0x0A) Table 7-27. Temperature Threshold LOW Register (Address: 0x0A) 7 6 5 4 3 2 1 0 TEMP_THRES_LOW[7:0] Table 7-28. Temperature Threshold LOW Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE TEMP_THRES_LOW[7:0] R/W DESCRIPTION Temperature threshold LOW value 1 The Temperature Threshold LOW register configures the temperature threshold setting for interrupt generation if the TL_ENABLE interrupt is enabled. The threshold value can be calculated using Equation 7: Temperature threshold low (qC) § TEMP_THRES_LOW [7 : 0] · ¨ ¸ u 165 40 © ¹ 28 (7) 7.6.12 Temperature Threshold HIGH (Address 0x0B) Table 7-29. Temperature Threshold HIGH Register (Address 0x0B) 7 6 5 4 3 2 1 0 TEMP_THRES_HIGH[7:0] Table 7-30. Temperature Threshold HIGH Register Field Descriptions BIT FIELD [7:0] TEMP_THRES_HIGH[7:0] TYPE R/W RESET (HEX) FF DESCRIPTION Temperature threshold HIGH value The Temperature Threshold HIGH register configures the temperature threshold setting for interrupt generation if the TH_ENABLE interrupt is enabled. The threshold value can be calculated using Equation 8: Temperature threshold high (qC) 28 Submit Document Feedback § TEMP_THRES_HIGH [7 : 0] · ¨ ¸ u 165 40 © ¹ 28 (8) Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.13 Humidity Threshold LOW (Address 0x0C) Table 7-31. Humidity Threshold LOW Register (Address 0x0C) 7 6 5 4 3 2 1 0 HUMI_THRES_LOW[7:0] Table 7-32. Humidity Threshold LOW Register Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE HUMI_THRES_LOW[7:0] R/W 0 DESCRIPTION Humidity threshold LOW value The Humidity Threshold LOW register configures the humidity threshold setting for interrupt generation if the HL_ENABLE interrupt is enabled. The threshold value can be calculated with using Equation 9: Humidity threashold low (%RH) § HUMI_THRES_LOW [7 : 0] · ¨ ¸ u 100 28 © ¹ (9) 7.6.14 Humidity Threshold HIGH (Address 0x0D) Table 7-33. Humidity Threshold HIGH Register (Address: 0x0D) 7 6 5 4 3 2 1 0 HUMI_THRES_HIGH[7:0] Table 7-34. Humidity Threshold HIGH Register Field Descriptions BIT FIELD [7:0] HUMI_THRES_HIGH[7:0] TYPE R/W RESET (HEX) FF DESCRIPTION Humidity threshold HIGH value The Humidity Threshold HIGH register configures the temperature threshold setting for interrupt generation if the HH_ENABLE interrupt is enabled. The threshold value can be calculated using Equation 10: Humidity threshold high (%RH) Copyright © 2020 Texas Instruments Incorporated § HUMI_THRES_HIGH [7 : 0] · ¨ ¸ u 100 © ¹ 28 (10) Submit Document Feedback 29 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.15 Device Configuration (Address: 0x0E) Table 7-35. Device Configuration Register (Address: 0x0E) 7 6 5 SOFT_RES 4 CC[2:0] 3 2 1 0 HEAT_EN DRDY/INT_EN INT_POL INT_MODE Table 7-36. Device Configuration Register Field Descriptions BIT FIELD 7 DESCRIPTION SOFT_RES R/W 0 0 = Normal Operation 1 = Trigger a Soft Reset. This bit self-clears after RESET. CC[2:0] R/W 0 Configure the measurement mode to one-shot or continuous conversion. The bits also allow sampling frequency to be programmed in continuous conversion mode. 000 = Continuous conversion disabled (one-shot mode) 001 = 1/120Hz (1 samples every 2 minutes) 010 = 1/60Hz (1 samples every minute) 011 = 0.1Hz (1 samples every 10 seconds) 100 = 0.2 Hz (1 samples every 5 second) 101 = 1Hz (1 samples every second) 110 = 2Hz (2 samples every second) 111 = 5Hz (5 samples every second) 3 HEAT_EN R/W 0 0 = Heater off 1 = Heater on 2 DRDY/INT_EN R/W 0 DRDY/INT_EN pin configuration 0 = High Z 1 = Enable 1 INT_POL R/W 0 Interrupt polarity 0 = Active Low 1 = Active High 0 INT_MODE R/W 0 Interrupt mode 0 = Clear-on-read mode 1 = Comparator mode [6:4] 30 RESET (HEX) TYPE Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.16 Measurement Configuration (Address: 0x0F) Table 7-37. Measurement Configuration Register (Address: 0x0F) 7 6 5 TACC[1:0] 4 3 HACC[1:0] 2 RES 1 MEAS_CONF[1:0] 0 MEAS_TRIG Table 7-38. Measurement Configuration Register Field Descriptions BIT FIELD RESET (HEX) TYPE DESCRIPTION 7:6 TACC[1:0] R/W 0 Temperature accuracy option: 00: 14 bit 01: 11 bit 10: 9 bit 11: NA 5:4 HACC[1:0] R/W 0 Humidity accuracy option: 00: 14 bit 01: 11 bit 10: 9 bit 11: NA RES R/W 0 Reserved MEAS_CONF[1:0] R/W 0 Measurement configuration: 00: Humidity + Temperature 01: Temperature only 10: NA 11: NA MEAS_TRIG R/W 0 Measurement trigger: 0: No action 1: Start measurement Setting this bit to 1 to start a single measurement in one-shot mode or continuous measurements in continuous conversion mode. This bit self-clears to 0 once the measurement starts. 3 2:1 0 7.6.17 Manufacturer ID Low (Address: FC) Table 7-39. Manufacturer ID Low Register (Address: FC) 7 6 5 4 3 2 1 0 MANUFACTURER ID[7:0] Table 7-40. Manufacturer ID Low Field Descriptions BIT FIELD [7:0] MANUFACTURER ID [7:0] TYPE R RESET (HEX) 49 DESCRIPTION Manufacturer ID- lower byte value The Manufacturer ID Low and Manufacturer ID High registers contain a factory-programmable identification value that identifies this device as being manufactured by Texas Instruments. The manufacturer ID helps distinguish the device from other devices that are on the same I2C bus. The manufacturer ID reads 0x5449 and spans across the two registers. Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 31 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 7.6.18 Manufacturer ID High (Address: FD) Table 7-41. Manufacturer ID High Register (Address: FD) 7 6 5 4 3 2 1 0 MANUFACTURER ID[15:8] Table 7-42. Manufacturer ID High Register Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE MANUFACTURER ID [15:8] R 54 DESCRIPTION Manufacturer ID- higher byte value The Manufacturer ID Low and Manufacturer ID High registers contain a factory-programmable identification value that identifies this device as being manufactured by Texas Instruments. The manufacturer ID helps distinguish the device from other devices that are on the same I2C bus. The manufacturer ID reads 0x5449 and spans across the two registers. 7.6.19 Device ID Low (Address: FE) Table 7-43. Device ID Low Register (Address: FE) 7 6 5 4 3 2 1 0 DEVICE ID[7:0] Table 7-44. Device ID Low Register Field Descriptions BIT FIELD [7:0] RESET (HEX) TYPE DEVICE ID [7:0] R D0 DESCRIPTION Device ID - lower byte value The Device ID Low and Device ID High registers contain a factory-programmable identification value that identifies this device as a HDC2021. The device ID helps distinguish the device from other devices that are on the same I2C bus. The Device ID for the HDC2021 is 0x07D0. 7.6.20 Device ID High (Address: FF) Table 7-45. Device ID High Register (Address: FF) 7 6 5 4 3 2 1 0 DEVICE ID[15:8] Table 7-46. Device ID High Register Field Descriptions BIT FIELD [7:0] DEVICE ID [15:8] RESET (HEX) TYPE R 7 DESCRIPTION Device ID - higher byte value The Device ID Low and Device ID High registers contain a factory-programmable identification value that identifies this device as a HDC2021. The device ID helps distinguish the device from other devices that are on the same I2C bus. The Device ID for the HDC2021 is 0x07D0. 32 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 8 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information An HVAC system thermostat control is made up of environmental sensors and a microcontroller. The microcontroller acquires data from humidity and temperature sensors and controls the heating and cooling system. The collected data are then shown on a display that can be easily controlled by the microcontroller. Based on data from the humidity and temperature sensor, the heating and cooling system then maintains the environment at the customer-defined preferred conditions. 8.2 Typical Application In a battery-powered HVAC system thermostat, one of the key parameters in the selection of components is the power consumption. The HDC2021, with a current consumption of 550 nA (the average consumption over 1s for RH and Temperature measurements), and in conjunction with the MSP430, represents one way an engineer can obtain low power consumption to extend battery life. A system block diagram of a battery-powered thermostat is shown in Figure 8-1. DISPLAY TEMPERATURE: 25°C/ 77°F Relative Humidity (RH): 25% Red + Lithium Ion Battery TIME: XX:XX DATE: XX:XX:XX 1.8 V VDD HDC2021 RH Violet Sensor MUX MUX ADC Red 1.8 V Registers/ Red Logic I2 C Red Interface SCL SDA INT VDD MCU I2C Red Peripheral Red GPIOs GPIO Orange ADDR Temp Violet Sensor GPIOs ± GND Calibration Red Coefficients GND KEYPAD Button1 C Button2 C C Button3 C Button4 C Figure 8-1. Typical Application Schematic HVAC Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 33 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 8.2.1 Design Requirements To improve measurement accuracy, TI recommends to isolate the HDC2021 from all heat sources in the form of active circuitry, batteries, displays, and resistive elements. If design space is a constraint, cutouts surrounding the device or the inclusion of small trenches can help minimize heat transfer from PCB heat sources to the HDC2021. To avoid self-heating the HDC2021, TI recommends to configure the device for a maximum sample rate of 1 Hz (1 sps). 8.2.2 Detailed Design Procedure When a circuit board layout is created from the schematic shown in Figure 8-1 , a small circuit board is possible. The accuracy of a RH and temperature measurement depends on the sensor accuracy and the setup of the sensing system. The HDC2021 samples relative humidity and temperature in its immediate environment, it is therefore important that the local conditions at the sensor match the monitored environment. Use one or more openings in the physical cover of the thermostat to obtain a good airflow even in static conditions. Refer to the layout (Figure 10-1) for a PCB layout that minimizes the thermal mass of the PCB in the region of the HDC2021, which can improve measurement response time and accuracy. 8.2.3 Application Curve These results were acquired at TA = 30°C using a humidity chamber that sweeps RH%. The sweep profile used was 20% > 30% > 40% > 50% > 60% > 70% > 60% > 50% > 40% > 30% > 20%. Each RH% set point was held for 20 minutes. Figure 8-2. RH% Readings of Humidity Chamber and HDC2021 vs. Time 34 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated www.ti.com HDC2021 SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 9 Power Supply Recommendations The HDC2021 requires a voltage supply within 1.62 V and 3.6 V. TI recommends a multilayer ceramic bypass X7R capacitor of 0.1 µF between the VDD and GND pins located close to the device. 10 Layout 10.1 Layout Guidelines The HDC2021’s relative humidity-sensing element is located on the top side of the package. TI recommends that the user eliminate the copper layers below the device (GND, VDD) and create slots in the PCB around the device to enhance the thermal isolation of the HDC2021. To ensure the temperature sensor performance, TI highly recommends that the user follow the Land Pattern, Solder Mask, and Solder Paste examples depicted in the Mechanical, Packaging, and Orderable Informationsection. 10.1.1 Guidelines for HDC2021 Storage and PCB Assembly 10.1.1.1 Storage and Handling As with all humidity sensors, the HDC2021 must follow special guidelines regarding handling and storage that are not common with standard semiconductor devices. Long exposure to UV and visible light, or exposure to chemical vapors for prolonged periods, should be avoided as it may affect RH% accuracy. Additionally, the device should be protected from out-gassed solvent vapors produced during manufacturing, transport, operation, and package materials (that is, adhesive tapes, stickers, bubble foils). For further detailed information, see Humidity Sensor: Storage and Handling Guidelines (SNIA025). 10.1.1.2 Soldering Reflow For PCB assembly, standard reflow soldering ovens may be used. The HDC2021 uses the standard soldering profile IPC/JEDEC J-STD-020 with peak temperatures at 260°C. When soldering the HDC2021, it is mandatory to use no-clean solder paste, and the paste must not be exposed to water or solvent rinses during assembly because these contaminants may affect sensor accuracy. After reflow, it is expected that the sensor will generally output a shift in relative humidity, which, once the polyimide tape is peeled off, will reduce over time as the sensor is exposed to typical indoor ambient conditions. These conditions include 30-40% RH at room temperature during a duration of several days. Following this rehydration procedure allows the polymer to correctly settle after reflow and return to the calibrated RH accuracy. 10.1.1.3 Rework The polyimide tape of the HDC2021 can withstand at least three standard reflow cycles. In the case of tape removal, TI recommends to limit the HDC2021 to a single IR reflow with no rework, but a second reflow may be possible if the following guidelines are met: • The exposed polymer (humidity sensor) is kept clean and undamaged. • The no-clean solder paste is used and the process is not exposed to any liquids, such as water or solvents. • The peak soldering temperature does not exceed 260°C. 10.1.1.4 High Temperature and Humidity Exposure Long exposure outside the recommended operating conditions may temporarily offset the RH output. The recommended humidity operating range is 20% to 80% RH (non-condensing) over 0°C to 60°C. Prolonged operation beyond these ranges may shift the sensor reading with a slow recovery time. 10.1.1.5 Bake/Rehydration Procedure Prolonged exposure to extreme conditions or harsh contaminants may impact sensor performance. In the case that permanent offset is observed from contaminants, the following procedure is suggested, which may recover or reduce the error observed in sensor performance: 1. Baking: 100°C, at less than 5%RH, for 5 to 10 hours 2. Rehydration: Between 20°C to 30°C, 60%RH to 75%RH, for 6 to 12 hours Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 35 HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 10.2 Layout Example The only component next to the device is the supply decoupling capacitor. The relative humidity is dependent on the temperature, so the HDC2021 should be positioned away from hot spots present on the board, such as a battery, display, or microcontroller. Slots around the device can be used to reduce the thermal mass for a quicker response to environmental changes. The device package has a thermal pad which can be soldered to the PCB. The thermal pad can be left floated or connected to the ground. Applying a different voltage other than ground to thermal pad can lead to permanent device damage. If the user intends to use the integrated heater in the device, it is recommended NOT to solder the thermal pad to PCB to achieve faster heating response. The below diagram shows an example layout of the device on a single-layer PCB board with no VIAs and ADDR pin grounded. SDA SCL SDA SCL GND VDD ADDR DRDY/INT Decoupling Capacitor GND VDD TI does NOT recommend to solder the thermal pad to PCB to achieve faster heating response if the integrated heater is used. Figure 10-1. HDC2021 PCB Layout Example 36 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated HDC2021 www.ti.com SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation see the following: • Texas Instruments, Humidity Sensor: Storage and Handling Guidelines application report (SNIA025) • Texas Instruments, Optimizing Placement and Routing for Humidity Sensors application report (SNAA297) 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 11.4 Trademarks TI E2E™ is a trademark of Texas Instruments Incorporated. All other trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 37 HDC2021 SNAS773A – DECEMBER 2019 – REVISED JUNE 2020 www.ti.com 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 38 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated PACKAGE OUTLINE DEB0006A WSON - 0.92 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 2.9 B A (45 X 0.6) PIN 1 INDEX AREA 3.1 2.9 (1) PEELABLE COVER TAPE IP66 RATED & 260 C CAPABLE NOTE 4 (1) 3X (R0.375) ADHESIVE FREE SURFACE ( 2.75) (0.32) 0.92 MAX 0.8 0.7 C SEATING PLANE 0.08 C (0.2) TYP 0.05 0.00 1.5 0.1 EXPOSED THERMAL PAD 3 2X 2 4 7 2.4 0.1 4X 1 6 1 6X PIN 1 ID 0.5 6X 0.3 0.45 0.35 0.1 0.05 C A B C 4224371/D 01/2020 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. 4. IPXY Rating represents environmental ingress protection from both dust and high pressure water sprays. X=6 represents resistance to dust and Y=6 represents high pressure water spray resistance per IEC60529 testing conditions. www.ti.com EXAMPLE BOARD LAYOUT DEB0006A WSON - 0.92 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.5) SYMM 6X (0.6) 6 1 6X (0.4) SYMM 7 (2.4) (0.95) TYP 4X (1) 3 4 (R0.05) TYP ( 0.2) TYP (1) TYP (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND EXPOSED METAL EXPOSED METAL SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK OPENING SOLDER MASK DEFINED SOLDER MASK DETAILS 4224371/D 01/2020 NOTES: (continued) 5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 6. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com EXAMPLE STENCIL DESIGN DEB0006A WSON - 0.92 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM 6X (0.6) METAL TYP 6 1 6X (0.4) (0.63) 7 SYMM 4X (1) 2X (1.06) 3 4 (R0.05) TYP 2X (1.38) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 7: 81% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X 4224371/D 01/2020 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com PACKAGE OPTION ADDENDUM www.ti.com 13-Nov-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking Samples (4/5) (6) HDC2021DEBR ACTIVE WSON DEB 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HDC2021DEBT LIFEBUY WSON DEB 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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