INA115BUG4

® INA115 INA 115 Precision INSTRUMENTATION AMPLIFIER FEATURES DESCRIPTION ● LOW OFFSET VOLTAGE: 50µV max The INA115 is a low cost, general purpose instrumentation amplifier offering excellent accuracy. Its versatile three-op amp design and small size make it ideal for a wide range of applications. Similar to the model INA114, the INA115 provides additional connections to the input op amps, A1 and A2, which improve gain accuracy in high gains and are useful in forming switched-gain amplifiers. ● LOW DRIFT: 0.25µV/°C max ● LOW INPUT BIAS CURRENT: 2nA max ● HIGH COMMON-MODE REJECTION: 115dB min ● INPUT OVER-VOLTAGE PROTECTION: ±40V ● WIDE SUPPLY RANGE: ±2.25 TO ±18V A single external resistor sets any gain from 1 to 10,000. Internal input protection can withstand up to ±40V without damage. ● LOW QUIESCENT CURRENT: 3mA max ● SOL-16 SURFACE-MOUNT PACKAGE The INA115 is laser trimmed for very low offset voltage (50µV), drift (0.25µV/˚C) and high commonmode rejection (115dB at G=1000). It operates with power supplies as low as ±2.25V, allowing use in battery operated and single 5V supply systems. Quiescent current is 3mA maximum. APPLICATIONS ● SWITCHED-GAIN AMPLIFIER ● BRIDGE AMPLIFIER ● THERMOCOUPLE AMPLIFIER ● RTD SENSOR AMPLIFIER The INA115 is available in the SOL-16 surface-mount package, specified for the –40°C to +85°C temperature range. ● MEDICAL INSTRUMENTATION ● DATA ACQUISITION VO1 V+ 1 – VIN 4 Over-Voltage Protection 2 13 INA115 Feedback A1 25kΩ 25kΩ 12 25kΩ 3 A3 RG 11 VO 14 G=1+ 25kΩ 15 + VIN 5 Over-Voltage Protection A2 25kΩ 8 VO2 25kΩ 10 50kΩ RG Ref 7 V– International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ©1992 Burr-Brown Corporation SBOS021 PDS-1169B Printed in U.S.A. October, 1993 SPECIFICATIONS ELECTRICAL At TA = +25°C, VS = ±15V, RL = 2kΩ unless otherwise noted. INA115BU PARAMETER CONDITIONS INPUT Offset Voltage, RTI Initial vs Temperature vs Power Supply Long-Term Stability Impedance, Differential Common-Mode Input Common-Mode Range Safe Input Voltage Common-Mode Rejection TYP MAX ±50 + 100/G ±0.25 + 5/G 3 + 10/G ±11 ±10 + 20/G ±0.1 + 0.5/G 0.5 + 2/G ±0.2 + 0.5/G 1010 || 6 1010 || 6 ±13.5 TA = +25°C TA = TMIN to TMAX VS = ±2.25V to ±18V VCM = ±10V, ∆RS = 1kΩ G=1 G = 10 G = 100 G = 1000 INA115AU MIN 80 96 110 115 BIAS CURRENT vs Temperature 96 115 120 120 ±0.5 ±8 OFFSET CURRENT vs Temperature ±0.5 ±8 ✻ ±40 75 90 106 106 ±2 ±2 GAIN Gain Equation Range of Gain Gain Error G=1 G = 10 G = 100 G = 1000 G=1 Gain vs Temperature 50kΩ Resistance(1) Nonlinearity G=1 G = 10 G = 100 G = 1000 IO = 5mA, TMIN to TMAX VS = ±11.4V, RL = 2kΩ VS = ±2.25V, RL = 2kΩ ±13.5 ±10 ±1 Load Capacitance Stability Short Circuit Current FREQUENCY RESPONSE Bandwidth, –3dB Overload Recovery G=1 G = 10 G = 100 G = 1000 VO = ±10V, G = 10 G=1 G = 10 G = 100 G = 1000 50% Overdrive POWER SUPPLY Voltage Range Current VIN = 0V Slew Rate Settling Time, 0.01% TEMPERATURE RANGE Specification Operating θJA 0.3 ±2.25 MAX ±25 + 30/G ±125 + 500/G ±0.25 + 5/G ±1 + 10/G ✻ ✻ ✻ ✻ ✻ ✻ ✻ 90 106 110 110 ✻ ✻ ±5 ±5 UNITS µV µV/°C µV/V µV/mo Ω || pF Ω || pF V V dB dB dB dB nA pA/°C nA pA/°C 15 11 11 0.4 ✻ ✻ ✻ ✻ nV/√Hz nV/√Hz nV/√Hz µVp-p 0.4 0.2 18 ✻ ✻ ✻ pA/√Hz pA/√Hz pAp-p ✻ 1 + (50kΩ/RG) 1 TYP ✻ ✻ G = 1000, RS = 0Ω NOISE VOLTAGE, RTI f = 10Hz f = 100Hz f = 1kHz fB = 0.1Hz to 10Hz Noise Current f=10Hz f=1kHz fB = 0.1Hz to 10Hz OUTPUT(2) Voltage MIN ±0.01 ±0.02 ±0.05 ±0.5 ±2 ±25 ±0.0001 ±0.0005 ±0.0005 ±0.002 10000 ±0.05 ±0.4 ±0.5 ±1 ±10 ±100 ±0.001 ±0.002 ±0.002 ±0.01 ±13.7 ±10.5 ±1.5 1000 +20/–15 –40 –40 80 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ 1 100 10 1 0.6 18 20 120 1100 20 ±15 ±2.2 ✻ ✻ ±18 ±3 ✻ +85 +125 ✻ ✻ ✻ ✻ ±0.5 ±0.7 ±2 ±10 ✻ ±0.002 ±0.004 ±0.004 ±0.02 V/V V/V % % % % ppm/°C ppm/°C % of FSR % of FSR % of FSR % of FSR ✻ ✻ ✻ ✻ ✻ V V V pF mA ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ MHz kHz kHz kHz V/µs µs µs µs µs µs ✻ ✻ ✻ ✻ ✻ V mA ✻ ✻ °C °C °C/W ✻ Specification same as INA115BU. NOTE: (1) Temperature coefficient of the “50kΩ” term in the gain equation. (2) Output specifications are for output amplifier, A3. A1 and A2 provide the same output voltage swing but have less output current drive. A1 and A2 can drive external loads of 25kΩ || 200pF. ® INA115 2 ELECTROSTATIC DISCHARGE SENSITIVITY PIN CONFIGURATIONS U Package VO1 1 16 NC Gain Sense1 2 15 Gain Sense2 RG 3 14 RG – IN 4 13 V+ V + IN 5 12 Feedback NC 6 11 VO V– 7 10 Ref VO2 8 9 V This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. SOL-16 Surface-Mount Top View ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS Supply Voltage .................................................................................. ±18V Input Voltage Range .......................................................................... ±40V Output Short-Circuit (to ground) .............................................. Continuous Operating Temperature ................................................. –40°C to +125°C Storage Temperature ..................................................... –40°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NC PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) INA115AU INA115BU SOL-16 Surface-Mount SOL-16 Surface-Mount 211 211 TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 INA115 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, unless otherwise noted. GAIN vs FREQUENCY COMMON-MODE REJECTION vs FREQUENCY 140 Common-Mode Rejection (dB) G = 100, 1k Gain (V/V) 1k 100 10 1 VO1 connected to Gain Sense1 and VO2 connected to Gain Sense2 . See text. 120 G = 10 100 G = 1k 80 G = 100 60 G = 10 40 G=1 20 0 10 100 10k 100k 10 0 – VO + – + VCM (Any Gain) A3 – Output Swing Limit Lim it – O ed by utpu A t Sw 2 ing –10 A3 + Output Swing Limit by A 1 g in ited Lim put Sw ut –O –5 0 5 10 120 100 G = 1000 80 G = 100 G = 10 60 G=1 40 20 0 15 10 100 1k 100k 10k Output Voltage (V) Frequency (Hz) NEGATIVE POWER SUPPLY REJECTION vs FREQUENCY INPUT- REFERRED NOISE VOLTAGE vs FREQUENCY G = 100 Input-Referred Noise Voltage (nV/√ Hz) 120 G = 1000 100 G = 10 G=1 80 1M 140 Limit + Ou ed by A tput Swin2 g 140 Power Supply Rejection (dB) 100k POSITIVE POWER SUPPLY REJECTION vs FREQUENCY VD/2 –15 –15 10k INPUT COMMON-MODE VOLTAGE RANGE vs OUTPUT VOLTAGE VD/2 –10 1k Frequency (Hz) 5 –5 100 Frequency (Hz) y A1 ed b Limit ut Swing tp + Ou 10 1M Power Supply Rejection (dB) Common-Mode Voltage (V) 15 1k 60 40 20 1M 1k 100 G=1 G = 10 10 G = 100, 1000 G = 1000 BW Limit 1 0 10 100 1k 10k 100k 1 1M ® INA115 10 100 Frequency (Hz) Frequency (Hz) 4 1k 10k TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, unless otherwise noted. SETTLING TIME vs GAIN OFFSET VOLTAGE WARM-UP vs TIME 1000 4 Offset Voltage Change (µV) 6 Settling Time (µs) 1200 800 600 0.01% 400 0.1% 200 0 G > 100 2 0 –2 –4 –6 1 10 100 1000 0 15 30 Gain (V/V) 60 75 90 105 120 INPUT BIAS CURRENT vs DIFFERENTIAL INPUT VOLTAGE 2 3 2 Input Bias Current (mA) Input Bias and Input Offset Current (nA) INPUT BIAS AND INPUT OFFSET CURRENT vs TEMPERATURE 1 ±IB 0 IOS –1 1 0 –1 G=1 G = 10 –2 G = 100 –2 –40 –15 10 35 60 –3 –45 85 –30 Temperature (°C) 15 30 45 32 Both Inputs 2 Peak to Peak Amplitude (V) |Ib1| + |Ib2| One Input 1 Over-Voltage Protection Over-Voltage Protection Normal Operation –1 –2 0 MAXIMUM OUTPUT SWING vs FREQUENCY 3 0 G = 1000 –15 Differential Overload Voltage (V) INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE Input Bias Current (mA) 45 Time from Power Supply Turn-on (s) One Input –3 –45 28 G = 1, 10 24 G = 100 20 16 G = 1000 12 8 4 Both Inputs –30 –15 0 0 15 30 45 10 100 1k 10k 100k 1M Frequency (Hz) Common-Mode Voltage (V) ® 5 INA115 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, unless otherwise noted. SLEW RATE vs TEMPERATURE OUTPUT CURRENT LIMIT vs TEMPERATURE 30 Slew Rate (V/µs) 0.8 0.6 0.4 0.2 0 –75 –50 –25 0 25 50 75 100 –15 10 35 60 85 QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT AND POWER DISSIPATION vs POWER SUPPLY VOLTAGE Quiescent Current (mA) Quiescent Current (mA) –|ICL| Temperature (°C) 2.4 2.2 2.0 2.6 120 2.5 100 80 2.4 Power Dissipation 60 2.3 Quiescent Current 2.2 40 2.1 20 2.0 –50 –25 0 25 50 75 100 125 0 ±3 ±6 ±9 ±12 ±15 Temperature (°C) Power Supply Voltage (V) POSITIVE SIGNAL SWING vs TEMPERATURE (RL = 2kΩ) NEGATIVE SIGNAL SWING vs TEMPERATURE (RL = 2kΩ) 16 0 ±18 –16 VS = ±15V 12 VS = ±15V –14 Output Voltage (V) 14 Output Voltage (V) 15 Temperature (°C) 2.6 VS = ±11.4V 10 8 6 4 –12 VS = ±11.4V –10 –8 –6 –4 VS = ±2.25V 2 0 –75 +|ICL| 20 10 –40 125 2.8 1.8 –75 25 –50 –25 0 25 50 75 100 0 –75 125 Temperature (°C) –50 –25 0 25 50 Temperature (°C) ® INA115 VS = ±2.25V –2 6 75 100 125 Power Dissipation (mW) Short Circuit Current (mA) 1.0 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, unless otherwise noted. LARGE SIGNAL RESPONSE, G = 1 SMALL SIGNAL RESPONSE, G = 1 +10V +100mV 0 0 –10V –200mV VO1 connected to Gain Sense1 and VO2 connected to Gain Sense2 LARGE SIGNAL RESPONSE, G = 1000 SMALL SIGNAL RESPONSE, G = 1000 +10V +200mV 0 0 –10V +200mV INPUT-REFERRED NOISE, 0.1 to 10Hz 0.1µV/div 1 s/div ® 7 INA115 APPLICATION INFORMATION Commonly used gains and resistor values are shown in Figure 1. Figure 1 shows the basic connections required for operation of the INA115. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins as shown. For G=1, no resistor is required, but connect pins 2-3 and connect pins 14-15. Gain peaking in G=1 can be reduced by shorting the internal 25kΩ feedback resistors (see typical performance curve Gain vs Frequency). To do this, connect pins 1-2-3 and connect pins 8-14-15. The output is referred to the output reference (Ref) terminal which is normally grounded. This must be a low-impedance connection to assure good common-mode rejection. A resistance of 5Ω in series with the Ref pin will cause a typical device to degrade to approximately 80dB CMR (G=1). The 50kΩ term in equation 1 comes from the sum of the two internal feedback resistors. These are on-chip metal film resistors which are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these resistors are included in the gain accuracy and drift specifications of the INA115. The INA115 has a separate output sense feedback connection (pin 12). Pin 12 must be connected (normally to the output terminal, pin 11) for proper operation. The output sense connection can be used to sense the output voltage directly at the load for best accuracy. The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to gain error and drift can be directly inferred from the gain equation (1). Low resistor values required for high gain can make wiring resistance important. The “force and sense” type connections illustrated in Figure 1 help reduce the effect of interconnection resistance. SETTING THE GAIN Gain of the INA115 is set by connecting a single external resistor, RG: G = 1 + 50 kΩ RG (1) V+ 0.1µF VO1 1 – VIN 4 Over-Voltage Protection 2 13 INA115 A1 25kΩ 25kΩ 12 VO = G • (VIN – VIN) 25kΩ 3 G=1+ A3 RG 11 14 + VIN 5 Load 25kΩ 15 + 50kΩ RG VO – Over-Voltage Protection A2 25kΩ 8 25kΩ 10 7 0.1µF DESIRED GAIN 1 2 5 10 20 50 100 200 500 1000 2000 5000 10000 RG (Ω) NEAREST 1% RG (Ω) No Connection 50.00k 12.50k 5.556k 2.632k 1.02k 505.1 251.3 100.2 50.05 25.01 10.00 5.001 No Connection 49.9k 12.4k 5.62k 2.61k 1.02k 511 249 100 49.9 24.9 10 4.99 VO2 Also drawn in simplified form: – VIN RG INA115 VO2 ® 8 VO Ref + VIN FIGURE 1. Basic Connections. INA115 VO1 V– SWITCHED GAIN Figure 2 shows a circuit for digital selection of four gains. Multiplexer “on” resistance does not significantly affect gain. The resistor values required for some commonly used gain steps are shown. This circuit uses the internal 25kΩ feedback resistors, so the resistor values shown cannot be scaled to a different impedance level. OFFSET TRIMMING The INA115 is laser trimmed for very low offset voltage and drift. Most applications require no external offset adjustment. Figure 4 shows an optional circuit for trimming the output offset voltage. The voltage applied to Ref terminal is summed at the output. Low impedance must be maintained at this node to assure good common-mode rejection. This is achieved by buffering the trim voltage with an op amp as shown. Figure 3 shows an alternative switchable gain configuration. This circuit does not use the internal 25kΩ feedback resistors, so the nominal values shown can be scaled to other impedance levels. This circuit is ideal for use with a precision resistor network to achieve excellent gain accuracy and lowest gain drift. INPUT BIAS CURRENT RETURN PATH The input impedance of the INA115 is extremely high— approximately 1010Ω. However, a path must be provided for the input bias current of both inputs. This input bias current is typically less than ±1nA (it can be either polarity due to cancellation circuitry). High input impedance means that this input bias current changes very little with varying input voltage. NOISE PERFORMANCE The INA115 provides very low noise in most applications. For differential source impedances less than 1kΩ, the INA103 may provide lower noise. For source impedances greater than 50kΩ, the INA111 FET-Input Instrumentation Amplifier may provide lower noise. Input circuitry must provide a path for this input bias current if the INA115 is to operate properly. Figure 5 shows various provisions for an input bias current path. Without a bias current return path, the inputs will float to a potential which exceeds the common-mode range of the INA115 and the input amplifiers will saturate. If the differential source resistance is low, a bias current return path can be connected to one input (see thermocouple example in Figure 5). With higher source impedance, using two resistors provides a balanced input with possible advantages of lower input offset voltage due bias current and better common-mode rejection. Low frequency noise of the INA115 is approximately 0.4µVp-p measured from 0.1 to 10Hz. This is approximately one-tenth the noise of “low noise” chopper-stabilized amplifiers. – VIN +15V 9 13 14 1 12 INA115 4 R1 11 2 2 Enable 10 1 R2 3 R3 14 Feedback A1 25kΩ A1 A3 6 R4 5 5 VO 11 25kΩ 15 15 3 25kΩ 12 25kΩ A0 7 16 Over-Voltage Protection Over-Voltage Protection A2 25kΩ 25kΩ 10 4 8 HI-509 8 –15V A0 A1 Gain L H L H L L H H 1 Highest + VIN GAIN STEPS 1, 1, 1, 0, 10, 100, 1000 2, 4, 8 2, 5, 10 +3, +6, +9dB R1 (Ω) R2 (Ω) R3 (Ω) R4 (Ω) 2.5k 12.5k 15k 17.7k 55.6 12.5k 10k 60.3k 500 12.5k 10k 25k 2.5k 12.5k 15k 17.7k FIGURE 2. Switched-Gain Instrumentation Amplifier (minimum components). ® 9 INA115 – VIN +15V 9 13 14 R1 1 12 INA115 R2 4 R3 2 11 2 Enable 10 1 13 Over-Voltage Protection Feedback A1 25kΩ NC 25kΩ 25kΩ 3 R4 A0 A3 7 16 A1 NC R5 6 3 4 VO 11 14 25kΩ 15 15 5 12 R6 5 A2 Over-Voltage Protection 25kΩ R7 8 HI-509 10 25kΩ 7 8 + VIN –15V A0 A1 Gain L H L H L L H H 1 Highest GAIN STEPS R1 (Ω) R2 (Ω) R3 (Ω) R4 (Ω) R5 (Ω) R6 (Ω) R7 (Ω) 1, 1, 1, 0, 18k 18k 18k 18k 1.8k 9k 10.8k 12.74k 180 4.5k 3.6k 9.02k 40 9k 7.2k 43.7k 180 4.5k 3.6k 9.02k 1.8k 9k 10.8k 12.74k 18k 18k 18k 18k 10, 100, 1000V/V 2, 4, 8V/V 2, 5, 10V/V +3, +6, +9dB FIGURE 3. Switched-Gain Instrumentation Amplifier (improved gain drift). – VIN VO RG V+ Microphone, Hydrophone etc. INA115 + 100µA 1/2 REF200 Ref VIN INA115 47kΩ OPA177 ±10mV Adjustment Range 47kΩ 100Ω 10kΩ 100Ω Thermocouple INA115 100µA 1/2 REF200 V– 10kΩ FIGURE 4. Optional Trimming of Output Offset Voltage. INA115 Center-tap provides bias current return. FIGURE 5. Providing an Input Common-Mode Current Path. ® INA115 10 INPUT COMMON-MODE RANGE The linear common-mode range of the input op amps of the INA115 is approximately ±13.75V (or 1.25V from the power supplies). As the output voltage increases, however, the linear input range will be limited by the output voltage swing of the input amplifiers, A1 and A2. The common-mode range is related to the output voltage of the complete amplifier—see performance curve “Input Common-Mode Range vs Output Voltage.” common-mode range of both input amplifiers. Since both input amplifiers are saturated to the nearly the same output voltage limit, the difference voltage measured by the output amplifier will be near zero. The output of the INA115 will be near 0V even though both inputs are overloaded. INPUT PROTECTION The inputs of the INA115 are individually protected for voltages up to ±40V. For example, a condition of –40V on one input and +40V on the other input will not cause damage. Internal circuitry on each input provides low series impedance under normal signal conditions. To provide equivalent protection, series input resistors would contribute excessive noise. If the input is overloaded, the protection circuitry limits the input current to a safe value (approximately 1.5mA). The typical performance curve “Input Bias Current vs Common-Mode Input Voltage” shows this input current limit behavior. The inputs are protected even if the power supply voltage is zero. A combination of common-mode and differential input signals can cause the output of A1 or A2 to saturate. Figure 6 shows the output voltage swing of A1 and A2 expressed in terms of a common-mode and differential input voltages. Output swing capability of the input amplifiers, A1 and A2 is the same as the output amplifier, A3. For applications where input common-mode range must be maximized, limit the output voltage swing by connecting the INA115 in a lower gain (see performance curve “Input Common-Mode Voltage Range vs Output Voltage”). If necessary, add gain after the INA115 to increase the voltage swing. OTHER APPLICATIONS See the INA114 data sheet for other applications circuits of general interest. Input-overload often produces an output voltage that appears normal. For example, an input voltage of +20V on one input and +40V on the other input will obviously exceed the linear VCM – Over-Voltage Protection V+ G • VD 2 INA115 A1 25kΩ VD 2 25kΩ 25kΩ G=1+ A3 RG 50kΩ RG VO = G • VD 25kΩ VD 2 Over-Voltage Protection VCM A2 25kΩ VCM + 25kΩ G • VD 2 V– FIGURE 6. Voltage Swing of A1 and A2. VO1 LA RA RG INA115 VO VO2 390kΩ OPA177 RL 24.9kΩ 24.9kΩ 390kΩ FIGURE 7. ECG Amplifier with Right Leg Drive. ® 11 INA115 PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) INA115AU ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU-DCC Level-3-260C-168 HR -40 to 85 INA115AU INA115AU/1K ACTIVE SOIC DW 16 1000 RoHS & Green NIPDAU-DCC Level-3-260C-168 HR INA115AU INA115BU ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU-DCC Level-3-260C-168 HR INA115BU INA115BUG4 ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU-DCC Level-3-260C-168 HR INA115BU (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of