INA126, INA2126
SBOS062C – SEPTEMBER 2000 – REVISED JANUARY 2022
INAx126 MicroPower Instrumentation Amplifiers
1 Features
3 Description
•
•
•
•
•
•
•
•
The INA126 and INA2126 (INAx126) are precision
instrumentation amplifiers for accurate, low-noise,
differential-signal acquisition. The two-op-amp design
provides excellent performance with low quiescent
current (175 μA/channel). These features combined
with a wide operating voltage range of ±1.35 V to
±18 V make the INAx126 a great choice for portable
instrumentation and data acquisition systems.
Low quiescent current: 175 μA/channel
Wide supply range: ±1.35 V to ±18 V
Low offset voltage: 250-μV maximum
Low offset drift: 3-μV/°C maximum
Low noise: 35 nV/√Hz
Low input bias current: 25-nA maximum
Temperature range: –40°C to +85°C
Multiple package options:
– Single channel:
• INA126P/PA 8-pin PDIP (P)
• INA126U/UA 8-pin SOIC (D)
• INA126E/EA 8-pin VSSOP (DGK)
– Dual channels:
• INA2126P/PA 16-pin PDIP (N)
• INA2126U/UA 16-pin SOIC (D)
• INA2126E/EA 16-pin SSOP (DBQ)
Gain can be set from 5 V/V to 10000 V/V with
a single external resistor. Precision input circuitry
provides low offset voltage (250 μV, maximum), low
offset voltage drift (3 μV/°C, maximum), and excellent
common-mode rejection.
All versions are specified for the –40°C to +85°C
industrial temperature range.
Device Information
2 Applications
•
•
•
•
•
•
•
PACKAGE(1)
PART NUMBER
Level transmitter
Flow transmitter
Multiparameter patient monitor
Mixed module (AI, AO, DI, DO)
AC charging (pile) station
Infusion pump
Electrocardiogram (ECG)
INA126
INA2126
(1)
PDIP (8)
6.35 mm × 9.81 mm
SOIC (8)
3.91 mm × 4.90 mm
VSSOP (8)
3.00 mm × 3.00 mm
PDIP (16)
6.35 mm × 19.30 mm
SOIC (16)
3.91 mm × 9.90 mm
SSOP (16)
3.90 mm × 4.90 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
V+
V+
INA2126
7
2
+
VIN
INA126
+
VIN
BODY SIZE (NOM)
3
6
8
6
+
–) G
VO = (VIN – VIN
7
G=5+
3
+ – V–) G
VO = (VIN
IN
40kΩ
G = 5 + 80kΩ
RG
40kΩ
9
80kΩ
RG
10kΩ
RG
10kΩ
RG
4
10kΩ
10kΩ
IN
1
V–
1
V–
V+
2
IN
IN
40kΩ
5
40kΩ
5
15
11
14
40kΩ
G=5+
4
10kΩ
+ – V –) G
VO = (VIN
IN
10
80kΩ
RG
RG
V–
Simplified Schematic: INA126
13
V–
IN
10kΩ
16
8
40kΩ
12
V–
Simplified Schematic: INA2126
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA126, INA2126
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SBOS062C – SEPTEMBER 2000 – REVISED JANUARY 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings .............................................................. 5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information: INA126......................................6
6.5 Thermal Information: INA2126....................................6
6.6 Electrical Characteristics.............................................7
6.7 Typical Characteristics................................................ 9
7 Detailed Description......................................................12
7.1 Overview................................................................... 12
7.2 Functional Block Diagram......................................... 12
7.3 Feature Description...................................................12
7.4 Device Functional Modes..........................................12
8 Application and Implementation.................................. 13
8.1 Application Information............................................. 13
8.2 Typical Application.................................................... 13
9 Power Supply Recommendations................................17
9.1 Low-Voltage Operation............................................. 17
10 Layout...........................................................................18
10.1 Layout Guidelines................................................... 18
10.2 Layout Example...................................................... 19
11 Device and Documentation Support..........................20
11.1 Device Support........................................................20
11.2 Receiving Notification of Documentation Updates.. 20
11.3 Support Resources................................................. 20
11.4 Trademarks............................................................. 20
11.5 Electrostatic Discharge Caution.............................. 20
11.6 Glossary.................................................................. 20
12 Mechanical, Packaging, and Orderable
Information.................................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (December 2015) to Revision C (December 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Added dual supply specification to Absolute Maximum Ratings ........................................................................5
• Deleted redundant operating temperature and input common mode voltage specifications in Recommended
Operating Conditions ......................................................................................................................................... 5
• Added dual supply and specified temperature specifications in Recommended Operating Conditions ............ 5
• Added proper signs for PSRR and input bias current specifications in Electrical Characteristics ..................... 7
• Deleted VO = 0 V test condition of common-mode voltage specification in Electrical Characteristics ...............7
• Changed common-mode voltage specification from ±11.25 V minimum, to –11.25 V minimum and 11.25 V
maximum, in Electrical Characteristics .............................................................................................................. 7
• Changed minimum CMRR specification for INA126U/E, INA2126E from 83 dB to 80 dB in Electrical
Characteristics ................................................................................................................................................... 7
• Added typical input bias current specification of ±10 nA for INA126PA/UA/EA and INA2126PA/UA/EA in
Electrical Characteristics ................................................................................................................................... 7
• Changed current noise specifications in Electrical Characteristics from 60 fA/√Hz to 160 fA/√Hz for f = 1 kHz,
and from 2 pApp to 7.3 pApp for f = 0.1 Hz to 10 Hz..........................................................................................7
• Changed test condition for short-circuit current specification in Electrical Characteristics from "Short circuit to
ground" to "Continuous to VS / 2" for clarity........................................................................................................7
• Changed short-circuit current specification in Electrical Characteristics from +10/-5 mA to ±5 mA................... 7
• Deleted redundant voltage range, operating temperature range, and specification temperature range
specifications from Electrical Characteristics .....................................................................................................7
• Changed Figures 6-7, 6-10, 6-13, 6-14, 6-15, 6-16, 6-17 ..................................................................................9
• Added Figure 6-11.............................................................................................................................................. 9
Changes from Revision A (August 2005) to Revision B (December 2015)
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 1
2
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SBOS062C – SEPTEMBER 2000 – REVISED JANUARY 2022
5 Pin Configuration and Functions
RG
1
8
RG
V–IN
2
7
V+
+
IN
3
6
VO
V–
4
5
Ref
V
Figure 5-1. INA126: P (8-Pin PDIP), D (8-Pin SOIC), and DGK (8-Pin VSSOP) Packages, Top View
Table 5-1. Pin Functions: INA126
PIN
NO.
1, 8
NAME
I/O
DESCRIPTION
RG
—
2
V–IN
I
Gain setting pin. For gains greater than 5 place a gain resistor between pin 1 and pin 8.
Negative input
3
V+IN
I
Positive input
4
V–
—
5
Ref
I
Reference input. This pin must be driven by a low impedance or connected to ground.
6
VO
O
Output
7
V+
—
Positive supply
Negative supply
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SBOS062C – SEPTEMBER 2000 – REVISED JANUARY 2022
–
VINA
1
–
16 VINB
+
VINA
2
+
15 VINB
RGA
3
14 RGB
RGA
4
13 RGB
RefA
5
12 RefB
VOA
6
11 VOB
SenseA
7
10 SenseB
V–
8
9
V+
Figure 5-2. INA2126: N (16-Pin PDIP), D (16-Pin SOIC), and DBQ (16-Pin SSOP) Packages, Top View
Table 5-2. Pin Functions: INA2126
PIN
NO.
4
NAME
I/O
DESCRIPTION
1
V–INA
I
Negative input for amplifier A
2
V+INA
I
Positive input for amplifier A
3, 4
RGA
—
5
RefA
I
Reference input for amplifier A. This pin must be driven by a low impedance or connected to
ground.
6
VOA
O
Output of amplifier A
7
SenseA
I
Feedback for amplifier A. Connect to VOA, amplifier A output.
8
V–
—
Negative supply
9
V+
—
Positive supply
10
SenseB
I
Feedback for amplifier B. Connect to VOB, amplifier B output.
11
VOB
O
Output of amplifier B
12
RefB
I
Reference input for amplifier B. This pin must be driven by a low impedance or connected to
ground.
13, 14
RGB
—
15
V+INB
I
Positive input for amplifier B
16
V–INB
I
Negative input for amplifier B
Gain setting pin for amplifier A. For gains greater than 5 place a gain resistor between pin 3 and
pin 4.
Gain setting pin for amplifier B. For gains greater than 5 place a gain resistor between pin 13 and
pin 14.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
VS
MAX
Supply voltage dual supply, VS = (V+) – (V–)
±18
Supply voltage single supply, VS = (V+) – (V–)
36
Input signal voltage(2)
(V–) – 0.7
(V+) + 0.7
Input signal current(2)
Output short-circuit(3)
TA
(1)
(2)
(3)
V
V
10
mA
125
°C
300
°C
125
°C
Continuous
Operating Temperature
–55
Lead temperature (soldering, 10 s)
Tstg
UNIT
Storage Temperature
–55
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
Input signal voltage is limited by internal diodes connected to power supplies. See Input Protection.
Short-circuit to VS / 2.
6.2 ESD Ratings
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
VALUE
UNIT
±500
V
UNIT
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VS
Supply voltage
TA
Specified temperature
Single-supply
Dual-supply
MIN
TYP
MAX
2.7
30
36
±1.35
±15
±18
–40
85
V
°C
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SBOS062C – SEPTEMBER 2000 – REVISED JANUARY 2022
6.4 Thermal Information: INA126
INA126
THERMAL METRIC(1)
PDIP
SOIC
VSSOP
8 PINS
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
52.2
116.4
167.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
41.6
62.4
60.9
°C/W
RθJB
Junction-to-board thermal resistance
29.4
57.7
88.9
°C/W
ψJT
Junction-to-top characterization parameter
18.9
10.0
7.3
°C/W
ψJB
Junction-to-board characterization parameter
29.2
57.1
87.3
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Thermal Information: INA2126
INA2126
THERMAL METRIC(1)
SOIC
SSOP
16 PINS
16 PINS
16 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
39.3
76.2
115.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
26.2
37.8
67.0
°C/W
RθJB
Junction-to-board thermal resistance
20.1
33.5
58.3
°C/W
ψJT
Junction-to-top characterization parameter
10.7
7.5
19.9
°C/W
ψJB
Junction-to-board characterization parameter
19.9
33.3
57.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
(1)
6
PDIP
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SBOS062C – SEPTEMBER 2000 – REVISED JANUARY 2022
6.6 Electrical Characteristics
at TA = 25°C, VS = ±15 V, RL = 25 kΩ, VREF = 0 V, and VCM = VS / 2 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
INA126P/U/E
INA2126P/U/E
±100
±250
INA126PA/UA/EA
INA2126PA/UA/EA
±150
±500
INA126P/U/E
INA2126P/U/E
±0.5
±3
INA126PA/UA/EA
INA2126PA/UA/EA
±0.5
±5
INA126P/U/E
INA2126P/U/E
±5
±15
INA126PA/UA/EA
INA2126PA/UA/EA
±5
±50
UNIT
INPUT
VOS
Offset voltage (RTI)
Offset voltage drift (RTI)
PSRR
Power-supply rejection ratio
(RTI)
TA = –40°C to +85°C
VS = ±1.35 V to ±18 V
µV
µV/°C
uV/V
Input impedance
Safe input voltage
VCM
GΩ || pF
(V–) – 0.5
(V+) + 0.5
RS = 1 kΩ
(V–) – 10
(V+) + 10
Common-mode voltage(1)
Channel seperation (dual)
CMRR
1 || 4
RS = 0 Ω
–11.25
G = 5, dc
±11.5
11.25
130
Common-mode rejection ratio RS = 0 Ω, VCM = ±11.25 V
INA126P
INA2126P
83
94
INA126U/E
INA2126U/E
80
94
INA126PA/UA/EA
INA2126PA/UA/EA
74
83
V
V
dB
dB
INPUT BIAS CURRENT
IB
Input bias current
Input bias current drift
IOS
Input offset current
Input offset current drift
INA126P/U/E
INA2126P/U/E
±10
±25
INA126PA/UA/EA
INA2126PA/UA/EA
±10
±50
TA = –40°C to +85°C
±30
INA126P/U/E
INA2126P/U/E
±0.5
±2
nA
INA126PA/UA/EA
INA2126PA/UA/EA
±0.5
±5
nA
TA = –40°C to +85°C
±10
nA
pA/℃
pA/℃
GAIN
Gain equation
G
5 + (80 kΩ / RG)
Gain
5
G = 5 , VO = ±14 V
GE
Gain error
G = 100, VO = ±12 V
Gain drift(2)
TA = –40°C to +85°C
Gain nonlinearity
G = 100, VO = ±14 V
V/V
10000
INA126P/U/E
INA2126P/U/E
±0.02
±0.1
INA126PA/UA/EA
INA2126PA/UA/EA
±0.02
±0.18
INA126P/U/E
INA2126P/U/E
±0.2
±0.5
INA126PA/UA/EA
INA2126PA/UA/EA
±0.2
±1
G=5
G = 100
V/V
%
±2
±10
±25
±100
±0.002
±0.012
ppm/°C
%
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6.6 Electrical Characteristics (continued)
at TA = 25°C, VS = ±15 V, RL = 25 kΩ, VREF = 0 V, and VCM = VS / 2 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
NOISE
eN
Voltage noise
In
Current noise
f = 1 kHz
35
f = 100 Hz
35
fB = 10 Hz
45
nV/√Hz
fB = 0.1 Hz to 10 Hz
0.7
µVPP
f = 1 kHz
160
fA/√Hz
fB = 0.1Hz to 10Hz
7.3
pAPP
OUTPUT
Positive output voltage swing
(V+) – 0.9 (V+) – 0.75
Negative output voltage swing
(V–) + 0.95
ISC
Short-circuit current
Continuous to VS / 2
CL
Load capacitance
Stable operation
V
(V–) + 0.8
V
±5
mA
1000
pF
FREQUENCY RESPONSE
G=5
BW
Bandwidth, –3 dB
SR
Slew rate
200
G = 100
9
G = 500
1.8
G = 5, VO = ±10 V
0.4
G=5
tS
Settling time
Overload recovery
To 0.01%, VSTEP = 10 V
kHz
G = 100
160
G = 500
1500
50% input overload
V/µs
30
µs
4
µs
POWER SUPPLY
IQ
(1)
(2)
8
Quiescent current (per
channel)
IO = 0 mA
±175
±200
µA
Input voltage range of the instrumentation amplifier input stage. The input range depends on the common-mode voltage, differential
voltage, gain, and reference voltage. See Typical Characteristic curves.
The values specified for G > 5 do not include the effects of the external gain-setting resistor, RG.
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6.7 Typical Characteristics
at TA = 25°C, VS = ±15 V (unless otherwise noted)
70
110
G = 1000
100
Common-Mode Rejection (dB)
60
Gain (dB)
50
G = 100
40
30
G = 20
20
G=5
10
0
90
80
70
G = 1000
60
50
G = 100
40
30
G=5
20
10
–10
0
100
1k
10k
100k
1M
10
100
1k
Frequency (Hz)
10k
100k
1M
Frequency (Hz)
Figure 6-1. Gain vs Frequency
Figure 6-2. Common-Mode Rejection vs Frequency
120
120
100
Power Supply Rejection (dB)
Power Supply Rejection (dB)
G = 1000
G = 100
80
60
40
G=5
20
0
100
G = 1000
80
60
G = 100
40
G=5
20
0
10
100
1k
10k
100k
1M
10
100
1k
Frequency (Hz)
Figure 6-3. Positive Power Supply Rejection vs Frequency
Common-Mode Voltage (V)
tput
Limited by A 2 ou
10
0
–
+
VD/2
VO
Ref
–
+
VCM
–5
+15V
+
VD/2
–15V
–10
t
–15
–15
tex
tput swing—see
Limited by A 2 ou
–10
–5
0
1M
5
swing—see text
5
100k
5
Figure 6-4. Negative Power Supply Rejection vs Frequency
Input Common-Mode Voltage (V)
15
10k
Frequency (Hz)
10
tput swing—see
4
Limited by A 2 ou
3
VS = ±5V
2
text
VS = +5V/0V
1
VREF = 2.5V
0
–1
–2
–3
tput swing—see
Limited by A 2 ou
–4
text
–5
15
–5
–4
–3
–2
–1
0
1
2
3
4
5
Output Voltage (V)
Output Voltage (V)
VS = ±15 V
VS = ±5 V
Figure 6-5. Input Common-Mode Voltage Range
vs Output Voltage
Figure 6-6. Input Common-Mode Voltage Range
vs Output Voltage
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6.7 Typical Characteristics (continued)
at TA = 25°C, VS = ±15 V (unless otherwise noted)
50
500
40
400
30
300
20
200
10
100
10k
1
10
100
Frequency (Hz)
1k
1000
0.01%
Settling Time (µs)
1000
Voltage Noise
800
Current Noise
700
600
80
70
60
Current Noise Spectral Density (fA/ Hz)
Voltage Noise Spectral Density (nV/ Hz)
100
0.1%
100
10
1
10
100
1k
Gain (V/V)
Figure 6-7. Input-Referred Noise vs Frequency
Figure 6-8. Settling Time vs Gain
250
10
6
200
Quiescent Current ( A)
Offset Voltage Change (µV)
8
4
2
(Noise)
0
–2
–4
–6
150
100
50
Vs = 1.35 V
Vs = 15 V
Vs = 18 V
–8
–10
0
1
2
3
4
5
6
7
8
9
0
-75
10
-50
Time After Turn-On (ms)
0
25
50
75
Temperature ( C)
125
Figure 6-10. Quiescent Current vs Temperature
1.2
1
1
150
Rising, Unit 1
Rising, Unit 2
Falling, Unit 1
Falling, Unit 2
THD+N (%)
0.6
0.4
0.2
0
0.1
RL = 10kΩ
0.01
-0.2
RL = 100kΩ
-0.4
G=5
-0.6
-0.8
-40
0.001
-25
-10
5
20 35 50 65
Temperature ( C)
80
95
110 125
10
100
1k
10k
Frequency (Hz)
Figure 6-11. Slew Rate vs Temperature
10
100
Figure 6-9. Input-Referred Offset Voltage WarmUp
0.8
Slew Rate (V/ s)
-25
Figure 6-12. Total Harmonic Distortion + Noise vs Frequency
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6.7 Typical Characteristics (continued)
at TA = 25°C, VS = ±15 V (unless otherwise noted)
14.5
14
-13.5
13.5
-14
13
-14.5
40
30
Output Amlitude (mV)
-12.5
Sourcing, Unit 1
Sourcing, Unit 2
Sinking, Unit 1 -13
Sinking, Unit 2
Output Voltage (V), Sinking
Output Voltage (V), Sourcing
15
20
10
0
-10
-20
-30
12.5
-15
0
0.5
1
1.5
2 2.5 3 3.5 4
Output Current (mA)
4.5
5
5.5
-40
6
0
40
80
120
160
Time ( s)
200
240
280
240
280
G=5
Figure 6-13. Output Voltage Swing vs Output Current
Figure 6-14. Small-Signal Response
15
40
10
20
Output Amlitude (V)
Output Amlitude (mV)
30
10
0
-10
5
0
-5
-20
-10
-30
-40
-15
0
40
80
120
160
Time ( s)
200
240
280
0
40
80
G = 100
120
160
Time ( s)
200
G=5
Figure 6-15. Small-Signal Response
Figure 6-16. Large-Signal Response
1
160
150
G = 1000
140
Separation (dB)
Voltage Noise ( V)
0.5
0
130
G = 100
120
110
G=5
100
RL = 25kΩ
90
Measurement limited
by amplifier or
measurement noise.
80
-0.5
70
60
100
-1
Time (1 s/div)
1k
10k
100k
1M
Frequency (Hz)
Figure 6-17. 0.1-Hz to 10-Hz Voltage Noise
Figure 6-18. Channel Separation vs Frequency, RTI
(Dual Version)
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7 Detailed Description
7.1 Overview
The INAx126 use only two, rather than three, operational amplifiers, providing savings in power consumption.
In addition, the input resistance is high and balanced, thus permitting the signal source to have an unbalanced
output impedance.
A minimum circuit gain of 5 permits an adequate dc common-mode input range, as well as sufficient bandwidth
for most applications.
7.2 Functional Block Diagram
RG (Optional)
REF
OUT
–IN
+
+
+IN
7.3 Feature Description
The INAx126 are low-power, general-purpose instrumentation amplifiers offering excellent accuracy. The
versatile two-operational-amplifier design and small size make the amplifiers an excellent choice for a wide
range of applications. The two-op-amp topology reduces power consumption. A single external resistor sets any
gain from 5 to 10,000. These devices operate with power supplies as low as ±1.35 V, and a quiescent current of
200 μA maximum.
7.4 Device Functional Modes
7.4.1 Single-Supply Operation
The INAx126 can be used on single power supplies from 2.7 V to 36 V. Use the output REF pin to level shift
the internal output voltage into a linear operating condition. Ideally, connect the REF pin to a potential that is
midsupply to avoid saturating the output of the amplifiers. See Section 8.1 for information on how to adequately
drive the reference pin.
12
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The INAx126 measures small differential voltage with high common-mode voltage developed between the
noninverting and inverting input. The high input impedance make the INAx126 an excellent choice for a wide
range of applications. The INAx126 can adjust the functionality of the output signals by setting the reference pin,
giving additional flexibility that is practical for multiple configurations.
8.2 Typical Application
Figure 8-1 shows the basic connections required for operation of the INA126. Applications with noisy or high
impedance power supplies may require decoupling capacitors close to the device pins as shown.
The output is referred to the output reference (Ref) pin, which is normally grounded. This connection must be
low-impedance to maintain good common-mode rejection. A resistance of 8 Ω in series with the Ref pin causes
a typical device to degrade to approximately 80-dB CMR.
Figure 8-4 depicts a desired differential signal from a sensor at 1 kHz and 5 mVPP superimposed on top of a
1-VPP, 60-Hz common-mode signal (the 1-kHz signal can not be resolved in this scope trace). The FFT trace in
Figure 8-5 shows the two signals. Figure 8-6 shows the clearly recovered differential signal at the output of the
INA126 operating at a gain of 250. The FFT of Figure 8-7 shows the 60-Hz common-mode is no longer visible.
The dual version INA2126 has feedback-sense connections, SenseA and SenseB, that must be connected to the
respective output pins for proper operation. The sense connection can sense the output voltage directly at the
load for best accuracy.
V+
0.1µF
Pin numbers are
for single version
DESIRED GAIN
(V/V)
RG
(Ω)
NEAREST 1%
RG VALUE
5
10
20
50
100
200
500
1000
2000
5000
10000
NC
16k
5333
1779
842
410
162
80.4
40.1
16.0
8.0
NC
15.8k
5360
1780
845
412
162
80.6
40.2
15.8
7.87
7
INA126
3
+
VIN
8
6
A1
G = 5 + 80kΩ
RG
40kΩ
!
+ – V–) G
VO = (VIN
IN
10kΩ
+
RG
10kΩ
Load
VO
–
1
NC: No Connection.
–
VIN
A2
2
40kΩ
Also drawn in simplified form:
5
Ref
+
VIN
4
0.1µF
RG
–
VIN
INA126
!
VO
V–
Ref
! Dual version has
external sense connection.
Figure 8-1. Basic Connections
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8.2.1 Design Requirements
For the traces shown in Figure 8-2 and Figure 8-3:
• Common-mode rejection of at least 80 dB
• Gain of 250
8.2.2 Detailed Design Procedure
8.2.2.1 Setting the Gain
Gain is set by connecting an external resistor, RG:
g = 5 + 80 kΩ / RG
(1)
Commonly used gains and RG resistor values are shown in Figure 8-1.
The 80-kΩ term in Equation 1 comes from the internal metal-film resistors, which are laser-trimmed to accurate
absolute values. The accuracy and temperature coefficient of these resistors are included in the gain accuracy
and drift specifications.
The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The RG contribution
to gain accuracy and drift can be directly inferred from Equation 1. Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring resistance, which contributes additional gain error in
gains of approximately 100 or greater.
8.2.2.2 Offset Trimming
The INAx126 family features low offset voltage and offset voltage drift. Most applications require no external
offset adjustment. Figure 8-2 shows an optional circuit for trimming the output offset voltage. The voltage applied
to the Ref pin is added to the output signal. An operational amplifier buffer provides low impedance at the Ref pin
to preserve good common-mode rejection.
–
VIN
RG
+
VIN
INA126
!
VO
V+
Ref
100µA
1/2 REF200
OPA237
10kΩ
100Ω
±10mV
Adjustment Range
100Ω
! Dual version has
external sense connection.
100µA
1/2 REF200
V–
Figure 8-2. Optional Trimming of Output Offset Voltage
14
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8.2.2.3 Input Bias Current Return
The input impedance of the INAx126 is extremely high at approximately 109 Ω. However, a path must be
provided for the input bias current of both inputs. This input bias current is typically –10 nA (current flows out
of the input pins). High input impedance means that this input bias current changes very little with varying input
voltage.
Input circuitry must provide a path for this input bias current for proper operation. Figure 8-3 shows various
provisions for an input bias current path. Without a bias current path, the inputs float to a potential that exceeds
the common-mode range, and the input amplifiers will saturate.
If the differential source resistance is low, the bias current return path can be connected to one input (see
the thermocouple example in Figure 8-3). With higher source impedance, using two equal resistors provides a
balanced input with the advantages of lower input offset voltage due to bias current and better high-frequency
common-mode rejection.
Microphone,
Hydrophone
etc.
INA126
47kΩ
47kΩ
Thermocouple
INA126
10kΩ
INA126
Center-tap provides
bias current return.
Figure 8-3. Providing an Input Common-Mode Current Path
8.2.2.4 Input Common-Mode Range
The input common-mode range of the INAx126 is shown in Section 6.7. The common-mode range is limited
on the negative side by the output voltage swing of A2, an internal circuit node that cannot be measured on an
external pin. The output voltage of A2 can be expressed as shown in Equation 2:
VO2 = 1.25 V– IN – (V+ IN – V– IN) (10 kΩ/RG)
(2)
where
•
Voltages referred to Ref, pin 5
The internal op amp A2 is identical to A1, with an output swing typically limited to 0.7 V from the supply rails.
When the input common-mode range is exceeded (A2 output is saturated), A1 can still be in linear operation and
respond to changes in the noninverting input voltage. The output voltage, however, will be invalid.
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8.2.2.5 Input Protection
The inputs are protected with internal diodes connected to the power-supply rails. These diodes clamp the
applied signal to prevent the signal from exceeding the power supplies by more than approximately 0.7 V. If the
signal-source voltage can exceed the power supplies, the source current should be limited to less than 10 mA.
This limiting can generally be done with a series resistor. Some signal sources are inherently current-limited, and
do not require limiting resistors.
8.2.2.6 Channel Crosstalk—Dual Version
The two channels of the INA2126 are completely independent, including all bias circuitry. At dc and low
frequency, there is virtually no signal coupling between channels. Crosstalk increases with frequency and
depends on circuit gain, source impedance, and signal characteristics.
As source impedance increases, careful circuit layout can help achieve lowest channel crosstalk. Most crosstalk
is produced by capacitive coupling of signals from one channel to the input section of the other channel. To
minimize coupling, separate the input traces as far as practical from any signals associated with the opposite
channel. A grounded guard trace surrounding the inputs helps reduce stray coupling between channels.
Carefully balance the stray capacitance of each input to ground, and run the differential inputs of each channel
parallel to each other, or directly adjacent on top and bottom side of a circuit board. Stray coupling then tends to
produce a common-mode signal that is rejected by the IA input.
8.2.3 Application Curves
space
Differential signal is too small to be seen
16
Figure 8-4. Common-mode Signal at INA126 Input
Figure 8-5. FFT of Signal in Previous Figure Shows
Both the 60-Hz Common-mode Along With 5-kHz
Differential Signal
Figure 8-6. Recovered Differential Signal at the
Output of the INA126 With a Gain of 250
Figure 8-7. FFT of the INA126 Output Shows that
the 60-Hz Common-mode Signal is Rejected
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9 Power Supply Recommendations
9.1 Low-Voltage Operation
The INAx126 can be operated on power supplies as low as ±1.35 V. Performance remains excellent with power
supplies ranging from ±1.35 V to ±18 V. Most parameters vary only slightly throughout this supply voltage
range (see Section 6.7). Operation at low supply voltage requires careful attention to make sure that the
common-mode voltage remains within the linear range (see Figure 6-5 and Figure 6-6).
The INAx126 operates from a single power supply with careful attention to input common-mode range, output
voltage swing of both op amps, and the voltage applied to the Ref pin. Figure 9-1 shows a bridge amplifier circuit
operated from a single 5-V power supply. The bridge provides an input common-mode voltage near 2.5 V, with a
relatively small differential voltage.
The ADS7817’s VREF input current is proportional to conversion rate. A
conversion rate of 10kS/s or slower assures enough current to turn on the
reference diode. Converter input range is ±1.2V. Output swing limitation of
INA126 limits the A/D converter to somewhat greater than 11 bits of range.
+5V
7
R1, C1, R2:
340Hz LP
INA126
2.5V + ∆V
8
6
A1
40kΩ
8
R1
1kΩ
!
2
10kΩ
Bridge
Sensor
INA126 and ADS7817
are available in fine-pitch
MSOP-8 package
3
RG
C1
0.47µF
10kΩ
3
1
2.5V – ∆V
+IN
–IN
R2
1kΩ
A2
1
2
40kΩ
4
5
1.2V
D
ADS7817
12-Bit
A/D
VREF
CS
Ck
6
Serial
Data
5
Chip
Select
7
Clock
33µA
4
6 8
REF1004C-1.2
A similar instrumentation amplifier, INA125, provides
an internal reference voltage for sensor excitation
and/or A/D converter reference.
4
! Dual version has external
sense connection. Pin numbers
shown are for single version.
Figure 9-1. Bridge Signal Acquisition, Single 5-V Supply
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10 Layout
10.1 Layout Guidelines
Attention to good layout practices is always recommended. For best operational performance of the device, use
good printed circuit board (PCB) layout practices, including:
• Make sure that both input paths are well-matched for source impedance and capacitance to avoid converting
common-mode signals into differential signals. In addition, parasitic capacitance at the gain-setting pins can
also affect CMRR over frequency. For example, in applications that implement gain switching using switches
or PhotoMOS® relays to change the value of RG, select the component so that the switch capacitance is as
small as possible.
– Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications.
• Separate grounding for analog and digital portions of the circuitry is one of the simplest and most effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current. For more detailed information, see
PCB Design Guidelines For Reduced EMI.
• In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as
possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better
than in parallel with the noisy trace.
• Place the external components as close to the device as possible. As illustrated in Figure 10-1, keep RG
close to the pins to minimize parasitic capacitance.
• Keep the traces as short as possible
18
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10.2 Layout Example
Gain Resistor
Bypass
Capacitor
RG
RG
VIN
V-IN
V+
VIN
V+IN
VO
V-
Ref
-
+
V+
VOUT
GND
Bypass
Capacitor
V-
GND
Figure 10-1. INA126 Layout Example
-
-
VIN
V-INA
V-INB
VIN
V+INA
V+INB
+
Gain Resistor
VOUT
V-
RGA
RGB
RGA
RGB
REFA
REFB
VOA
VOB
SENSEA
SENSEB
V-
V+
Bypass
Capacitor
VIN
VIN
+
Gain Resistor
VOUT
V+
Bypass
Capacitor
GND
Figure 10-2. INA2126 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 PSpice® for TI
PSpice® for TI is a design and simulation environment that helps evaluate performance of analog circuits. Create
subsystem designs and prototype solutions before committing to layout and fabrication, reducing development
cost and time to market.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
PhotoMOS® is a registered trademark of Panasonic Corporation.
PSpice® is a registered trademark of Cadence Design Systems, Inc.
All trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
INA126E/250
ACTIVE
VSSOP
DGK
8
250
RoHS & Green
Call TI
Level-2-260C-1 YEAR
-55 to 125
A26
Samples
INA126E/250G4
ACTIVE
VSSOP
DGK
8
250
RoHS & Green
Call TI
Level-2-260C-1 YEAR
-55 to 125
A26
Samples
INA126E/2K5
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
Call TI
Level-2-260C-1 YEAR
A26
Samples
INA126EA/250
ACTIVE
VSSOP
DGK
8
250
RoHS & Green
Call TI
Level-2-260C-1 YEAR
A26
Samples
INA126EA/2K5
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
Call TI
Level-2-260C-1 YEAR
A26
Samples
INA126EA/2K5G4
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
Call TI
Level-2-260C-1 YEAR
A26
Samples
INA126U
ACTIVE
SOIC
D
8
75
RoHS & Green
Call TI
Level-3-260C-168 HR
INA
126U
Samples
INA126U/2K5
ACTIVE
SOIC
D
8
2500
RoHS & Green
Call TI
Level-3-260C-168 HR
INA
126U
Samples
INA126UA
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-3-260C-168 HR
INA
126U
A
INA126UA/2K5
ACTIVE
SOIC
D
8
2500
RoHS & Green
Call TI
Level-3-260C-168 HR
INA
126U
A
INA2126E/250
ACTIVE
SSOP
DBQ
16
250
RoHS & Green
Call TI
Level-3-260C-168 HR
INA
2126E
A
INA2126E/2K5
ACTIVE
SSOP
DBQ
16
2500
RoHS & Green
Call TI
Level-3-260C-168 HR
INA
2126E
A
INA2126EA/250
ACTIVE
SSOP
DBQ
16
250
RoHS & Green
Call TI
Level-3-260C-168 HR
INA
2126E
A
INA2126EA/2K5
ACTIVE
SSOP
DBQ
16
2500
RoHS & Green
Call TI
Level-3-260C-168 HR
INA
2126E
A
INA2126U
ACTIVE
SOIC
D
16
40
RoHS & Green
Call TI
Level-3-260C-168 HR
INA2126U
Addendum-Page 1
Samples
Samples
Samples
Samples
Samples
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
INA2126UA
ACTIVE
SOIC
D
16
40
RoHS & Green
Call TI
Level-3-260C-168 HR
-40 to 85
INA2126U
A
Samples
INA2126UA/2K5
ACTIVE
SOIC
D
16
2500
RoHS & Green
Call TI
Level-3-260C-168 HR
-40 to 85
INA2126U
A
Samples
INA2126UE4
ACTIVE
SOIC
D
16
40
RoHS & Green
Call TI
Level-3-260C-168 HR
INA2126U
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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