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INA181, INA2181, INA4181
SBOS793G – APRIL 2017 – REVISED MAY 2020
INAx181 Bidirectional, Low- and High-Side Voltage Output,
Current-Sense Amplifiers
1 Features
3 Description
•
•
•
The INA181, INA2181, and INA4181 (INAx181)
current sense amplifiers are designed for costoptimized applications. These devices are part of a
family of bidirectional, current-sense amplifiers (also
called current-shunt monitors) that sense voltage
drops across current-sense resistors at commonmode voltages from –0.2 V to +26 V, independent of
the supply voltage. The INAx181 family integrates a
matched resistor gain network in four, fixed-gain
device options: 20 V/V, 50 V/V, 100 V/V, or 200 V/V.
This matched gain resistor network minimizes gain
error and reduces the temperature drift.
1
•
•
•
•
•
Common-mode range (VCM): –0.2 V to +26 V
High bandwidth: 350 kHz (A1 devices)
Offset voltage:
– ±150 µV (maximum) at VCM = 0 V
– ±500 µV (maximum) at VCM = 12 V
Output slew rate: 2 V/µs
Bidirectional current-sensing capability
Accuracy:
– ±1% gain error (maximum)
– 1-µV/°C offset drift (maximum)
Gain options:
– 20 V/V (A1 devices)
– 50 V/V (A2 devices)
– 100 V/V (A3 devices)
– 200 V/V (A4 devices)
Quiescent current: 260 µA maximum (INA181)
These devices operate from a single 2.7-V to 5.5-V
power supply. The single-channel INA181 draws a
maximum supply current of 260 µA; whereas, the
dual-channel INA2181 draws a maximum supply
current of 500 µA, and the quad-channel INA4181
draws a maximum supply current of 900 µA.
The INA181 is available in a 6-pin, SOT-23 package.
The INA2181 is available in 10-pin, VSSOP and
WSON packages. The INA4181 is available in a 20pin, TSSOP package. All device options are specified
over the extended operating temperature range of
–40°C to +125°C.
2 Applications
•
•
•
•
•
•
Motor control
Battery monitoring
Power management
Lighting control
Overcurrent detection
Solar inverters
Device Information(1)
PART NUMBER
INA181
INA2181
INA4181
PACKAGE
BODY SIZE (NOM)
SOT-23 (6)
2.90 mm × 1.60 mm
VSSOP (10)
3.00 mm × 3.00 mm
WSON (10)
2.00 mm × 2.00 mm
TSSOP (20)
6.50 mm × 4.40 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Typical Application Circuit
Bus Voltage, VCM
Up To 26 V
Power Supply, VS
2.7 V to 5.5 V
RSENSE
CBYPASS
0.1 µF
Load
INA4181 (quad-channel)
INA2181 (dual-channel)
INA181 (single-channel)
VS
Microcontroller
IN±
±
OUT
ADC
+
IN+
REF
GND
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA181, INA2181, INA4181
SBOS793G – APRIL 2017 – REVISED MAY 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
4
7
7.1
7.2
7.3
7.4
7.5
7.6
7
7
7
7
8
9
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 16
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagrams .....................................
Feature Description.................................................
Device Functional Modes........................................
16
16
18
20
9
Application and Implementation ........................ 23
9.1 Application Information............................................ 23
9.2 Typical Application .................................................. 30
10 Power Supply Recommendations ..................... 32
10.1 Common-Mode Transients Greater Than 26 V .... 32
11 Layout................................................................... 33
11.1 Layout Guidelines ................................................. 33
11.2 Layout Example .................................................... 33
12 Device and Documentation Support ................. 37
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
Device Support......................................................
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
37
37
37
37
37
37
37
37
13 Mechanical, Packaging, and Orderable
Information ........................................................... 38
4 Revision History
Changes from Revision F (March 2019) to Revision G
•
Page
Added INA2181 10-pin WSON package to the data sheet .................................................................................................... 1
Changes from Revision E (July 2018) to Revision F
Page
•
Added new paragraph regarding phase reversal to end of Input Differential Overload section........................................... 21
•
Changed Figure 57 to fix pin number typos ......................................................................................................................... 33
•
Changed Figure 58 to fix pin number typos ........................................................................................................................ 34
Changes from Revision D (March 2018) to Revision E
•
Page
Changed instances of INAx180 to INAx181 (typos) ............................................................................................................... 1
Changes from Revision C (December 2017) to Revision D
Page
•
Changed INA4181 device from preview to production data (active) ..................................................................................... 1
•
Added new Figure 25 for INA4181 ....................................................................................................................................... 12
•
Added new Figure 28 for INA4181 ....................................................................................................................................... 12
•
Added "other" to first sentence after Figure 49 to clarify channel connection in Summing Multiple Currents section......... 27
Changes from Revision B (November 2017) to Revision C
Page
•
Changed INA2181 device from preview to production data (active) ...................................................................................... 1
•
Added "Both Inputs" to Figure 21 title .................................................................................................................................. 11
•
Added new Figure 24 for INA2181 ....................................................................................................................................... 11
•
Added new Figure 25 placeholder for INA4181 ................................................................................................................... 12
•
Added new Figure 27 for INA2181 ....................................................................................................................................... 12
2
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SBOS793G – APRIL 2017 – REVISED MAY 2020
•
Added new Figure 28 placeholder for INA4181 ................................................................................................................... 12
•
Changed Figure 29 and added "(A3 Devices)" to end of title............................................................................................... 12
•
Added new Figure 38 for INA2181 ....................................................................................................................................... 14
•
Changed "less than 150 μV" to "within ±150 μV" regarding offset voltage in Precise Low-Side Current Sensing section.. 19
•
Added text regarding RC filter and reference to application report to note at the bottom of Figure 45 .............................. 23
•
Deleted VS from Equation 3 ................................................................................................................................................. 24
•
Added equation and curve for f-3dB to Figure 48 ................................................................................................................... 25
•
Added new content to Summing Multiple Currents section and moved to Application Information section ........................ 27
•
Added new content to Detecting Leakage Currents section and moved to Application Information section ....................... 28
•
Added new bullet to Layout Guidelines section .................................................................................................................. 33
Changes from Revision A (August 2017) to Revision B
Page
•
Added INA4181 preview device and associated content to data sheet ................................................................................. 1
•
Changed design parameter name in Table 3 from "Accuracy" to "Current sensing error" for clarity .................................. 30
•
Changed "RMS" to "RSS" in reference to equation 7 ......................................................................................................... 31
Changes from Original (April 2017) to Revision A
•
Page
Added INA2181 preview device and associated content to data sheet ................................................................................. 1
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5 Device Comparison Table
PRODUCT
NUMBER OF CHANNELS
GAIN (V/V)
INA181A1
1
20
INA181A2
1
50
INA181A3
1
100
INA181A4
1
200
INA2181A1
2
20
INA2181A2
2
50
INA2181A3
2
100
INA2181A4
2
200
INA4181A1
4
20
INA4181A2
4
50
INA4181A3
4
100
INA4181A4
4
200
6 Pin Configuration and Functions
INA181: DBV Package
6-Pin SOT-23
Top View
OUT
1
6
VS
GND
2
5
REF
IN+
3
4
IN±
Not to scale
Pin Functions: INA181 (Single Channel)
PIN
4
TYPE
DESCRIPTION
NAME
NO.
GND
2
Analog
IN–
4
Analog input
Current-sense amplifier negative input. For high-side applications, connect to load
side of sense resistor. For low-side applications, connect to ground side of sense
resistor.
IN+
3
Analog input
Current-sense amplifier positive input. For high-side applications, connect to busvoltage side of sense resistor. For low-side applications, connect to load side of
sense resistor.
OUT
1
Analog output
Output voltage
REF
5
Analog input
Reference input
VS
6
Analog
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Ground
Power supply, 2.7 V to 5.5 V
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SBOS793G – APRIL 2017 – REVISED MAY 2020
INA2181-Q1: DGS Package
10-Pin VSSOP
Top View
INA2181: DSQ Package
10-Pin WSON
Top View
OUT1
1
10
VS
IN±1
2
9
OUT2
IN+1
3
8
IN±2
GND
4
7
IN+2
REF1
5
6
REF2
OUT1
1
10
IN±1
2
9
OUT2
IN+1
3
8
IN±2
GND
4
7
IN+2
REF1
5
6
REF2
Thermal
Pad
VS
Not to scale
Not to scale
(1)
Thermal Pad can be left floating or
connected to GND.
INA4181: PW Package
20-Pin TSSOP
Top View
REF1
1
20
REF4
OUT1
2
19
OUT4
IN±1
3
18
IN±4
IN+1
4
17
IN+4
VS
5
16
GND
IN+2
6
15
IN+3
IN±2
7
14
IN±3
OUT2
8
13
OUT3
REF2
9
12
REF3
10
11
NC
NC
Not to scale
Pin Functions: INA2181 (Dual Channel) and INA4181 (Quad Channel)
PIN
TYPE
DESCRIPTION
NAME
INA2181
INA4181
GND
4
16
Analog
IN–1
2
3
Analog input
Current-sense amplifier negative input for channel 1. For high-side
applications, connect to load side of channel-1 sense resistor. For lowside applications, connect to ground side of channel-1 sense resistor.
IN+1
3
4
Analog input
Current-sense amplifier positive input for channel 1. For high-side
applications, connect to bus-voltage side of channel-1 sense resistor. For
low-side applications, connect to load side of channel-1 sense resistor.
IN–2
8
7
Analog input
Current-sense amplifier negative input for channel 2. For high-side
applications, connect to load side of channel-2 sense resistor. For lowside applications, connect to ground side of channel-2 sense resistor.
Ground
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Pin Functions: INA2181 (Dual Channel) and INA4181 (Quad Channel) (continued)
PIN
6
TYPE
DESCRIPTION
6
Analog input
Current-sense amplifier positive input for channel 2. For high-side
applications, connect to bus-voltage side of channel-2 sense resistor. For
low-side applications, connect to load side of channel-2 sense resistor.
—
14
Analog input
Current-sense amplifier negative input for channel 3. For high-side
applications, connect to load side of channel-3 sense resistor. For lowside applications, connect to ground side of channel-3 sense resistor.
IN+3
—
15
Analog input
Current-sense amplifier positive input for channel 3. For high-side
applications, connect to bus-voltage side of channel-3 sense resistor. For
low-side applications, connect to load side of channel-3 sense resistor.
IN–4
—
18
Analog input
Current-sense amplifier negative input for channel 4. For high-side
applications, connect to load side of channel-4 sense resistor. For lowside applications, connect to ground side of channel-4 sense resistor.
IN+4
—
17
Analog input
Current-sense amplifier positive input for channel 4. For high-side
applications, connect to bus-voltage side of channel-4 sense resistor. For
low-side applications, connect to load side of channel-4 sense resistor.
NC
—
10, 11
—
OUT1
1
2
Analog output
Channel 1 output voltage
NAME
INA2181
INA4181
IN+2
7
IN–3
NC denotes no internal connection. These pins can be left floating or
connected to any voltage between VS and ground.
OUT2
9
8
Analog output
Channel 2 output voltage
OUT3
—
13
Analog output
Channel 3 output voltage
OUT4
—
19
Analog output
Channel 4 output voltage
REF1
5
1
Analog input
Channel 1 reference voltage, 0 to VS
REF2
6
9
Analog input
Channel 2 reference voltage, 0 to VS
REF3
—
12
Analog input
Channel 3 reference voltage, 0 to VS
REF4
—
20
Analog input
Channel 4 reference voltage, 0 to VS
VS
10
5
Analog
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Power supply pin, 2.7 V to 5.5 V
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SBOS793G – APRIL 2017 – REVISED MAY 2020
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
Supply voltage, VS
6
Analog inputs, IN+, IN–
Differential (VIN+) – (VIN–)
(2)
Common-mode
Input voltage range
(3)
at REF pin
Output Voltage
–26
26
GND – 0.3
26
GND – 0.3
VS + 0.3
GND – 0.3
VS + 0.3
Maximum output current, IOUT
Operating fee-air temperature, TA
–55
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
UNIT
V
V
V
V
8
mA
150
°C
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
Input voltage at any pin can exceed the voltage shown if the current at that pin is limited to 5 mA.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±3000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
–0.2
12
26
Operating supply voltage
2.7
5
5.5
V
Operating free-air temperature
–40
125
°C
VCM
Common-mode input voltage (IN+ and IN–)
VS
TA
UNIT
V
7.4 Thermal Information
INA181
THERMAL METRIC
(1)
INA2181
INA4181
DBV (SOT-23)
DSQ (WSON)
DGS (VSSOP)
PW (TSSOP)
6 PINS
10 PINS
10 PINS
14 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
198.7
74.5
177.3
97.0
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
120.9
89.7
68.7
37.7
°C/W
RθJB
Junction-to-board thermal resistance
52.3
39.8
98.4
48.3
°C/W
ψJT
Junction-to-top characterization parameter
30.3
3.7
12.6
3.6
°C/W
ψJB
Junction-to-board characterization parameter
52.0
39.7
96.9
47.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
16.8
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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7.5 Electrical Characteristics
at TA = 25°C, VS = 5 V, VREF = VS / 2, VIN+ = 12 V, and VSENSE = VIN+ – VIN– (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
84
100
MAX
UNIT
INPUT
CMRR
Common-mode rejection ratio, RTI
VOS
Offset voltage, RTI
dVOS/dT
Offset drift, RTI
PSRR
RTI vs power supply ratio
IIB
Input bias current
IIO
Input offset current
(1)
VIN+ = 0 V to 26 V, VSENSE = 0 mV,
TA = –40°C to +125°C
VSENSE = 0 mV, VIN+ = 0 V
dB
±25
±150
±100
±500
VSENSE = 0 mV, TA = –40°C to +125°C
0.2
1
μV/°C
VS = 2.7 V to 5.5 V, VIN+ = 12 V,
VSENSE = 0 mV
±8
±40
μV/V
VSENSE = 0 mV
μV
μV
VSENSE = 0 mV, VIN+ = 0 V
-6
μA
VSENSE = 0 mV
75
μA
VSENSE = 0 mV
±0.05
μA
A1 devices
20
V/V
A2 devices
50
V/V
A3 devices
100
V/V
A4 devices
200
V/V
OUTPUT
G
Gain
EG
Gain error
VOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
Gain error vs temperature
TA = –40°C to +125°C
Nonlinearity error
VOUT = 0.5 V to VS – 0.5 V
Maximum capacitive load
No sustained oscillation
VOLTAGE OUTPUT
±0.1%
±1%
1.5
20
ppm/°C
±0.01%
1
nF
(2)
VSP
Swing to VS power-supply rail
VSN
Swing to GND
(3)
RL = 10 kΩ to GND, TA = –40°C to
+125°C
RL = 10 kΩ to GND, TA = –40°C to
+125°C
(3)
(VS) – 0.02
(VS) – 0.03
V
(VGND) +
0.0005
(VGND) +
0.005
V
FREQUENCY RESPONSE
BW
Bandwidth
SR
Slew rate
NOISE, RTI
(1)
A1 devices, CLOAD = 10 pF
350
kHz
A2 devices, CLOAD = 10 pF
210
kHz
A3 devices, CLOAD = 10 pF
150
kHz
A4 devices, CLOAD = 10 pF
105
kHz
2
V/μs
40
nV/√Hz
Voltage noise density
POWER SUPPLY
INA181
IQ
Quiescent current
INA2181
INA4181
(1)
(2)
(3)
8
VSENSE = 0 mV
195
VSENSE = 0 mV, TA = –40°C to +125°C
260
300
VSENSE = 0 mV
356
VSENSE = 0 mV, TA = –40°C to +125°C
500
520
VSENSE = 0 mV
690
VSENSE = 0 mV, TA = –40°C to +125°C
900
1000
μA
μA
μA
RTI = referred-to-input.
See Figure 19.
Swing specifications are tested with an overdriven input condition.
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7.6 Typical Characteristics
-440
-400
-360
-320
-280
-240
-200
-160
-120
-80
-40
0
40
80
120
160
200
240
280
320
360
400
-170
-155
-140
-125
-110
-95
-80
-65
-50
-35
-20
-5
10
25
40
55
70
85
100
115
130
145
Population
Population
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D001
Input Offset Voltage (PV)
Input Offset Voltage (PV)
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Population
Figure 2. Input Offset Voltage Production Distribution A2
-195
-180
-165
-150
-135
-120
-105
-90
-75
-60
-45
-30
-15
0
15
30
45
60
75
90
105
120
Population
Figure 1. Input Offset Voltage Production Distribution A1
D002
D003
Input Offset Voltage (PV)
Input Offset Voltage (PV)
Figure 3. Input Offset Voltage Production Distribution A3
D004
Figure 4. Input Offset Voltage Production Distribution A4
A1
A2
A3
A4
50
Population
Offset Voltage ( PV)
100
0
-100
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
D005
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
35
40
45
50
-50
Common-Mode Rejection Ratio (PV/V)
D006
Figure 5. Offset Voltage vs Temperature
Figure 6. Common-Mode Rejection Production Distribution
A1
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Typical Characteristics (continued)
-11
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
10
Population
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
10
12
14
16
18
20
22
Population
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D007
Common-Mode Rejection Ratio (PV/V)
D008
Common-Mode Rejection Ratio (PV/V)
Figure 7. Common-Mode Rejection Production Distribution
A2
Figure 8. Common-Mode Rejection Production Distribution
A3
A1
A2
A3
A4
8
6
4
2
0
-2
-4
-6
-8
-10
-50
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
10
11
Population
Common-Mode Rejection Ratio (PV/V)
10
-25
0
25
50
75
Temperature (qC)
100
125
150
D010
D009
Common-Mode Rejection Ratio (PV/V)
Figure 10. Common-Mode Rejection Ratio vs Temperature
Gain Error (%)
D011
Figure 11. Gain Error Production Distribution A1
10
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-0.16
-0.145
-0.13
-0.115
-0.1
-0.085
-0.07
-0.055
-0.04
-0.025
-0.01
0.005
0.02
0.035
0.05
0.065
0.08
0.095
0.11
0.125
0.14
0.155
-0.14
-0.13
-0.12
-0.11
-0.1
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
Population
Population
Figure 9. Common-Mode Rejection Production Distribution
A4
Gain Error (%)
D012
Figure 12. Gain Error Production Distribution A2
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Typical Characteristics (continued)
-0.29
-0.265
-0.24
-0.215
-0.19
-0.165
-0.14
-0.115
-0.09
-0.065
-0.04
-0.015
0.01
0.035
0.06
0.085
0.11
0.135
0.16
0.185
0.21
0.235
Population
-0.17
-0.155
-0.14
-0.125
-0.11
-0.095
-0.08
-0.065
-0.05
-0.035
-0.02
-0.005
0.01
0.025
0.04
0.055
0.07
0.085
0.1
0.115
0.13
0.145
Population
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D013
Gain Error (%)
Figure 13. Gain Error Production Distribution A3
Figure 14. Gain Error Production Distribution A4
50
0.4
A1
A2
A3
A4
0.3
0.2
A1
A2
A3
A4
40
30
0.1
Gain (dB)
Gain Error (%)
D014
Gain Error (%)
0
-0.1
20
10
-0.2
0
-0.3
-0.4
-50
-25
0
25
50
75
Temperature (qC)
100
125
-10
10
150
100
Figure 15. Gain Error vs Temperature
1M
10M
D016
140
Common-Mode Rejection Ratio (dB)
Power-Supply Rejection Ratio (dB)
10k
100k
Frequency (Hz)
Figure 16. Gain vs Frequency
120
100
80
60
40
20
0
10
1k
D015
100
1k
10k
Frequency (Hz)
100k
1M
A1
A2
A3
A4
120
100
80
60
40
20
0
10
100
D017
Figure 17. Power-Supply Rejection Ratio vs Frequency
1k
10k
100k
Frequency (Hz)
1M
10M
D018
Figure 18. Common-Mode Rejection Ratio vs Frequency
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
VS
120
–40°C
25°C
125°C
100
Input Bias Current (PA)
Output Swing (V)
VS – 1
VS – 2
GND + 2
GND + 1
80
60
40
20
0
GND
0
5
10
15
20 25 30 35 40
Output Current (mA)
45
50
55
-20
-5
60
0
5
10
15
20
Common-Mode Voltage (V)
D019
25
30
D020
Supply voltage = 5 V
Figure 19. Output Voltage Swing vs Output Current
Figure 20. Input Bias Current vs Common-Mode Voltage
120
80
79
100
Input Bias Current (PA)
Input Bias Current (PA)
78
80
60
40
20
77
76
75
74
73
72
0
-20
-5
71
0
5
10
15
20
Common-Mode Voltage (V)
25
70
-50
30
-25
0
D021
25
50
75
Temperature (qC)
100
125
150
D022
Supply voltage = 0 V
Figure 21. Input Bias Current vs Common-Mode Voltage
(Both Inputs, Shutdown)
Figure 22. Input Bias Current vs Temperature
380
210
375
Quiescent Current (PA)
Quiescent Current (PA)
205
200
195
190
185
180
-50
365
360
355
350
345
-25
0
25
50
75
Temperature (qC)
100
125
150
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340
-50
-25
0
D023
Figure 23. Quiescent Current vs Temperature (INA181)
12
370
25
50
75
Temperature (qC)
100
125
150
D023
Figure 24. Quiescent Current vs Temperature (INA2181)
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
710
400
705
350
695
Quiescent Current (PA)
Quiescent Current (PA)
700
690
685
680
675
670
665
300
250
200
660
655
650
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
-5
150
Figure 25. Quiescent Current vs Temperature (INA4181)
1450
700
1350
650
1250
600
550
500
450
400
5
10
15
20
Common-Mode Voltage (V)
25
30
D031
Figure 26. IQ vs Common-Mode Voltage (INA181)
750
Quiescent Current (PA)
Quiescent Current (PA)
0
D038
1150
1050
950
850
750
650
350
300
-5
0
5
10
15
20
Common-Mode Voltage (V)
25
30
550
-5
0
D031
Figure 27. IQ vs Common-Mode Voltage (INA2181)
5
10
15
20
Common-Mode Voltage (V)
25
30
D039
Figure 28. IQ vs Common-Mode Voltage (INA4181)
80
70
60
Referred-to-Input
Voltage Noise (200 nV/div)
Input-Referred Voltage Noise (nV/—Hz)
100
50
40
30
20
10
10
100
1k
10k
Frequency (Hz)
100k
Time (1 s/div)
1M
D025
D024
Figure 29. Input-Referred Voltage Noise vs Frequency
(A3 Devices)
Figure 30. 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
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Typical Characteristics (continued)
VCM
VOUT
VOUT (100 mV/div)
Input Voltage
40 mV/div
Common-Mode Voltage (5 V/div)
Output Voltage
2 V/div
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
Time (25 Ps/div)
Time (10 Ps/div)
D027
D026
80-mVPP input step
Figure 31. Step Response
Figure 32. Common-Mode Voltage Transient Response
Voltage (2 V/div)
Noninverting Input
Output
Voltage (2 V/div)
Inverting Input
Output
0V
0V
Time (250 Ps/div)
Time (250 Ps/div)
D028
D029
Figure 33. Inverting Differential Input Overload
Figure 34. Noninverting Differential Input Overload
Supply Voltage
Output Voltage
Voltage (1 V/div)
Voltage (1 V/div)
Supply Voltage
Output Voltage
0V
0V
Time (100 Ps/div)
Time (10 Ps/div)
D032
D030
Figure 35. Start-Up Response
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Figure 36. Brownout Recovery
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
200
100
50
140
A1
A2
A3
A4
20
10
5
2
1
0.5
0.2
0.1
10
Ch1 onto Ch2
Ch2 onto Ch1
130
Channel Separation (dB)
Output Impedance (:)
1000
500
120
110
100
90
80
100
1k
10k
100k
Frequency (Hz)
1M
Figure 37. Output Impedance vs Frequency
10M
70
100
1k
D033
10k
Frequency (Hz)
100k
1M
D034
Figure 38. Channel Separation vs Frequency (INA2181)
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8 Detailed Description
8.1 Overview
The INA181, INA2181, and INA4181 (INAx181) are 26-V common-mode, current-sensing amplifiers used in both
low-side and high-side configurations. These specially-designed, current-sensing amplifiers accurately measure
voltages developed across current-sensing resistors on common-mode voltages that far exceed the supply
voltage powering the device. Current can be measured on input voltage rails as high as 26 V, and the devices
can be powered from supply voltages as low as 2.7 V.
8.2 Functional Block Diagrams
VS
Single-Channel
TI Device
IN±
±
OUT
+
IN+
REF
GND
Figure 39. INA181 Functional Block Diagram
VS
Dual-Channel
TI Device
IN±1
±
OUT1
+
REF1
IN+1
IN±2
±
OUT2
+
REF2
IN+2
GND
Figure 40. INA2181 Functional Block Diagram
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Functional Block Diagrams (continued)
VS
Quad-Channel
TI Device
IN±1
±
OUT1
+
REF1
IN+1
IN±2
±
OUT2
+
REF2
IN+2
IN±3
±
OUT3
+
REF3
IN+3
IN±4
±
OUT4
+
REF4
IN+4
GND
Figure 41. INA4181 Functional Block Diagram
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8.3 Feature Description
8.3.1 High Bandwidth and Slew Rate
The INAx181 support small-signal bandwidths as high as 350 kHz, and large-signal slew rates of 2 V/µs. The
ability to detect rapid changes in the sensed current, as well as the ability to quickly slew the output, make the
INAx181 a good choice for applications that require a quick response to input current changes. One application
that requires high bandwidth and slew rate is low-side motor control, where the ability to follow rapid changing
current in the motor allows for more accurate control over a wider operating range. Another application that
requires higher bandwidth and slew rates is system fault detection, where the INAx181 are used with an external
comparator and a reference to quickly detect when the sensed current is out of range.
8.3.2 Bidirectional Current Monitoring
The INA181 senses current flow through a sense resistor in both directions. The bidirectional current-sensing
capability is achieved by applying a voltage at the REF pin to offset the output voltage. A positive differential
voltage sensed at the inputs results in an output voltage that is greater than the applied reference voltage;
likewise, a negative differential voltage at the inputs results in output voltage that is less than the applied
reference voltage. The output voltage of the current-sense amplifier is shown in Equation 1.
VOUT
I LOAD u RSENSE u GAIN
VREF
where
•
•
•
•
ILOAD is the load current to be monitored.
RSENSE is the current-sense resistor.
GAIN is the gain option of the selected device.
VREF is the voltage applied to the REF pin.
(1)
8.3.3 Wide Input Common-Mode Voltage Range
The INAx181 support input common-mode voltages from –0.2 V to +26 V. Because of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS) as long as VS stays within the operational
range of 2.7 V to 5.5 V. The ability to operate with common-mode voltages greater or less than VS allow the
INAx181 to be used in high-side, as well as low-side, current-sensing applications, as shown in Figure 42.
Bus Supply
±0.2 V to +26 V
Direction of Positive
Current Flow
IN+
RSENSE
High-Side Sensing
Common-mode voltage (VCM)
is bus-voltage dependent.
IN±
LOAD
Direction of Positive
Current Flow
IN+
RSENSE
Low-Side Sensing
Common-mode voltage (VCM)
is always near ground and is
isolated from bus-voltage spikes.
IN±
Figure 42. High-Side and Low-Side Sensing Connections
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Feature Description (continued)
8.3.4 Precise Low-Side Current Sensing
When used in low-side current sensing applications the offset voltage of the INAx181 is within ±150 µV. The low
offset performance of the INAx181 has several benefits. First, the low offset allows these devices to be used in
applications that must measure current over a wide dynamic range. In this case, the low offset improves the
accuracy when the sensed currents are on the low end of the measurement range. Another advantage of low
offset is the ability to sense lower voltage drop across the sense resistor accurately, thus allowing a lower-value
shunt resistor. Lower-value shunt resistors reduce power loss in the current sense circuit, and help improve the
power efficiency of the end application.
The gain error of the INAx181 is specified to be within 1% of the actual value. As the sensed voltage becomes
much larger than the offset voltage, this voltage becomes the dominant source of error in the current sense
measurement.
8.3.5 Rail-to-Rail Output Swing
The INAx181 allow linear current sensing operation with the output close to the supply rail and GND. The
maximum specified output swing to the positive rail is 30 mV, and the maximum specified output swing to GND is
only 5 mV. In order to compare the output swing of the INAx181 to an equivalent operational amplifier (op amp),
the inputs are overdriven to approximate the open-loop condition specified in op amp data sheets. The currentsense amplifier is a closed-loop system; therefore, the output swing to GND can be limited by the product of the
offset voltage and amplifier gain during unidirectional operation (VREF = 0 V).
For devices that have positive offset voltages, the swing to GND is limited by the larger of either the offset
voltage multiplied by the gain or the swing to GND specified in the Electrical Characteristics table.
For example, in an application where the INA181A4 (gain = 200 V/V) is used for low-side current sensing and the
device has an offset of 40 µV, the product of the device offset and gain results in a value of 8 mV, greater than
the specified negative swing value. Therefore, the swing to GND for this example is 8 mV. If the same device
has an offset of –40 µV, then the calculated zero differential signal is –8 mV. In this case, the offset helps
overdrive the swing in the negative direction, and swing performance is consistent with the value specified in the
Electrical Characteristics table.
The offset voltage is a function of the common-mode voltage as determined by the CMRR specification;
therefore, the offset voltage increases when higher common-mode voltages are present. The increase in offset
voltage limits how low the output voltage can go during a zero-current condition when operating at higher
common-mode voltages with VREF = 0 V . The typical limitation of the zero-current output voltage vs commonmode voltage for each gain option is shown in Figure 43.
0.06
A1
A2
A3
A4
Zero Current Output Voltage (V)
0.054
0.048
0.042
0.036
0.03
0.024
0.018
0.012
0.006
0
0
2
4
6
8 10 12 14 16 18 20 22 24 26
Common Mode Voltage (V)
D033
Figure 43. Zero-Current Output Voltage vs Common-Mode Voltage
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8.4 Device Functional Modes
8.4.1 Normal Mode
The INAx181 are in normal operation when the following conditions are met:
• The power supply voltage (VS) is between 2.7 V and 5.5 V.
• The common-mode voltage (VCM) is within the specified range of –0.2 V to +26 V.
• The maximum differential input signal times gain plus VREF is less than VS minus the output voltage swing to
VS.
• The minimum differential input signal times gain plus VREF is greater than the swing to GND (see the Rail-toRail Output Swing section).
During normal operation, these devices produce an output voltage that is the gained-up representation of the
difference voltage from IN+ to IN– plus the reference voltage at VREF.
8.4.2 Unidirectional Mode
These devices can be configured to monitor current flowing in one direction (unidirectional) or in both directions
(bidirectional) depending on how the REF pin is configured. The most common case is unidirectional where the
output is set to ground when no current is flowing by connecting the REF pin to ground, as shown in Figure 44.
When the current flows from the bus supply to the load, the input signal across IN+ to IN– increases, and causes
the output voltage at the OUT pin to increase.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
Single-Channel
TI Device
VS
IN±
OUT
±
Output
+
IN+
REF
GND
Figure 44. Unidirectional Application
The linear range of the output stage is limited by how close the output voltage can approach ground under zero
input conditions. In unidirectional applications where measuring very low input currents is desirable, bias the REF
pin to a convenient value above 50 mV to get the output into the linear range of the device. To limit commonmode rejection errors, buffer the reference voltage connected to the REF pin.
A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This
method results in the output voltage saturating at 200 mV less than the supply voltage when no differential input
signal is present. This method is similar to the output saturated low condition with no input signal when the REF
pin is connected to ground. The output voltage in this configuration only responds to negative currents that
develop negative differential input voltage relative to the device IN– pin. Under these conditions, when the
differential input signal increases negatively, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF pin must not exceed VS.
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Device Functional Modes (continued)
8.4.3 Bidirectional Mode
The INAx181 are bidirectional, current-sense amplifiers capable of measuring currents through a resistive shunt
in two directions. This bidirectional monitoring is common in applications that include charging and discharging
operations where the current flowing through the resistor can change directions.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
Single-Channel
TI Device
VS
Reference
Voltage
IN±
±
OUT
Output
+
IN+
REF
+
GND
±
Figure 45. Bidirectional Application
The ability to measure this current flowing in both directions is enabled by applying a voltage to the REF pin, as
shown in Figure 45. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input
level state. The output then responds by increasing above VREF for positive differential signals (relative to the IN–
pin) and responds by decreasing below VREF for negative differential signals. This reference voltage applied to
the REF pin can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at midscale for equal signal range in both current directions. In some cases, however, VREF is set at a voltage other
than mid-scale when the bidirectional current and corresponding output signal do not need to be symmetrical.
8.4.4 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain exceeds the voltage swing specification, the INAx181 drive
the output as close as possible to the positive supply or ground, and does not provide accurate measurement of
the differential input voltage. If this input overload occurs during normal circuit operation, then reduce the value of
the shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this mode of operation. If a
differential overload occurs in a fault event, then the output of the INAx181 returns to the expected value
approximately 20 µs after the fault condition is removed.
When the INAx181 output is driven to either the supply rail or ground, increasing the differential input voltage
does not damage the device as long as the absolute maximum ratings are not violated. Following these
guidelines, the INAx181 output maintains polarity, and does not suffer from phase reversal.
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Device Functional Modes (continued)
8.4.5 Shutdown Mode
Although the INAx181 do not have a shutdown pin, the low power consumption of these devices allows the
output of a logic gate or transistor switch to power the INAx181. This gate or switch turns on and off the INAx181
power-supply quiescent current.
However, in current shunt monitoring applications, there is also a concern for how much current is drained from
the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the simplified
schematic of the INAx181 in shutdown mode, as shown in Figure 46.
VS
2.7 V to 5.5 V
RPULL-UP
10 k
Bus Voltage
±0.2 V to +26 V
Shutdown
RSENSE
Load
CBYPASS
0.1 µF
VS
Single-Channel
TI Device
IN±
OUT
Output
±
+
IN+
REF
GND
Figure 46. Basic Circuit to Shut Down the INA181 With a Grounded Reference
There is typically more than 500 kΩ of impedance (from the combination of 500-kΩ feedback and
input gain set resistors) from each input of the INAx181 to the OUT pin and to the REF pin. The amount of
current flowing through these pins depends on the voltage at the connection. For example, if the REF pin is
grounded, the calculation of the effect of the 500 kΩ impedance from the shunt to ground is straightforward.
However, if the reference is powered while the INAx181 is in shutdown mode, instead of assuming 500 kΩ to
ground, assume 500 kΩ to the reference voltage.
Regarding the 500-kΩ path to the output pin, the output stage of a disabled INAx181 does constitute a good path
to ground. Consequently, this current is directly proportional to a shunt common-mode voltage present across a
500-kΩ resistor.
As a final note, as long as the shunt common-mode voltage is greater than VS when the device is powered up,
there is an additional and well-matched 55-µA typical current that flows in each of the inputs. If less than VS, the
common-mode input currents are negligible, and the only current effects are the result of the 500-kΩ resistors.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The INAx181 amplify the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground. The ability to drive the reference pin to adjust the functionality of the output signal
offers multiple configurations, as discussed in previous sections.
9.1.1 Basic Connections
Figure 47 shows the basic connections of the INA181. Connect the input pins (IN+ and IN–) as closely as
possible to the shunt resistor to minimize any resistance in series with the shunt resistor.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
Single-Channel
TI Device
IN±
Microcontroller
OUT
±
ADC
+
IN+
REF
GND
NOTE: To help eliminate ground offset errors between the device and the analog-to-digital converter (ADC), connect
the REF pin to the ADC reference input and then to ground. For best performance, use an RC filter between the
output of the INAx181 and the ADC. See Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using
ZOUT for more details.
Figure 47. Basic Connections for the INA181
A power-supply bypass capacitor of at least 0.1 µF is required for proper operation. Applications with noisy or
high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
Connect bypass capacitors close to the device pins.
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Application Information (continued)
9.1.2 RSENSE and Device Gain Selection
The accuracy of the INAx181 is maximized by choosing the current-sense resistor to be as large as possible. A
large sense resistor maximizes the differential input signal for a given amount of current flow and reduces the
error contribution of the offset voltage. However, there are practical limits as to how large the current-sense
resistor can be in a given application. The INAx181 have typical input bias currents of 75 µA for each input when
operated at a 12-V common-mode voltage input. When large current-sense resistors are used, these bias
currents cause increased offset error and reduced common-mode rejection. Therefore, using current-sense
resistors larger than a few ohms is generally not recommended for applications that require current-monitoring
accuracy. A second common restriction on the value of the current-sense resistor is the maximum allowable
power dissipation that is budgeted for the resistor. Equation 2 gives the maximum value for the current sense
resistor for a given power dissipation budget:
PDMAX
RSENSE
IMAX2
where:
•
•
PDMAX is the maximum allowable power dissipation in RSENSE.
IMAX is the maximum current that will flow through RSENSE.
(2)
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing to rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. Equation 3 provides
the maximum values of RSENSE and GAIN to keep the device from hitting the positive swing limitation.
IMAX u RSENSE u GAIN VSP VREF
where:
•
•
•
•
IMAX is the maximum current that will flow through RSENSE.
GAIN is the gain of the current sense-amplifier.
VSP is the positive output swing as specified in the data sheet.
VREF is the externally applied voltage on the REF pin.
(3)
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between
the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for
the maximum power dissipation is too large, then it is possible to select a lower-gain device in order to avoid
positive swing limitations.
The negative swing limitation places a limit on how small of a sense resistor can be used in a given application.
Equation 4 provides the limit on the minimum size of the sense resistor.
IMIN u RSENSE u GAIN > VSN VREF
where:
•
•
•
•
IMIN is the minimum current that will flow through RSENSE.
GAIN is the gain of the current sense amplifier.
VSN is the negative output swing of the device (see Rail-to-Rail Output Swing).
VREF is the externally applied voltage on the REF pin.
(4)
In addition to adjusting the offset and gain, the voltage applied to the REF pin can be slightly increased to avoid
negative swing limitations.
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Application Information (continued)
9.1.3 Signal Filtering
Provided that the INAx181 output is connected to a high impedance input, the best location to filter is at the
device output using a simple RC network from OUT to GND. Filtering at the output attenuates high-frequency
disturbances in the common-mode voltage, differential input signal, and INAx181 power-supply voltage. If filtering
at the output is not possible, or filtering of only the differential input signal is required, it is possible to apply a
filter at the input pins of the device. Figure 48 provides an example of how a filter can be used on the input pins
of the device.
Bus Voltage
±0.2 V to +26 V
RSENSE
Load
f
VS
2.7 V to 5.5 V
1
3dB
2S(RF
RF )CF
VS
Single-Channel
TI Device
RINT
IN±
RF < 10
f±3dB
CF
±
OUT
VOUT
REF
VREF
Bias
+
RF < 10
IN+
RINT
Figure 48. Filter at Input Pins
The addition of external series resistance creates an additional error in the measurement; therefore, the value of
these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal bias
network shown in Figure 48 present at the input pins creates a mismatch in input bias currents when a
differential voltage is applied between the input pins. If additional external series filter resistors are added to the
circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This
mismatch creates a differential error voltage that subtracts from the voltage developed across the shunt resistor.
This error results in a voltage at the device input pins that is different than the voltage developed across the
shunt resistor. Without the additional series resistance, the mismatch in input bias currents has little effect on
device operation. The amount of error these external filter resistors add to the measurement can be calculated
using Equation 6, where the gain error factor is calculated using Equation 5.
The amount of variance in the differential voltage present at the device input relative to the voltage developed at
the shunt resistor is based both on the external series resistance (RF) value as well as internal input resistor RINT,
as shown in Figure 48. The reduction of the shunt voltage reaching the device input pins appears as a gain error
when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be calculated to
determine the amount of gain error that is introduced by the addition of external series resistance. Calculate the
expected deviation from the shunt voltage to what is measured at the device input pins is given using Equation 5:
1250 u RINT
Gain Error Factor
(1250 u RF ) (1250 u RINT ) (RF u RINT )
where:
•
•
RINT is the internal input resistor.
RF is the external series resistance.
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Application Information (continued)
With the adjustment factor from Equation 5, including the device internal input resistance, this factor varies with
each gain version, as shown in Table 1. Each individual device gain error factor is shown in Table 2.
Table 1. Input Resistance
PRODUCT
GAIN
RINT (kΩ)
INAx181A1
20
25
INAx181A2
50
10
INAx181A3
100
5
INAx181A4
200
2.5
Table 2. Device Gain Error Factor
PRODUCT
SIMPLIFIED GAIN ERROR FACTOR
INAx181A1
25000
(21u RF ) 25000
INAx181A2
10000
(9 u RF ) 10000
INAx181A3
1000
RF 1000
INAx181A4
2500
(3 u RF ) 2500
The gain error that can be expected from the addition of the external series resistors can then be calculated
based on Equation 6:
Gain Error (%) = 100 - (100 ´ Gain Error Factor)
(6)
For example, using an INA181A2 and the corresponding gain error equation from Table 2, a series resistance of
10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 6,
resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ω series resistors.
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9.1.4 Summing Multiple Currents
The outputs of the INA2181 are easily summed by connecting the output of one channel to the reference input of
a second channel. The circuit configuration shown in Figure 49 is an easy way to achieve current summing. To
correctly sum multiple output currents the values for the current sense resistor RSENSE must be the same for all
channels.
Power
Supply
Dual-Channel
TI Device
REF1
IN+1
+
RSENSE
OUT1
±
IN±1
LOAD1
REF2
IN+2
+
RSENSE
OUT2
ADC
±
VOUT2 = (ILOAD1 + ILOAD2) × RSENSE × GAIN
IN±2
LOAD2
GND
Figure 49. Summing Multiple Currents
Connect the output of one channel of the INA2181 to the reference input of the other channel. Use the reference
input of the first circuit to set the reference of the final summed output operating point. The currents sensed at
each circuit in the chain are summed at the output of the last device in the chain.
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An example output response of a summing configuration is shown in Figure 50. The reference pin of the first
circuit is connected to ground, and sine waves at different frequencies are applied to the two circuits to produce a
summed output as shown. The sine wave voltage input for the first circuit is offset so that the whole wave is
above GND.
20 mV/div
1 V/div
Output
Inputs
Time (4 ms/div)
VREF = 0 V
Figure 50. Current Summing Application Output Response (A2 Devices)
9.1.5 Detecting Leakage Currents
Occasionally, the need arises to confirm that the current going into a load is identical to the current coming out of
a load; usually, as part of diagnostic testing or fault detection. This situation requires precision current
differencing, which is the same as summing, except that the two amplifiers have the inputs connected opposite of
each other. To correctly detect leakage currents, the values for the current sense resistor RSENSE must be the
same for all channels. Also an external reference voltage must be provided to the REF1 input to allow
bidirectional leakage current detection.
If the current into a load is equal to the current out of the load, then the voltage at OUT2 is the same as the
applied voltage to REF1. To enable accurate differences between the two currents, a reference voltage must be
applied. The reference voltage prevents the output of the device from being driven to ground, and also enables
detection if the current into the load is either greater than or less than the current coming out of the load.
For current differencing, the dual-channel INA2181 must have the inputs connected opposite to each other, as
shown in Figure 51. The reference input of the first channel sets the output quiescent level for all the devices in
the string. Connect the output of the first channel to the reference input of the second channel. The reference
input of the first channel sets the reference at the output. This circuit example is identical to the current summing
example, except that the two shunt inputs are reversed in polarity. Under normal operating conditions, the final
output is very close to the reference value and proportional to any current difference. This current differencing
circuit is useful in detecting when current in to and out of a load do not match.
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Power
Supply
Dual-Channel
TI Device
REF1
IN+1
+
RSENSE
VREF1
OUT1
±
IN±1
LOAD
REF2
IN+2
+
RSENSE
OUT2
ADC
±
VOUT2 = VREF1 if there is no leakage current
IN±2
Figure 51. Detecting Leakage Currents
An example output response of a difference configuration is shown in Figure 52. The reference pin of the first
channel is connected to a reference voltage of 2.048 V. The inputs to each circuit is a 100-Hz sine wave, 180°
out-of-phase with each other, resulting in a zero output as shown. The sine wave input to the first circuit is offset
so that the input wave is completely above GND.
20 mV/div
1 V/div
Output
Inputs
Time (4 ms/div)
VREF = 2.048 V
Figure 52. Current Differencing Application Output Response (A2 Devices)
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9.2 Typical Application
One application for the INAx181 is to monitor bidirectional currents. Bidirectional currents are present in systems
that have to monitor currents in both directions; common examples are monitoring the charging and discharging
of batteries and bidirectional current monitoring in motor control. The device configuration for bidirectional current
monitoring is shown in Figure 53. Applying stable REF pin voltage closer to the middle of device supply voltage
allows both positive- and negative-current monitoring, as shown in this configuration. Configure the INAx181 to
monitor unidirectional currents by grounding the REF pin.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
Single-Channel
TI Device
VS
Reference
Voltage
IN±
±
OUT
Output
+
IN+
REF
+
±
GND
Figure 53. Measuring Bidirectional Current
9.2.1 Design Requirements
The design requirements for the circuit shown in Figure 53, are listed in Table 3
Table 3. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power-supply voltage, VS
5V
Bus supply rail, VCM
12 V
RSENSE power loss
< 450 mW
Maximum sense current, IMAX
±20 A
Current sensing error
Less than 3.5% at maximum current, TJ = 25°C
Small-signal bandwidth
> 100 kHz
9.2.2 Detailed Design Procedure
The maximum value of the current sense resistor is calculated based on the maximum power loss requirement.
By applying Equation 2, the maximum value of the current-sense resistor is calculated to be 1.125 mΩ. This is
the maximum value for sense resistor RSENSE; therefore, select RSENSE to be 1 mΩ because it is the closest
standard resistor value that meets the power-loss requirement.
The next step is to select the appropriate gain and reduce RSENSE, if needed, to keep the output signal swing
within the VS range. The design requirements call for bidirectional current monitoring; therefore, a voltage
between 0 and VS must be applied to the REF pin. The bidirectional currents monitored are symmetric around 0
(that is, ±20 A); therefore, the ideal voltage to apply to VREF is VS / 2 or 2.5 V. If the positive current is greater
than the negative current, using a lower voltage on VREF has the benefit of maximizing the output swing for the
given range of expected currents. Using Equation 3, and given that IMAX = 20 A , RSENSE = 1 mΩ, and VREF = 2.5
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V, the maximum current-sense gain calculated to avoid the positive swing-to-rail limitations on the output is
122.5. Likewise, using Equation 4 for the negative-swing limitation results in a maximum gain of 124.75.
Selecting the gain-of-100 device maximizes the output range while staying within the output swing range. If the
maximum calculated gains are slightly less than 100, the value of the current-sense resistor can be reduced to
keep the output from hitting the output-swing limitations.
To calculate the accuracy at peak current, the two factors that must be determined are the gain error and the
offset error. The gain error of the INAx181 is specified to be a maximum of 1%. The error due to the offset is
constant, and is specified to be 500 µV (maximum) for the conditions where VCM = 12 V and VS = 5 V. Using
Equation 7, the percentage error contribution of the offset voltage is calculated to be 2.5%, with total offset error
= 500 µV, RSENSE = 1 mΩ, and ISENSE = 20 A.
Total Offset Error (V)
Total Offset Error (%) =
u 100%
ISENSE u RSENSE
(7)
One method of calculating the total error is to add the gain error to the percentage contribution of the offset error.
However, in this case, the gain error and the offset error do not have an influence or correlation to each other. A
more statistically accurate method of calculating the total error is to use the RSS sum of the errors, as shown in
Equation 8:
Total Error (%) = Total Gain Error (%)2 + Total Offset Error (%)2
(8)
After applying Equation 8, the total current sense error at maximum current is calculated to be 2.7%, and that is
less than the design example requirement of 3.5%.
The INA181A3 (gain = 100) also has a bandwidth of 150 kHz that meets the small-signal bandwidth requirement
of 100 kHz. If higher bandwidth is required, lower-gain devices can be used at the expense of either reduced
output voltage range or an increased value of RSENSE.
9.2.3 Application Curve
Output Voltage
(1 V/div)
An example output response of a bidirectional configuration is shown in Figure 54. With the REF pin connected
to a reference voltage (2.5 V in this case), the output voltage is biased upwards by this reference level. The
output rises above the reference voltage for positive differential input signals, and falls below the reference
voltage for negative differential input signals.
VOUT
VREF
0V
Time (500 µs/div)
C002
Figure 54. Bidirectional Application Output Response
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10 Power Supply Recommendations
The input circuitry of the INAx181 accurately measures beyond the power-supply voltage, VS. For example, VS
can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 26 V. However, the output voltage
range of the OUT pin is limited by the voltages on the VS pin. The INAx181 also withstand the full differential
input signal range up to 26 V at the IN+ and IN– input pins, regardless of whether or not the device has power
applied at the VS pin.
10.1 Common-Mode Transients Greater Than 26 V
With a small amount of additional circuitry, the INAx181 can be used in circuits subject to transients higher than
26 V, such as automotive applications. Use only Zener diodes or Zener-type transient absorbers (sometimes
referred to as transzorbs)—any other type of transient absorber has an unacceptable time delay. Start by adding
a pair of resistors as a working impedance for the Zener diode; see Figure 55. Keep these resistors as small as
possible; most often, around 10 Ω. Larger values can be used with an effect on gain that is discussed in the
Signal Filtering section. This circuit limits only short-term transients; therefore, many applications are satisfied
with a 10-Ω resistor along with conventional Zener diodes of the lowest acceptable power rating. This
combination uses the least amount of board space. These diodes can be found in packages as small as SOT523 or SOD-523.
VS
2.7 V to 5.5 V
Bus Supply
±0.2 V to +26 V
CBYPASS
0.1 µF
RSENSE
Load
Single-Channel
TI Device
VS
IN±
±
RPROTECT
< 10
OUT
Output
+
REF
IN+
GND
Figure 55. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in Figure 56. The most space-efficient solutions are dual, seriesconnected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in Figure 55 and
Figure 56, the total board area required by the INAx181 with all protective components is less than that of an
SO-8 package, and only slightly greater than that of an MSOP-8 package.
VS
2.7 V to 5.5 V
Bus Supply
±0.2 V to +26 V
CBYPASS
0.1 µF
RSENSE
Load
< 10
Single-Channel
TI Device
VS
IN±
±
Transorb
OUT
Output
+
< 10
REF
IN+
GND
Figure 56. Transient Protection Using a Single Transzorb and Input Clamps
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Common-Mode Transients Greater Than 26 V (continued)
For more information, see Current Shunt Monitor With Transient Robustness Reference Design.
11 Layout
11.1 Layout Guidelines
•
•
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added
to compensate for noisy or high-impedance power supplies.
When routing the connections from the current sense resistor to the device, keep the trace lengths as close
as possible in order to minimize any impedance mismatch..
11.2 Layout Example
Direction of Positive
Current Flow
RSHUNT
Bus Voltage:
±0.2 V to +26 V
Connect REF to low
impedance voltage reference
or to GND pin if not used.
IN± 4
3 IN+
REF 5
2 GND
VS 6
1 OUT
Current
Sense
VIA to Ground
Plane
Power-Supply, VS
2.7 V to 5.5 V
CBYPASS
Figure 57. Single-Channel Recommended Layout
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Layout Example (continued)
Bus Voltage:
±0.2 V to +26 V
VIA to connect REF pins to low
impedance voltage reference or
to GND pin if not used.
VIA to
Ground
Plane
RSHUNT2
REF2 6
5 REF1
IN+2 7
4 GND
IN±2 8
3 IN+1
OUT2 9
2 IN±1
VS 10
Current Sense
Output 2
RSHUNT1
1 OUT1
CBYPASS
Power Supply, VS:
2.7 V to 5.5 V
Current Sense
Output 1
Load 2
Load 1
Figure 58. Dual-Channel Recommended Layout (VSSOP)
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Layout Example (continued)
Bus Voltage:
±0.2 V to +26 V
VIA to connect REF pins to low
impedance voltage reference or
to GND pin if not used.
VIA to
Ground
Plane
RSHUNT2
REF2 6
5 REF1
IN+2 7
4 GND
IN±2 8
3 IN+1
OUT2 9
2 IN±1
VS 10
Current Sense
Output 2
RSHUNT1
1 OUT1
CBYPASS
Current Sense
Output 1
Power Supply, VS:
2.7 V to 5.5 V
Load 2
Load 1
Figure 59. Dual-Channel Recommended Layout (WSON)
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Layout Example (continued)
Load 2
Load 3
Current Sense
Output 3
NC 11
RSHUNT3
VIA to
Ground
Plane
Bus Voltage 3:
±0.2 V to +26 V
Current Sense
Output 2
Connect to GND or
External Reference
10 NC
REF3 12
9 REF2
OUT3 13
8 OUT2
IN±3 14
7 IN±2
IN+3 15
6 IN+2
GND 16
5 VS
IN+4 17
4 IN+1
IN±4 18
3 IN±1
OUT4 19
2 OUT1
REF4 20
1 REF1
Current Sense
Output 4
RSHUNT2
CBYPASS
Bus Voltage 2:
±0.2 V to +26 V
VIA to
Ground
Plane
Power Supply, VS:
2.7 V to 5.5 V
Current Sense
Output 1
Load1
Bus Voltage 4:
±0.2 V to +26 V
RSHUNT4
Bus Voltage 1:
±0.2 V to +26 V
RSHUNT1
Load 4
Load 1
Figure 60. Quad-Channel Recommended Layout
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Development Support
Current Shunt Monitor With Transient Robustness Reference Design
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation see the following:
• Texas Instruments, INA180-181EVM User's Guide
• Texas Instruments, INA2180-2181EVM User's Guide
• Texas Instruments, INA4180-4181EVM User's Guide
12.3 Related Links
Table 4 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to order now.
Table 4. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
INA181
Click here
Click here
Click here
Click here
Click here
INA2181
Click here
Click here
Click here
Click here
Click here
INA4181
Click here
Click here
Click here
Click here
Click here
12.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.5 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.6 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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27-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
INA181A1IDBVR
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
18JD
INA181A1IDBVT
ACTIVE
SOT-23
DBV
6
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
18JD
INA181A2IDBVR
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1AED
INA181A2IDBVT
ACTIVE
SOT-23
DBV
6
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1AED
INA181A3IDBVR
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1AFD
INA181A3IDBVT
ACTIVE
SOT-23
DBV
6
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1AFD
INA181A4IDBVR
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1AGD
INA181A4IDBVT
ACTIVE
SOT-23
DBV
6
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1AGD
INA2181A1IDGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1CW6
INA2181A1IDGST
ACTIVE
VSSOP
DGS
10
250
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1CW6
INA2181A1IDSQR
ACTIVE
WSON
DSQ
10
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25IY
INA2181A1IDSQT
ACTIVE
WSON
DSQ
10
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25IY
INA2181A2IDGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1DR6
INA2181A2IDGST
ACTIVE
VSSOP
DGS
10
250
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1DR6
INA2181A2IDSQR
ACTIVE
WSON
DSQ
10
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25JY
INA2181A2IDSQT
ACTIVE
WSON
DSQ
10
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25JY
INA2181A3IDGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1DS6
INA2181A3IDGST
ACTIVE
VSSOP
DGS
10
250
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1DS6
INA2181A3IDSQR
ACTIVE
WSON
DSQ
10
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25KY
INA2181A3IDSQT
ACTIVE
WSON
DSQ
10
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25KY
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
27-Aug-2021
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
INA2181A4IDGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1DT6
INA2181A4IDGST
ACTIVE
VSSOP
DGS
10
250
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1DT6
INA2181A4IDSQR
ACTIVE
WSON
DSQ
10
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25LY
INA2181A4IDSQT
ACTIVE
WSON
DSQ
10
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
25LY
INA4181A1IPWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4181A1
INA4181A2IPWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4181A2
INA4181A3IPWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4181A3
INA4181A4IPWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4181A4
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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