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INA185
SBOS378 – MARCH 2019
INA185 Ultra-small, bidirectional, precision low-side and high-side, voltage output
current-sense amplifier in SOT-563
1 Features
3 Description
•
The INA185 current sense amplifier is designed for
use in cost-sensitive space constrained applications.
This device is a bidirectional, current-sense amplifier
(also called a current-shunt monitor) that senses
voltage drop across a current-sense resistor at
common-mode voltages from –0.2 V to +26 V,
independent of the supply voltage. The INA185
integrates a matched resistor gain network in four,
fixed-gain device options: 20 V/V, 50 V/V, 100 V/V, or
200 V/V. This matched gain resistor network
minimizes gain error and reduces the temperature
drift.
1
•
•
•
•
•
•
•
•
SOT-563 package (1.6 mm × 1.6 mm)
– 39% smaller footprint than SC70
– 0.55 mm package height
Common-mode range (VCM): –0.2 V to +26 V
High bandwidth: 350 kHz (A1 devices)
Offset voltage:
– ±55 µV (max) at VCM = 0 V
– ±100 µV (max) at VCM = 12 V (A4 device)
Output slew rate: 2 V/µs
Bidirectional current-sensing capability
Accuracy:
– ±0.2% maximum gain error (A1, A2, A3)
– 0.5-µV/°C maximum offset drift
Gain options:
– 20 V/V (A1 devices)
– 50 V/V (A2 devices)
– 100 V/V (A3 devices)
– 200 V/V (A4 devices)
Quiescent current: 260 µA (max)
The INA185 operates from a single 2.7-V to 5.5-V
power supply. The device draws a maximum supply
current of 260 µA and features high slew rate and
bandwidth making this device an excellent choice for
many power-supply and motor-control applications.
The INA185 is available in a low profile 6-pin, SOT563 package, and has a body size of size of only
2.56 mm2, including the device pins. All device
options are specified over the extended operating
temperature range of –40°C to +125°C.
Device Information(1)
PART NUMBER
2 Applications
•
•
•
•
•
•
INA185
Motor control
Battery monitoring
Power management
Lighting control
Overcurrent detection
Solar inverters
PACKAGE
SOT-563 (6)
BODY SIZE (NOM)
1.60 mm × 1.60 mm
(including pins)
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Typical Application Circuit
Bus Voltage, VCM
Up To 26 V
Power Sup ply, VS
2.7 V to 5.5 V
RSENS E
Loa d
INA185
VS
Microco ntr oller
IN±
±
OUT
ADC
+
IN+
REF
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA185
SBOS378 – MARCH 2019
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
8
8.1 Application Information............................................ 17
8.2 Typical Application .................................................. 21
9
Overview .................................................................
Functional Block Diagrams .....................................
Feature Description.................................................
Device Functional Modes........................................
Power Supply Recommendations...................... 23
9.1 Common-Mode Transients Greater Than 26 V ...... 23
10 Layout................................................................... 24
10.1 Layout Guidelines ................................................. 24
10.2 Layout Example .................................................... 24
11 Device and Documentation Support ................. 25
11.1
11.2
11.3
11.4
11.5
11.6
11.7
Detailed Description ............................................ 12
7.1
7.2
7.3
7.4
Application and Implementation ........................ 17
12
12
12
14
Device Support......................................................
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
25
25
25
25
25
25
25
12 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
2
DATE
REVISION
NOTES
March 2019
*
Initial release.
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5 Pin Configuration and Functions
INA185: DRL Package
6-Pin SOT-563
Top View
OUT
1
6
VS
GND
2
5
REF
IN+
3
4
IN±
Not to scale
Pin Functions
PIN
NAME
NO.
TYPE
DESCRIPTION
GND
2
Analog
Ground
IN–
4
Analog input
Current-sense amplifier negative input. For high-side applications, connect to load
side of sense resistor. For low-side applications, connect to ground side of sense
resistor.
IN+
3
Analog input
Current-sense amplifier positive input. For high-side applications, connect to busvoltage side of sense resistor. For low-side applications, connect to load side of
sense resistor.
OUT
1
Analog output
Output voltage
REF
5
Analog input
Reference input
VS
6
Analog
Power supply, 2.7 V to 5.5 V
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VS
MAX
Supply voltage
6
Differential (VIN+) – (VIN–)
Analog inputs, IN+, IN– (2)
Common-mode (3)
–26
26
GND – 0.3
26
UNIT
V
V
VREF
Reference voltage
GND – 0.3
VS + 0.3
VOUT
Output voltage (3)
GND – 0.3
VS + 0.3
V
TA
Operating temperature
–55
150
°C
TJ
Junction temperature
150
°C
Tstg
Storage temperature
150
°C
(1)
(2)
(3)
–65
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
Input voltage at any pin can exceed the voltage shown if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±3000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
-0.2
12
26
Operating supply voltage
2.7
5
5.5
V
Operating free-air temperature
–40
125
°C
VCM
Common-mode input voltage
VS
TA
UNIT
V
6.4 Thermal Information
INA185
THERMAL METRIC
(1)
DRL (SOT-563)
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
230.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
94.1
°C/W
RθJB
Junction-to-board thermal resistance
112.8
°C/W
ψJT
Junction-to-top characterization parameter
3.8
°C/W
ψJB
Junction-to-board characterization parameter
112.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
A1 device
86
100
A2, A3 devices
96
100
106
120
MAX
UNIT
INPUT
CMRR
Common-mode rejection
ratio, RTI (1)
VIN+ = 0 V to 26 V, VSENSE = 0 mV,
TA = –40°C to +125°C
A4 devices
VSENSE = 0 mV, VIN+ = 0 V
VOS
Offset voltage, RTI
VSENSE = 0 mV, VIN+ = 12 V
dB
A1 devices
±25
±135
A2, A3, A4
devices
±5
±55
A1 devices
±100
±450
A2, A3 devices
±25
±130
A4 device
±25
±100
μV
dVOS/dT
Offset drift, RTI
VSENSE = 0 mV, TA = –40°C to +125°C
0.2
0.5
μV/°C
PSRR
Power supply rejection ratio,
RTI
VS = 2.7 V to 5.5 V, VIN+ = 12 V, VSENSE = 0 mV
±8
±30
μV/V
IIB
Input bias current
IIO
Input offset current
VSENSE = 0 mV, VCM = 0 V
-6
VSENSE = 0 mV
75
VSENSE = 0 mV
±0.05
μA
μA
OUTPUT
A1 devices
G
Gain
EG
Gain error
VOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
Gain error drift
TA = –40°C to +125°C
Nonlinearity error
VOUT = 0.5 V to VS – 0.5 V
Maximum capacitive load
No sustained oscillation
VOLTAGE OUTPUT
VSP
20
A2 devices
50
A3 devices
100
A4 devices
200
A1, A2, A3
devices
±0.05%
±0.2%
A4 device
±0.07%
±0.25%
1.5
8
V/V
ppm/°C
±0.01%
1
nF
(2)
Swing to VS
RL = 10 kΩ to GND, TA = –40°C to +125°C
VSN
Swing to GND
RL = 10 kΩ to GND, VIN+ – VIN– = –10mV,
TA = –40°C to +125°C
(V+) – 0.02
(V+) – 0.026
V
(VGND) +
0.0005
(VGND) +
0.0035
V
VSG
Zero current swing to GND
RL = Open, VIN+ – VIN– = 0mV,
VREF = 0 V, TA = –40°C to +125°C
A1 devices
(VGND) +
0.0005
(VGND) +
0.006
A2, A3, A4
devices
(VGND) +
0.0005
(VGND) +
0.012
A1 devices
350
A2 devices
210
A3 devices
150
A4 devices
105
V
FREQUENCY RESPONSE
BW
Bandwidth
SR
Slew rate
NOISE, RTI
(1)
CLOAD = 10 pF
Voltage noise density
kHz
2
V/μs
40
nV/√Hz
POWER SUPPLY
IQ
(1)
(2)
Quiescent current
VSENSE = 0 mV
200
VSENSE = 0 mV, TA = –40°C to +125°C
260
300
μA
RTI = referred-to-input.
See Typical Characteristic curve, Output Voltage Swing vs Output Current (Figure 19).
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6.6 Typical Characteristics
-440
-400
-360
-320
-280
-240
-200
-160
-120
-80
-40
0
40
80
120
160
200
240
280
320
360
400
-170
-155
-140
-125
-110
-95
-80
-65
-50
-35
-20
-5
10
25
40
55
70
85
100
115
130
145
Population
Population
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D001
Input Offset Voltage (PV)
Input Offset Voltage (PV)
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Population
Figure 2. Input Offset Voltage Production Distribution A2
-195
-180
-165
-150
-135
-120
-105
-90
-75
-60
-45
-30
-15
0
15
30
45
60
75
90
105
120
Population
Figure 1. Input Offset Voltage Production Distribution A1
D002
D003
Input Offset Voltage (PV)
Input Offset Voltage (PV)
Figure 3. Input Offset Voltage Production Distribution A3
D004
Figure 4. Input Offset Voltage Production Distribution A4
A1
A2
A3
A4
50
Population
Offset Voltage ( PV)
100
0
-100
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
D005
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
35
40
45
50
-50
Common-Mode Rejection Ratio (PV/V)
Figure 5. Offset Voltage vs Temperature
6
D006
Figure 6. Common-Mode Rejection Production Distribution
A1
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Typical Characteristics (continued)
-11
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
10
Population
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
10
12
14
16
18
20
22
Population
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D007
Common-Mode Rejection Ratio (PV/V)
D008
Common-Mode Rejection Ratio (PV/V)
Figure 7. Common-Mode Rejection Production Distribution
A2
Figure 8. Common-Mode Rejection Production Distribution
A3
A1
A2
A3
A4
8
6
4
2
0
-2
-4
-6
-8
-10
-50
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
10
11
Population
Common-Mode Rejection Ratio (PV/V)
10
-25
0
25
50
75
Temperature (qC)
100
125
150
D010
D009
Common-Mode Rejection Ratio (PV/V)
Figure 9. Common-Mode Rejection Production Distribution
A4
Gain Error (%)
D011
Figure 11. Gain Error Production Distribution A1
-0.16
-0.145
-0.13
-0.115
-0.1
-0.085
-0.07
-0.055
-0.04
-0.025
-0.01
0.005
0.02
0.035
0.05
0.065
0.08
0.095
0.11
0.125
0.14
0.155
-0.14
-0.13
-0.12
-0.11
-0.1
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
Population
Population
Figure 10. Common-Mode Rejection Ratio vs Temperature
Gain Error (%)
D012
Figure 12. Gain Error Production Distribution A2
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Typical Characteristics (continued)
-0.29
-0.265
-0.24
-0.215
-0.19
-0.165
-0.14
-0.115
-0.09
-0.065
-0.04
-0.015
0.01
0.035
0.06
0.085
0.11
0.135
0.16
0.185
0.21
0.235
Population
-0.17
-0.155
-0.14
-0.125
-0.11
-0.095
-0.08
-0.065
-0.05
-0.035
-0.02
-0.005
0.01
0.025
0.04
0.055
0.07
0.085
0.1
0.115
0.13
0.145
Population
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D013
Gain Error (%)
Figure 13. Gain Error Production Distribution A3
Figure 14. Gain Error Production Distribution A4
50
0.4
A1
A2
A3
A4
0.3
0.2
A1
A2
A3
A4
40
30
0.1
Gain (dB)
Gain Error (%)
D014
Gain Error (%)
0
-0.1
20
10
-0.2
0
-0.3
-0.4
-50
-25
0
25
50
75
Temperature (qC)
100
125
-10
10
150
100
Figure 15. Gain Error vs Temperature
Common-Mode Rejection Ratio (dB)
Power-Supply Rejection Ratio (dB)
1M
10M
D016
140
100
80
60
40
20
100
1k
10k
Frequency (Hz)
100k
1M
A1
A2
A3
A4
120
100
80
60
40
20
0
10
D017
Figure 17. Power-Supply Rejection Ratio vs Frequency
8
10k
100k
Frequency (Hz)
Figure 16. Gain vs Frequency
120
0
10
1k
D015
100
1k
10k
100k
Frequency (Hz)
1M
10M
D018
Figure 18. Common-Mode Rejection Ratio vs Frequency
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
VS
120
–40°C
25°C
125°C
100
Input Bias Current (PA)
Output Swing (V)
VS – 1
VS – 2
GND + 2
GND + 1
80
60
40
20
0
GND
0
5
10
15
20 25 30 35 40
Output Current (mA)
45
50
55
-20
-5
60
0
5
10
15
20
Common-Mode Voltage (V)
D019
25
30
D020
Supply voltage = 5 V
Figure 19. Output Voltage Swing vs Output Current
Figure 20. Input Bias Current vs Common-Mode Voltage
120
80
79
100
Input Bias Current (PA)
Input Bias Current (PA)
78
80
60
40
20
77
76
75
74
73
72
0
-20
-5
71
0
5
10
15
20
Common-Mode Voltage (V)
25
70
-50
30
-25
D021
0
25
50
75
Temperature (qC)
100
125
150
D022
Supply voltage = 0 V
Figure 21. Input Bias Current vs Common-Mode Voltage
(Both Inputs, Shutdown)
Figure 22. Input Bias Current vs Temperature
210
400
350
Quiescent Current (PA)
Quiescent Current (PA)
205
200
195
190
250
200
185
180
-50
300
-25
0
25
50
75
Temperature (qC)
100
125
150
150
-5
D023
Figure 23. Quiescent Current vs Temperature
0
5
10
15
20
Common-Mode Voltage (V)
25
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D031
Figure 24. IQ vs Common-Mode Voltage
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
Referred-to-Input
Voltage Noise (200 nV/div)
80
70
60
50
40
30
20
10
10
100
1k
10k
Frequency (Hz)
100k
Time (1 s/div)
1M
D025
D024
Figure 26. 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
VCM
VOUT
Input Voltage
40 mV/div
Common-Mode Voltage (5 V/div)
Output Voltage
2 V/div
Figure 25. Input-Referred Voltage Noise vs Frequency
(A3 Devices)
VOUT (100 mV/div)
Input-Referred Voltage Noise (nV/—Hz)
100
Time (25 Ps/div)
Time (10 Ps/div)
D027
D026
80-mVPP input step
Figure 27. Step Response
Figure 28. Common-Mode Voltage Transient Response
Voltage (2 V/div)
Noninverting Input
Output
Voltage (2 V/div)
Inverting Input
Output
0V
0V
Time (250 Ps/div)
Time (250 Ps/div)
D028
Figure 29. Inverting Differential Input Overload
10
D029
Figure 30. Noninverting Differential Input Overload
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
Supply Voltage
Output Voltage
Voltage (1 V/div)
Voltage (1 V/div)
Supply Voltage
Output Voltage
0V
0V
Time (100 Ps/div)
Time (10 Ps/div)
D032
D030
Figure 31. Start-Up Response
Output Impedance (:)
1000
500
200
100
50
Figure 32. Brownout Recovery
A1
A2
A3
A4
20
10
5
2
1
0.5
0.2
0.1
10
100
1k
10k
100k
Frequency (Hz)
1M
10M
D033
Figure 33. Output Impedance vs Frequency
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7 Detailed Description
7.1 Overview
The INA185 is a 26-V common-mode current-sensing amplifier used in both low-side and high-side
configurations. This specially-designed, current-sensing amplifier accurately measures voltages developed
across current-sensing resistors on common-mode voltages that far exceed the supply voltage powering the
device. Current can be measured on input voltage rails as high as 26 V, and the device can be powered from
supply voltages as low as 2.7 V.
7.2 Functional Block Diagrams
VS
INA185
IN±
±
OUT
+
IN+
REF
GND
7.3 Feature Description
7.3.1 High Bandwidth and Slew Rate
The INA185 supports small-signal bandwidths as high as 350 kHz, and large-signal slew rates of 2 V/µs. The
ability to detect rapid changes in the sensed current, as well as the ability to quickly slew the output, make the
INA185 a good choice for applications that require a quick response to input current changes. One application
that requires high bandwidth and slew rate is low-side motor control, where the ability to follow rapid changing
current in the motor allows for more accurate control over a wider operating range. Another application that
requires higher bandwidth and slew rates is system fault detection, where the INA185 is used with an external
comparator and a reference to quickly detect when the sensed current is out of range.
7.3.2 Bidirectional Current Monitoring
The INA185 senses current flow through a sense resistor in both directions. The bidirectional current-sensing
capability is achieved by applying a voltage at the REF pin to offset the output voltage. A positive differential
voltage sensed at the inputs results in an output voltage that is greater than the applied reference voltage.
Likewise, a negative differential voltage at the inputs results in output voltage that is less than the applied
reference voltage. The output voltage of the current-sense amplifier is shown in Equation 1.
VOUT
I LOAD u RSENSE u GAIN
VREF
where
•
•
•
•
12
ILOAD is the load current to be monitored.
RSENSE is the current-sense resistor.
GAIN is the gain option of the selected device.
VREF is the voltage applied to the REF pin.
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Feature Description (continued)
7.3.3 Wide Input Common-Mode Voltage Range
The INA185 supports input common-mode voltages from –0.2 V to +26 V. Because of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS) as long as VS stays within the operational
range of 2.7 V to 5.5 V. The ability to operate with common-mode voltages greater or less than VS allows the
INA185 to be used in high-side, as well as low-side, current-sensing applications, as shown in Figure 34.
Bus Supply
±0.2 V to +26 V
Direction of Positive
Current Flow
IN+
RSENSE
High-Side Sensing
Common-mode voltage (VCM)
is bus-voltage dependent.
IN±
LOAD
Direction of Positive
Current Flow
IN+
RSENSE
Low-Side Sensing
Common-mode voltage (VCM)
is always near ground and is
isolated from bus-voltage spikes.
IN±
Figure 34. High-Side and Low-Side Sensing Connections
7.3.4 Precise Low-Side Current Sensing
When used in low-side current sensing applications, the offset voltage of the INA185 is within ±55 µV for A2, A3
and A4 devices. The low offset performance of the INA185 has two main benefits. First, the low offset allows
these devices to be used in applications that must measure current over a wide dynamic range. In this case, the
low offset improves the accuracy when the sensed currents are on the low end of the measurement range. The
other advantage of low offset is the ability to sense lower voltage drop across the sense resistor accurately, thus
allowing a lower-value shunt resistor. Lower-value shunt resistors reduce power loss in the current sense circuit,
and help improve the power efficiency of the end application.
The gain error of the INA185 is specified to be within 0.2% of the actual value for A1, A2, and A3 devices. As the
sensed voltage becomes much larger than the offset voltage, this voltage becomes the dominant source of error
in the current sense measurement.
7.3.5 Rail-to-Rail Output Swing
The INA185 allows linear current sensing operation with the output close to the supply rail and GND. The
maximum specified output swing to the positive rail is 25 mV, and the maximum specified output swing to GND is
only 3.5 mV. In order to compare the output swing of the INA185 to an equivalent operational amplifier (op amp),
the inputs are overdriven to approximate the open-loop condition specified in many op amp data sheets. The
current-sense amplifier is a closed-loop system; therefore, the output swing to GND can be limited by the offset
voltage and amplifier gain during unidirectional operation (VREF = 0 V) when there is zero current flowing through
the sense resistor. To define the maximum output voltage under the zero current condition, the INA185 Electrical
Characteristics table specifies a maximum output voltage of 6 mV for the A1 device, and 12 mV for all other
devices.
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7.4 Device Functional Modes
7.4.1 Normal Mode
The INA185 is in normal operation when the following conditions are met:
• The power supply voltage (VS) is between 2.7 V and 5.5 V.
• The common-mode voltage (VCM) is within the specified range of –0.2 V to +26 V.
• The maximum differential input signal times gain plus VREF is less than VS minus the output voltage swing to
VS.
• The minimum differential input signal times gain plus VREF is greater than the swing to GND (see the Rail-toRail Output Swing section).
During normal operation, these devices produce an output voltage that is the gained-up representation of the
difference voltage from IN+ to IN– plus the reference voltage at VREF.
7.4.2 Unidirectional Mode
This device is capable of monitoring current flowing in one direction (unidirectional) or in both directions
(bidirectional) depending on how the REF pin is configured. The most common case is unidirectional, where the
output is set to ground when no current is flowing by connecting the REF pin to ground, as shown in Figure 35.
When the current flows from the bus supply to the load, the input signal across IN+ to IN– increases, and causes
the output voltage at the OUT pin to increase.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
INA185
VS
IN±
OUT
±
Output
+
IN+
REF
GND
Figure 35. Unidirectional Application
The linear range of the output stage is limited by how close the output voltage can approach ground under zero
input conditions. In unidirectional applications where measuring very low input currents is desirable, bias the REF
pin to a convenient value above 50 mV to get the output into the linear range of the device. To limit commonmode rejection errors, buffer the reference voltage connected to the REF pin.
A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This
method results in the output voltage saturating at 25 mV less than the supply voltage when no differential input
signal is present. This method is similar to the output saturated low condition with no input signal when the REF
pin is connected to ground. The output voltage in this configuration only responds to negative currents that
develop negative differential input voltage relative to the device IN– pin. Under these conditions, when the
differential input signal increases negatively, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF pin must not exceed VS.
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Device Functional Modes (continued)
7.4.3 Bidirectional Mode
The INA185 is a bidirectional current-sense amplifier capable of measuring currents through a resistive shunt in
two directions. This bidirectional monitoring is common in applications that include charging and discharging
operations where the current flowing through the resistor can change directions.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA185
Reference
Voltage
IN±
±
OUT
Output
+
IN+
REF
+
GND
±
Figure 36. Bidirectional Application
The ability to measure this current flowing in both directions is enabled by applying a voltage to the REF pin, as
shown in Figure 36. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input
level state. The output then responds by increasing above VREF for positive differential signals (relative to the IN–
pin) and responds by decreasing below VREF for negative differential signals. This reference voltage applied to
the REF pin can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at midscale for equal signal range in both current directions. In some cases, however, VREF is set at a voltage other
than midscale when the bidirectional current and corresponding output signal do not need to be symmetrical.
7.4.4 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain plus the reference voltage exceeds the voltage swing
specification, the INA185 drives the output as close as possible to the positive supply or ground, and does not
provide accurate measurement of the differential input voltage. If this input overload occurs during normal circuit
operation, then reduce the value of the shunt resistor or use a lower-gain version with the chosen sense resistor
to avoid this mode of operation. If a differential overload occurs in a fault event, then the output of the INA185
returns to the expected value approximately 20 µs after the fault condition is removed.
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Device Functional Modes (continued)
7.4.5 Shutdown Mode
Although the INA185 does not have a shutdown pin, the low power consumption of these devices allows the
output of a logic gate or transistor switch to power the INA185. This gate or switch turns on and off the INA185
power-supply quiescent current.
However, in current shunt monitoring applications, there is also a concern for how much current is drained from
the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the simplified
schematic of the INA185 in shutdown mode, as shown in Figure 37.
VS
2.7 V to 5.5 V
RPULL-UP
10 k
Bus Voltage
±0.2 V to +26 V
Shutdown
RSENSE
Load
CBYPASS
0.1 µF
VS
INA185
IN±
OUT
Output
±
+
IN+
REF
GND
Figure 37. Basic Circuit to Shut Down the INA185 With a Grounded Reference
There is typically more than 500 kΩ of impedance (from the combination of 500-kΩ feedback and
input gain set resistors) from each input of the INA185 to the OUT pin and to the REF pin. The amount of current
flowing through these pins depends on the voltage at the connection. For example, if the REF pin is grounded,
the calculation of the effect of the 500 kΩ impedance from the shunt to ground is straightforward. However, if the
reference is powered while the INA185 is in shutdown mode, instead of assuming 500 kΩ to ground, assume
500 kΩ to the reference voltage.
Regarding the 500-kΩ path to the output pin, the output stage of a disabled INA185 does constitute a good path
to ground. Consequently, this current is directly proportional to a shunt common-mode voltage present across a
500-kΩ resistor.
As a final note, as long as the shunt common-mode voltage is greater than VS when the device is powered up,
there is an additional and well-matched 55-µA typical current that flows in each of the inputs. If less than VS, the
common-mode input currents are negligible, and the only current effects are the result of the 500-kΩ resistors.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA185 amplifies the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground. The ability to drive the reference pin to adjust the functionality of the output signal
offers multiple configurations, as discussed in previous sections.
8.1.1 Basic Connections
Figure 38 shows the basic connections of the INA185. Connect the input pins (IN+ and IN–) as closely as
possible to the shunt resistor to minimize any resistance in series with the shunt resistor.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA185
IN±
Microcontroller
OUT
±
ADC
+
IN+
REF
GND
NOTE: To help eliminate ground offset errors between the device and the analog-to-digital converter (ADC), connect
the REF pin to the ADC reference input and then to ground. For best performance, use an RC filter between the
output of the INA185 and the ADC. See the Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using
ZOUT section for more details.
Figure 38. Basic Connections for the INA185
A power-supply bypass capacitor of at least 0.1 µF is required for proper operation. Applications with noisy or
high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
Connect bypass capacitors close to the device pins.
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Application Information (continued)
8.1.2 RSENSE and Device Gain Selection
Maximize the accuracy of the INA185 by choosing a current-sense resistor that is as large as possible. A large
sense resistor maximizes the differential input signal for a given amount of current flow and reduces the error
contribution of the offset voltage. However, there are practical limits as to how large the current-sense resistor
can be in a given application. The INA185 has a typical input bias current of 75 µA for each input when operated
at a 12-V common-mode voltage input. When large current-sense resistors are used, these bias currents cause
increased offset error and reduced common-mode rejection. Therefore, using current-sense resistors larger than
a few ohms is generally not recommended for applications that require current-monitoring accuracy. Another
common restriction on the value of the current-sense resistor is the maximum allowable power dissipation that is
budgeted for the resistor. Equation 2 gives the maximum value for the current sense resistor for a given power
dissipation budget:
PDMAX
RSENSE
IMAX2
where:
•
•
PDMAX is the maximum allowable power dissipation in RSENSE.
IMAX is the maximum current that will flow through RSENSE.
(2)
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing to rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. Equation 3 provides
the maximum values of RSENSE and GAIN to keep the device from hitting the positive swing limitation.
IMAX u RSENSE u GAIN VSP VREF
where:
•
•
•
•
IMAX is the maximum current that will flow through RSENSE.
GAIN is the gain of the current sense-amplifier.
VSP is the positive output swing as specified in the data sheet.
VREF is the externally applied voltage on the REF pin.
(3)
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between
the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for
the maximum power dissipation is too large, then it is possible to select a lower-gain device in order to avoid
positive swing limitations.
The negative swing limitation places a limit on how small of a sense resistor can be used in a given application.
Equation 4 provides the limit on the minimum size of the sense resistor.
IMIN u RSENSE u GAIN > VSN VREF
where:
•
•
•
•
IMIN is the minimum current that will flow through RSENSE.
GAIN is the gain of the current sense amplifier.
VSN is the negative output swing of the device (see Rail-to-Rail Output Swing).
VREF is the externally applied voltage on the REF pin.
(4)
In addition to adjusting the offset and gain, the voltage applied to the REF pin can be slightly increased to avoid
negative swing limitations.
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Application Information (continued)
8.1.3 Signal Filtering
Provided that the INA185 output is connected to a high impedance input, the best location to filter is at the device
output using a simple RC network from OUT to GND. Filtering at the output attenuates high-frequency
disturbances in the common-mode voltage, differential input signal, and INA185 power-supply voltage. If filtering
at the output is not possible, or filtering of only the differential input signal is required, then apply a filter at the
input pins of the device. Figure 39 provides an example of how a filter can be used on the input pins of the
device.
Bus Voltage
±0.2 V to +26 V
RSENSE
Load
f
VS
2.7 V to 5.5 V
1
3dB
2S(RF
VS
INA185
RF )CF
RF < 10
RINT
IN±
f±3dB
CF
±
OUT
VOUT
REF
VREF
Bias
+
RF < 10
IN+
RINT
Figure 39. Filter at Input Pins
The addition of external series resistance creates an additional error in the measurement; therefore, the value of
these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal bias
network shown in Figure 39 present at the input pins creates a mismatch in input bias currents when a
differential voltage is applied between the input pins. If additional external series filter resistors are added to the
circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This
mismatch creates a differential error voltage that subtracts from the voltage developed across the shunt resistor.
This error results in a voltage at the device input pins that is different than the voltage developed across the
shunt resistor. Without the additional series resistance, the mismatch in input bias currents has little effect on
device operation. The amount of error these external filter resistors add to the measurement can be calculated
using Equation 6, where the gain error factor is calculated using Equation 5.
The amount of variance in the differential voltage present at the device input relative to the voltage developed at
the shunt resistor is based both on the external series resistance (RF) value as well as the internal input resistor
RINT, as shown in Figure 39. The reduction of the shunt voltage reaching the device input pins appears as a gain
error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be
calculated to determine the amount of gain error that is introduced by the addition of external series resistance.
Calculate the expected deviation from the shunt voltage to what is measured at the device input pins is given
using Equation 5:
1250 u RINT
Gain Error Factor
(1250 u RF ) (1250 u RINT ) (RF u RINT )
where:
•
•
RINT is the internal input resistor.
RF is the external series resistance.
(5)
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Application Information (continued)
With the adjustment factor from Equation 5, including the device internal input resistance, this factor varies with
each gain version, as shown in Table 1. Each individual device gain error factor is shown in Table 2.
Table 1. Input Resistance
PRODUCT
GAIN
RINT (kΩ)
INA185A1
20
25
INA185A2
50
10
INA185A3
100
5
INA185A4
200
2.5
Table 2. Device Gain Error Factor
PRODUCT
SIMPLIFIED GAIN ERROR FACTOR
INA185A1
25000
(21u RF ) 25000
INA185A2
10000
(9 u RF ) 10000
INA185A3
1000
RF 1000
INA185A4
2500
(3 u RF ) 2500
The gain error that can be expected from the addition of the external series resistors can then be calculated
based on Equation 6:
Gain Error (%) = 100 - (100 ´ Gain Error Factor)
(6)
For example, using an INA185A2 and the corresponding gain error equation from Table 2, a series resistance of
10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 6,
resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ω series resistors.
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8.2 Typical Application
One application for the INA185 is to monitor bidirectional currents. Bidirectional currents are present in systems
that have to monitor currents in both directions; common examples are monitoring the charging and discharging
of batteries and bidirectional current monitoring in motor control. The device configuration for bidirectional current
monitoring is shown in Figure 40. Applying stable REF pin voltage closer to the middle of device supply voltage
allows both positive- and negative-current monitoring, as shown in this configuration. Configure the INA185 to
monitor unidirectional currents by grounding the REF pin.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA185
Reference
Voltage
IN±
±
OUT
Output
+
IN+
REF
+
±
GND
Figure 40. Measuring Bidirectional Current
8.2.1 Design Requirements
The design requirements for the circuit shown in Figure 40, are listed in Table 3
Table 3. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power-supply voltage, VS
5V
Bus supply rail, VCM
12 V
RSENSE power loss
< 450 mW
Maximum sense current, IMAX
±20 A
Current sensing error
Less than 1% at maximum current, TJ = 25°C
Small-signal bandwidth
> 100 kHz
8.2.2 Detailed Design Procedure
The maximum value of the current sense resistor is calculated based on the maximum power loss requirement.
By applying Equation 2, the maximum value of the current-sense resistor is calculated to be 1.125 mΩ. This is
the maximum value for sense resistor RSENSE; therefore, select RSENSE to be 1 mΩ because it is the closest
standard resistor value that meets the power-loss requirement.
The next step is to select the appropriate gain and reduce RSENSE, if needed, to keep the output signal swing
within the VS range. The design requirements call for bidirectional current monitoring; therefore, a voltage
between 0 and VS must be applied to the REF pin. The bidirectional currents monitored are symmetric around 0
(that is, ±20 A); therefore, the ideal voltage to apply to VREF is VS / 2 or 2.5 V. If the positive current is greater
than the negative current, using a lower voltage on VREF has the benefit of maximizing the output swing for the
given range of expected currents. Using Equation 3, and given that IMAX = 20 A , RSENSE = 1 mΩ, and VREF = 2.5
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V, the maximum current-sense gain calculated to avoid the positive swing-to-rail limitations on the output is
122.5. Likewise, using Equation 4 for the negative-swing limitation results in a maximum gain of 124.75.
Selecting the gain-of-100 device maximizes the output range while staying within the output swing range. If the
maximum calculated gains are slightly less than 100, the value of the current-sense resistor can be reduced to
keep the output from hitting the output-swing limitations.
To calculate the accuracy at peak current, the two factors that must be determined are the gain error and the
offset error. The gain error of the INA185A3 is specified to be a maximum of 0.2%. The error due to the offset is
constant, and is specified to be 130 µV (maximum) for the conditions where VCM = 12 V and VS = 5 V. Using
Equation 7, the percentage error contribution of the offset voltage is calculated to be 0.65%, with total offset error
= 130 µV, RSENSE = 1 mΩ, and ISENSE = 20 A.
Total Offset Error (V)
Total Offset Error (%) =
u 100%
ISENSE u RSENSE
(7)
One method of calculating the total error is to add the gain error to the percentage contribution of the offset error.
However, in this case, the gain error and the offset error do not have an influence or correlation to each other. A
more statistically accurate method of calculating the total error is to use the RSS sum of the errors, as shown in
Equation 8:
Total Error (%) = Total Gain Error (%)2 + Total Offset Error (%)2
(8)
After applying Equation 8, the total current sense error at maximum current is calculated to be 0.68%, which is
less than the design example requirement of 1%.
The INA185A3 (gain = 100) also has a bandwidth of 150 kHz that meets the small-signal bandwidth requirement
of 100 kHz. If higher bandwidth is required, lower-gain devices can be used at the expense of either reduced
output voltage range or an increased value of RSENSE.
8.2.3 Application Curve
Output Voltage
(1 V/div)
An example output response of a bidirectional configuration is shown in Figure 41. With the REF pin connected
to a reference voltage (2.5 V in this case), the output voltage is biased upwards by this reference level. The
output rises above the reference voltage for positive differential input signals, and falls below the reference
voltage for negative differential input signals.
VOUT
VREF
0V
Time (500 µs/div)
C002
Figure 41. Bidirectional Application Output Response
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9 Power Supply Recommendations
The input circuitry of the INA185 allows for accurate measurements beyond the power-supply voltage, VS. For
example, VS can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 26 V. However, the
output voltage range of the OUT pin is limited by the voltages on the VS pin. The INA185 also withstands the full
differential input signal range up to 26 V at the IN+ and IN– input pins, regardless of whether or not the device
has power applied at the VS pin.
9.1 Common-Mode Transients Greater Than 26 V
With a small amount of additional circuitry, the INA185 can be used in circuits subject to transients higher than
26 V, such as automotive applications. Use only Zener diodes or Zener-type transient absorbers (sometimes
referred to as transzorbs)—any other type of transient absorber has an unacceptable time delay. Start by adding
a pair of resistors as a working impedance for the Zener diode; see Figure 42. Keep these resistors as small as
possible; most often, around 10 Ω. Larger values can be used with an effect on gain that is discussed in the
Signal Filtering section. This circuit limits only short-term transients; therefore, many applications are satisfied
with a 10-Ω resistor along with conventional Zener diodes of the lowest acceptable power rating. This
combination uses the least amount of board space. These diodes can be found in packages as small as SOT523 or SOD-523.
VS
2.7 V to 5.5 V
Bus Supply
±0.2 V to +26 V
CBYPASS
0.1 µF
RSENSE
Load
INA185
VS
IN±
±
RPROTECT
< 10
OUT
Output
+
REF
IN+
GND
Figure 42. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in Figure 43. The most space-efficient solutions are dual, seriesconnected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in Figure 42 and
Figure 43, the total board area required by the INA185 with all protective components is less than that of an SO8 package, and only slightly greater than that of an MSOP-8 package.
VS
2.7 V to 5.5 V
Bus Supply
±0.2 V to +26 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA185
< 10
IN±
±
Transorb
OUT
Output
+
< 10
REF
IN+
GND
Figure 43. Transient Protection Using a Single Transzorb and Input Clamps
For more information, see Current Shunt Monitor With Transient Robustness Reference Design.
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10 Layout
10.1 Layout Guidelines
•
•
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added
to compensate for noisy or high-impedance power supplies.
When routing the connections from the current sense resistor to the device, keep the trace lengths as close
as possible in order to minimize any impedance mismatch..
10.2 Layout Example
Direction of Positive
Current Flow
Bus Voltage:
±0.2V to +26 V
RSHUNT
Connect REF to low
impedance voltage reference
or to GND pin if not used.
IN± 4
3 IN+
REF 5
2 GND
VS 6
1 OUT
Current
Sense
VIA to Ground
Plane
CBYPASS
Power-Supply, VS
2.7 V to 5.5 V
Figure 44. Recommended Layout
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
Current shunt monitor with transient robustness reference design
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following: Texas Instruments, INA185EVM user's guide
11.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Copyright © 2019, Texas Instruments Incorporated
Product Folder Links: INA185
25
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Mar-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
INA185A1IDRLR
SOT-5X3
DRL
6
4000
180.0
8.4
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.98
1.78
0.69
4.0
8.0
Q3
INA185A1IDRLT
SOT-5X3
DRL
6
250
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
INA185A2IDRLR
SOT-5X3
DRL
6
4000
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
INA185A2IDRLT
SOT-5X3
DRL
6
250
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
INA185A3IDRLR
SOT-5X3
DRL
6
4000
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
INA185A3IDRLT
SOT-5X3
DRL
6
250
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
INA185A4IDRLR
SOT-5X3
DRL
6
4000
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
INA185A4IDRLT
SOT-5X3
DRL
6
250
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Mar-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA185A1IDRLR
SOT-5X3
DRL
6
4000
183.0
183.0
20.0
INA185A1IDRLT
SOT-5X3
DRL
6
250
183.0
183.0
20.0
INA185A2IDRLR
SOT-5X3
DRL
6
4000
183.0
183.0
20.0
INA185A2IDRLT
SOT-5X3
DRL
6
250
183.0
183.0
20.0
INA185A3IDRLR
SOT-5X3
DRL
6
4000
183.0
183.0
20.0
INA185A3IDRLT
SOT-5X3
DRL
6
250
183.0
183.0
20.0
INA185A4IDRLR
SOT-5X3
DRL
6
4000
183.0
183.0
20.0
INA185A4IDRLT
SOT-5X3
DRL
6
250
183.0
183.0
20.0
Pack Materials-Page 2
PACKAGE OUTLINE
DRL0006A
SOT - 0.6 mm max height
SCALE 8.000
PLASTIC SMALL OUTLINE
1.7
1.5
PIN 1
ID AREA
1
A
6
4X 0.5
1.7
1.5
NOTE 3
2X 1
4
3
B
1.3
1.1
6X
0.3
0.1
0.6 MAX
0.05
TYP
0.00
C
SEATING PLANE
6X
0.18
0.08
0.05 C
SYMM
SYMM
6X
6X
0.4
0.2
0.27
0.15
0.1
0.05
C A B
4223266/C 12/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-293 Variation UAAD
www.ti.com
EXAMPLE BOARD LAYOUT
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MIN
AROUND
0.05 MAX
AROUND
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
SOLDERMASK DETAILS
4223266/C 12/2021
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. Land pattern design aligns to IPC-610, Bottom Termination Component (BTC) solder joint inspection criteria.
www.ti.com
EXAMPLE STENCIL DESIGN
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4223266/C 12/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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