INA186
SBOS318B – APRIL 2019 – REVISED JULY 2021
INA186 Bidirectional, Low-Power, Zero-Drift, Wide Dynamic Range,
Current-Sense Amplifier With Enable
1 Features
3 Description
•
The INA186 is a low-power, voltage-output, currentsense amplifier (also called a current-shunt monitor).
This device is commonly used for overcurrent
protection, precision current measurement for system
optimization, or in closed-loop feedback circuits. The
INA186 can sense drops across shunts at commonmode voltages from –0.2 V to +40 V, independent of
the supply voltage.
•
•
•
•
•
Wide common-mode voltage range, VCM:
–0.2 V to +40 V
Low input bias currents, IIB: 500 pA (typical)
(enables microamp current measurement)
Low power:
– Low supply voltage, VS: 1.7 V to 5.5 V
– Low quiescent current, IQ: 48 µA (typical)
Accuracy:
– Common-mode rejection ratio: 120 dB
(minimum)
– Gain error, EG: ±1% (maximum)
– Gain drift: 10 ppm/°C (maximum)
– Offset voltage, VOS: ±50 μV (maximum)
– Offset drift: 0.5 μV/°C (maximum)
Bidirectional current sensing capability
Gain options:
– INA186A1: 25 V/V
– INA186A2: 50 V/V
– INA186A3: 100 V/V
– INA186A4: 200 V/V
– INA186A5: 500 V/V
The low input bias current of the INA186 permits the
use of larger current-sense resistors, thus providing
accurate current measurements in the microamp
range. The low offset voltage of the zero-drift
architecture extends the dynamic range of the current
measurement. This feature allows for smaller sense
resistors with lower power loss, while still providing
accurate current measurements.
The INA186 operates from a single 1.7-V to 5.5-V
power supply, and draws a maximum of 90 μA of
supply current . Five fixed gain options are available:
25 V/V, 50 V/V, 100 V/V, 200 V/V, or 500 V/V. The
device is specified over the operating temperature
range of –40°C to +125°C, and offered in SC70,
SOT-23-THIN, and DSBGA packages. The SC70 and
SOT-23 (DDF) packages support bidirectional current
measurement, whereas the DSBGA package only
supports current measurement in one direction.
2 Applications
•
•
•
•
•
•
Standard notebook PC
Smartphone
Consumer battery charger
Baseband unit (BBU)
Merchant network and server PSU
Battery test
Table 3-1. Device Information
PART NUMBER
INA186
(1)
Bus Voltage
±0.2 V to +40 V
0.5 nA
(typ)
PACKAGE(1)
BODY SIZE (NOM)
SC70 (6)
2.00 mm × 1.25 mm
SOT-23 (8)
2.90 mm × 1.60 mm
DSBGA (6)
1.17 mm × 0.765 mm
For all available packages, see the package option
addendum at the end of the data sheet.
Supply Voltage
1.7 V to 5.5 V
RSENSE
LOAD
0.1 …F
0.5 nA
(typ)
ENABLE(1)
VS
IN±
INA186
IN+
GND
OUT
ADC
Microcontroller
REF(2)
(1) The ENABLE pin is available only
in the DDF and YFD packages.
(2) The REF pin is available only in
the DDF and DCK packages.
Typical Application
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings ....................................... 4
6.2 ESD Ratings .............................................................. 4
6.3 Recommended Operating Conditions ........................4
6.4 Thermal Information ...................................................4
6.5 Electrical Characteristics ............................................5
6.6 Typical Characteristics................................................ 6
7 Detailed Description...................................................... 11
7.1 Overview................................................................... 11
7.2 Functional Block Diagram......................................... 11
7.3 Feature Description...................................................12
7.4 Device Functional Modes..........................................14
8 Application and Implementation.................................. 18
8.1 Application Information............................................. 18
8.2 Typical Applications.................................................. 23
9 Power Supply Recommendations................................24
10 Layout...........................................................................25
10.1 Layout Guidelines................................................... 25
10.2 Layout Examples.................................................... 25
11 Device and Documentation Support..........................28
11.1 Documentation Support.......................................... 28
11.2 Receiving Notification of Documentation Updates.. 28
11.3 Support Resources................................................. 28
11.4 Trademarks............................................................. 28
11.5 Electrostatic Discharge Caution.............................. 28
11.6 Glossary.................................................................. 28
12 Mechanical, Packaging, and Orderable
Information.................................................................... 28
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (November 2019) to Revision B (July 2021)
Page
• Added the YFD (DSBGA) package and associated content to data sheet ........................................................1
• Changed Overview section............................................................................................................................... 11
• Added ENABLE pin information to the Functional Block Diagram ...................................................................11
• Added REF pin information to the Bidirectional Current Monitoring section.....................................................12
• Changed graphics in the Basic Connections section........................................................................................18
• Added REF pin information to the RSENSE and Device Gain Selection section................................................ 19
• Added the YFD (DSBGA) layout example to Layout Examples ...................................................................... 25
Changes from Revision * (April 2019) to Revision A (November 2019)
Page
• Added DDF (SOT-23) package and associated content to data sheet ..............................................................1
2
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
5 Pin Configuration and Functions
REF
1
6
OUT
GND
2
5
IN±
VS
3
4
IN+
1
2
3
A
IN+
VS
OUT
B
IN±
GND
ENABLE
Not to scale
Not to scale
Figure 5-1. DCK Package 6-Pin SC70 Top View
Figure 5-2. YFD Package 6-Pin DSBGA Top View
VS
1
8
IN±
ENABLE
2
7
IN+
REF
3
6
NC
GND
4
5
OUT
Not to scale
Figure 5-3. DDF Package 8-Pin SOT-23 Top View
Table 5-1. Pin Functions
PIN
NAME
DCK
(SC70)
DDF
(SOT-23)
YFD
(DSBGA)
TYPE
DESCRIPTION
Enable Pin. When this pin is driven to VS, the device is on and functions
as a current sense amplifier. When this pin is driven to GND, the device
is off, the supply current is reduced, and the output is placed in a highimpedance state. This pin must be driven externally, or connected to VS if
not used. DDF and YFD packages only.
ENABLE
—
2
B3
Digital input
GND
2
4
B2
Analog
IN–
5
8
B1
Analog input
Current-sense amplifier negative input. For high-side applications,
connect to load side of sense resistor. For low-side applications, connect
to ground side of sense resistor.
IN+
4
7
A1
Analog input
Current-sense amplifier positive input. For high-side applications, connect
to bus voltage side of sense resistor. For low-side applications, connect to
load side of sense resistor.
NC
—
6
—
—
OUT
6
5
A3
REF
1
3
—
Analog input
VS
3
1
A2
Analog
Ground
No internal connection. Can be left floating, grounded, or connected to
supply.
OUT pin. This pin provides an analog voltage output that is the gained up
Analog output voltage difference from the IN+ to the IN– pins, and is offset by the voltage
applied to the REF pin.
Reference input. Enables bidirectional current sensing with an externally
applied voltage. DCK and DDF packages only. Devices without a REF pin
have the REF node grounded internally.
Power supply, 1.7 V to 5.5 V
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
3
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
VS
MAX
Supply voltage
)(2)
Differential (VIN+) – (VIN–
VIN+, VIN– Analog inputs
VENABLE
VIN+, VIN–, with respect to GND(3)
–42
42
GND – 0.3
42
ENABLE
GND – 0.3
6
REF, OUT(3)
GND – 0.3
(VS) + 0.3
Input current into any pin(3)
TA
Operating temperature
TJ
Junction temperature
Tstg
Storage temperature
(1)
(2)
(3)
UNIT
6
–55
–65
V
V
V
V
5
mA
150
°C
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±3000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VCM
Common-mode input range
GND – 0.2
40
V
VIN+, VIN–
Input pin voltage range
GND – 0.2
40
V
VS
Operating supply voltage
1.7
5.5
V
VREF
Reference pin voltage range
GND
VS
V
TA
Operating free-air temperature
–40
125
°C
6.4 Thermal Information
INA186
THERMAL
UNIT
YFD (DSBGA)
DCK (SC70)
DDF (SOT23)
6 PINS
6 PINS
8 PINS
141.4
170.7
137.2
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
1.1
132.7
38.4
°C/W
RθJB
Junction-to-board thermal resistance
45.7
65.3
57.1
°C/W
ΨJT
Junction-to-top characterization parameter
0.4
45.7
5.1
°C/W
ΨJB
Junction-to-board characterization parameter
45.3
65.2
56.6
°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
RθJA
(1)
4
METRIC(1)
Junction-to-ambient thermal resistance
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, and VENABLE = VS (unless otherwise
noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
120
150
–3
±50
µV
0.05
0.5
µV/°C
–1
±10
µV/V
3
INPUT
CMRR
Common-mode rejection ratio
VSENSE = 0 mV, VIN+ = –0.1 V to 40 V, TA = –40°C to +125°C
VOS
Offset voltage, RTI(1)
VS = 1.8 V, VSENSE = 0 mV
dVOS/dT
Offset drift, RTI
VSENSE = 0 mV, TA = –40°C to +125°C
PSRR
Power-supply rejection ratio,
RTI
VSENSE = 0 mV, VS = 1.7 V to 5.5 V
IIB
Input bias current
VSENSE = 0 mV
0.5
IIO
Input offset current
VSENSE = 0 mV
±0.07
dB
nA
nA
OUTPUT
G
Gain
A1 devices
25
A2 devices
50
A3 devices
100
A4 devices
200
A5 devices
EG
RVRR
V/V
500
Gain error
VOUT = 0.1 V to VS – 0.1 V
Gain error drift
TA = –40°C to +125°C
Nonlinearity error
VOUT = 0.1 V to VS – 0.1 V
Reference voltage rejection
ratio
VREF = 100 mV to VS – 100 mV,
TA = –40°C to +125°C
Maximum capacitive load
No sustained oscillation
–0.04%
2
±1%
10 ppm/°C
±0.01%
±2
±10
1
µV/V
nF
VOLTAGE OUTPUT
VSP
Swing to VS power-supply rail
VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C
(VS) – 20
(VS) – 40
mV
VSN
Swing to GND
VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C,
VSENSE = –10 mV, VREF = 0 V
(VGND) + 0.05
(VGND) + 1
mV
VZL
Zero current output voltage
VS = 1.8 V, RL = 10 kΩ to GND,
TA = –40°C to +125°C, VSENSE = 0 mV, VREF = 0 V
(VGND) + 2
(VGND) + 10
mV
FREQUENCY RESPONSE
BW
Bandwidth
A1 devices, CLOAD = 10 pF
45
A2 devices, CLOAD = 10 pF
37
A3 devices, CLOAD = 10 pF
35
A4 devices, CLOAD = 10 pF
33
kHz
A5 devices, CLOAD = 10 pF
27
SR
Slew rate
VS = 5.0 V, VOUT = 0.5 V to 4.5 V
0.3
V/µs
tS
Settling time
From current step to within 1% of final value
30
µs
75
nV/√Hz
NOISE,
RTI(1)
Voltage noise density
ENABLE
IEN
Leakage input current
VIH
High-level input voltage
VIL
Low-level input voltage
VHYS
Hysteresis
VIH
High-level input voltage
VIL
Low-level input voltage
VHYS
Hysteresis
IODIS
Output leakage disabled
0 V ≤ VENABLE ≤ VS
1
DDF Package
100
nA
0.7 × VS
6
V
0
0.3 × VS
V
300
YFD package
mV
1.35
5.5
0
0.4
100
VS = 5.0 V, VOUT = 0 V to 5.0 V, VENABLE = 0 V
V
V
mV
1
5
µA
48
65
µA
90
µA
POWER SUPPLY
IQ
Quiescent current
VS = 1.8 V, VSENSE = 0 mV
VS = 1.8 V, VSENSE = 0 mV, TA = –40°C to +125°C
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
5
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, and VENABLE = VS (unless otherwise
noted)
PARAMETER
IQDIS
(1)
CONDITIONS
Quiescent current disabled
MIN
VENABLE = 0 V, VSENSE = 0 mV
TYP
MAX
UNIT
10
100
nA
RTI = referred-to-input.
6.6 Typical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN-, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options
(unless otherwise noted)
60
140
Power-Supply Rejection Ratio (dB)
50
Gain (dB)
40
30
20
10
0
-10
-20
10
A1
A2
A3
A4
A5
100
1k
10k
Frequency (Hz)
100k
120
100
80
60
40
20
0
10
1M
100
VS = 5 V
D020
Vs
140
-40°C
25°C
125°C
Vs-0.4
100
80
Vs-0.8
Y
120
Output Swing (V)
Common-Mode Rejection Ratio (dB)
1M
Figure 6-2. Power-Supply Rejection Ratio vs. Frequency
160
GND+0.8
GND+0.4
60
GND
100
1k
10k
Frequency (Hz)
100k
0
1M
D021
1
2
3
4
5
6
7
Output Current (mA)
8
9
10
11
D010
VS = 1.8 V
A3 devices
Figure 6-3. Common-Mode Rejection Ratio vs. Frequency
6
100k
VS = 5 V
Figure 6-1. Gain vs. Frequency
40
10
1k
10k
Frequency (Hz)
D019
Figure 6-4. Output Voltage Swing vs. Output Current
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
6.6 Typical Characteristics (continued)
at TA = 25°C, VSENSE = VIN+ – VIN-, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options
(unless otherwise noted)
Vs
0.25
-40°C
25°C
125°C
0.2
0.15
Input Bias Current (nA)
Vs-1
Y
Output Swing (V)
Vs-2
GND+2
0.1
0.05
0
-0.05
-0.1
-0.15
GND+1
-0.2
GND
-0.25
0
5
10
15
20
25
Output Current (mA)
30
0
35
5
10
D009
VS = 5.0 V
80
0.2
75
Quiescent Current (PA)
Input Bias Current (nA)
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
-0.2
0
5
10
15
20
25
30
Common-Mode Voltage (V)
35
70
VS = 1.8 V
VS = 3.3 V
VS = 5 V
65
60
55
50
45
40
35
-50
D025
VENABLE = 0 V
Figure 6-7. Input Bias Current vs. Common-Mode Voltage
(Shutdown)
-25
0
25
50
75
Temperature (qC)
100
125
150
D027
Figure 6-8. Quiescent Current vs. Temperature (Enabled)
240
70
VS = 1.8 V
VS = 3.3 V
VS = 5.0 V
VS = 1.8 V
VS = 5 V
65
Quiescent Current (PA)
Quiescent Current (nA)
D024
40
-0.25
150
120
90
60
30
60
55
50
45
0
-30
-50
40
Figure 6-6. Input Bias Current vs. Common-Mode Voltage
0.25
180
35
VS = 5.0 V
Figure 6-5. Output Voltage Swing vs. Output Current
210
15
20
25
30
Common-Mode Voltage (V)
-25
0
25
50
75
Temperature (qC)
100
125
150
40
-5
D002
VENABLE = 0 V
0
5
10
15
20
25
30
Common-Mode Voltage (V)
35
40
D029
VS = 5.0 V
Figure 6-9. Quiescent Current vs. Temperature (Disabled)
Figure 6-10. Quiescent Current vs. Common-Mode Voltage
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
7
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
6.6 Typical Characteristics (continued)
at TA = 25°C, VSENSE = VIN+ – VIN-, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options
(unless otherwise noted)
Input-Referred Voltage Noise (nV/—Hz)
100
Referred-to-Input
Voltage Noise (0.5 PV/div)
80
70
60
50
40
30
20
10
10
100
1k
Frequency (Hz)
10k
100k
Time (1 s/div)
D030
D031
A3 devices
A3 devices
Figure 6-12. 0.1-Hz to 10-Hz Voltage Noise (Referred-To-Input)
VCM
VOUT
VOUT (100mV/div)
Input Voltage
5 mV/div
Common-Mode Voltage (10 V/div)
Output Voltage
500 mV/div
Figure 6-11. Input-Referred Voltage Noise vs. Frequency
Time (20 Ps/div)
Time (250 Ps/div)
D032
D033
VS = 5.0 V, A3 devices
A3 devices
Figure 6-13. Step Response (10-mVPP Input Step)
Figure 6-14. Common-Mode Voltage Transient Response
Voltage (2 V/div)
Non-inverting Input
Output
Voltage (2 V/div)
Inverting Input
Output
0V
0V
Time (250 Ps/div)
Time (250 Ps/div)
D034
D035
A3 devices
VS = 5.0 V, A3 devices
Figure 6-15. Inverting Differential Input Overload
8
Figure 6-16. Noninverting Differential Input Overload
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
6.6 Typical Characteristics (continued)
at TA = 25°C, VSENSE = VIN+ – VIN-, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options
(unless otherwise noted)
Voltage (1 V/div)
Supply Voltage
Output Voltage
Voltage (1V/div)
Supply Voltage
Output Voltage
0V
0V
Time (10 Ps/div)
Time (100 Ps/div)
D036
D037
VS = 5.0 V, A3 devices
VS = 5.0 V, A3 devices
Figure 6-17. Start-Up Response
Figure 6-18. Brownout Recovery
100
Enable
Output
IBP
IBN
80
Voltage (1 V/div)
Input Bias Current (nA)
60
40
20
0
-20
-40
-60
0V
-80
-100
-110 -90
Time (250 Ps/div)
-70
D038
70
90
110
D039
VS = 5.0 V, VREF = 2.5 V, A1 devices
VS = 5.0 V, A3 devices
Figure 6-20. IB+ and IB– vs. Differential Input Voltage
Figure 6-19. Enable and Disable Response
25
1.25
IBP
IBN
-40qC
25qC
125qC
Output Leakage Current (PA)
1
15
Input Bias Current (nA)
-50 -30 -10 10 30 50
Differential Input Voltage (mV)
5
-5
-15
0.75
0.5
0.25
0
-0.25
-0.5
-0.75
-25
-60
-1
-40
-20
0
20
Differential Input Voltage (mV)
40
60
0
0.5
1
1.5
2
2.5
3
3.5
Output Voltage (V)
D047
VS = 5.0 V, VREF = 2.5 V, A2, A3, A4, A5 devices
Figure 6-21. IB+ and IB– vs. Differential Input Voltage
4
4.5
5
D040
VS = 5.0 V, VENABLE = 0 V, VREF = 2.5 V
Figure 6-22. Output Leakage vs. Output Voltage (A1, A2, and A3
Devices)
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
9
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
6.6 Typical Characteristics (continued)
at TA = 25°C, VSENSE = VIN+ – VIN-, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options
(unless otherwise noted)
5000
3
25qC
-40qC
125qC
2
A5
1000
Output Impedance (:)
Output Leakage Current (PA)
2.5
1.5
1
0.5
0
-0.5
-1
A4
A1
100
A2
A3
10
Gain Variants
A1
A2
A3
A4
A5
1
-1.5
-2
-2.5
0
0.5
1
1.5
2
2.5
3
3.5
Output Voltage (V)
4
4.5
5
0.1
10
D048
VS = 5.0 V, VENABLE = 0 V, VREF = 2.5 V
1k
10k
100k
Frequency (Hz)
1M
10M
D050
VS = 5.0 V, VCM = 0 V
Figure 6-23. Output Leakage vs. Output Voltage (A4 and A5
Devices)
10
100
Figure 6-24. Output Impedance vs. Frequency
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
7 Detailed Description
7.1 Overview
The INA186 is a low bias current, low offset, 40-V common-mode, current-sensing amplifier. The DDF SOT-23
and YFD DSBGA packages also come with an enable pin. The INA186 is a specially designed, current-sensing
amplifier that accurately measures voltages developed across current-sensing resistors on common-mode
voltages that far exceed the supply voltage. Current is measured on input voltage rails as high as 40 V at VIN+
and VIN–, with a supply voltage, VS, as low as 1.7 V. When disabled, the output goes to a high-impedance state,
and the supply current draw is reduced to less than 0.1 µA. The INA186 is intended for use in both low-side and
high-side current-sensing configurations where high accuracy and low current consumption are required.
7.2 Functional Block Diagram
ENABLE(1)
VS
INA186
IN+
+
±
±
OUT
±
+
+
REF(2)
IN±
GND
1. The ENABLE pin is available only in the DDF and YFD packages.
2. YFD packages without a REF pin have this node internally connected to GND.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
11
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
7.3 Feature Description
7.3.1 Precision Current Measurement
The INA186 allows for accurate current measurements over a wide dynamic range. The high accuracy of the
device is attributable to the low gain error and offset specifications. The offset voltage of the INA186 is less than
±50 µV. In this case, the low offset improves the accuracy at light loads when VIN+ approaches VIN–. Another
advantage of low offset is the ability to use a lower-value shunt resistor that reduces the power loss in the
current-sense circuit, and improves the power efficiency of the end application.
The maximum gain error of the INA186 is specified at ±1%. As the sensed voltage becomes much larger than
the offset voltage, the gain error becomes the dominant source of error in the current-sense measurement.
When the device monitors currents near the full-scale output range, the total measurement error approaches the
value of the gain error.
7.3.2 Low Input Bias Current
The INA186 is different from many current-sense amplifiers because this device offers very low input bias
current. The low input bias current of the INA186 has three primary benefits.
The first benefit is the reduction of the current consumed by the device . Classical current-sense amplifier
topologies typically consume tens of microamps of current at the inputs. For these amplifiers, the input current is
the result of the resistor network that sets the gain and additional current to bias the input amplifier. To reduce
the bias current to near zero, the INA186 uses a capacitively coupled amplifier on the input stage, followed by a
difference amplifier on the output stage.
The second benefit of low bias current is the ability to use input filters to reject high-frequency noise before
the signal is amplified. In a traditional current-sense amplifier, the addition of input filters comes at the cost
of reduced accuracy. However, as a result of the low bias currents, input filters have little effect on the
measurement accuracy of the INA186.
The third benefit of low bias current is the ability to use a larger current-sense resistor. This ability allows the
device to accurately monitor currents as low as 1 µA.
7.3.3 Low Quiescent Current With Output Enable
The device features low quiescent current (IQ), while still providing sufficient small-signal bandwidth to be usable
in most applications. The quiescent current of the INA186 is only 48 µA (typical), while providing a small-signal
bandwidth of 35 kHz in a gain of 100. The low IQ and good bandwidth allow the device to be used in many
portable electronic systems without excessive drain on the battery. Because many applications only need to
periodically monitor current, the INA186 features an enable pin that turns off the device until needed. When in
the disabled state, the INA186 typically draws 10 nA of total supply current.
7.3.4 Bidirectional Current Monitoring
The INA186 devices that feature a REF pin can sense current flow through a sense resistor in both directions.
The bidirectional current-sensing capability is achieved by applying a voltage at the REF pin to offset the output
voltage. A positive differential voltage sensed at the inputs results in an output voltage that is greater than the
applied reference voltage. Likewise, a negative differential voltage at the inputs results in output voltage that
is less than the applied reference voltage. Use Equation 1 to calculate the output voltage of the current-sense
amplifier.
VOUT
I LOAD u RSENSE u GAIN
VREF
(1)
where
•
•
•
•
12
ILOAD is the load current to be monitored.
RSENSE is the current-sense resistor.
GAIN is the gain option of the selected device.
VREF is the voltage applied to the REF pin.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
7.3.5 High-Side and Low-Side Current Sensing
The INA186 supports input common-mode voltages from –0.2 V to +40 V. Because of the internal topology,
the common-mode range is not restricted by the power-supply voltage (VS). With the ability to operate with
common-mode voltages greater or less than VS, Figure 7-1 shows an example on how the INA186 can be used
in high-side and low-side current-sensing applications.
Bus Suppl y
up to +40 V
IN+
High-Side Se nsing
Commo n-mode volta ge (VCM )
is b us-voltage depen dent.
R SENS E
IN±
LOA D
IN+
R SENS E
Low-Side Se nsing
Commo n-mode volta ge (VCM )
is a lwa ys n ear groun d a nd is
isolated fro m bus-voltage sp ikes.
IN±
Figure 7-1. High-Side and Low-Side Sensing Connections
7.3.6 High Common-Mode Rejection
The INA186 uses a capacitively coupled amplifier on the front end. Therefore, dc common-mode voltages are
blocked from downstream circuits, resulting in very high common-mode rejection. Typically, the common-mode
rejection of the INA186 is approximately 150 dB. The ability to reject changes in the dc common-mode voltage
allows the INA186 to monitor both high-voltage and low-voltage rail currents with very little change in the offset
voltage.
7.3.7 Rail-to-Rail Output Swing
The INA186 allows linear current-sensing operation with the output close to the supply rail and ground. The
maximum specified output swing to the positive rail is VS – 40 mV, and the maximum specified output swing
to GND is only GND + 1 mV. The close-to-rail output swing is useful to maximize the usable output range,
particularly when operating the device from a 1.8-V supply.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
13
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
7.4 Device Functional Modes
7.4.1 Normal Operation
The INA186 is in normal operation when the following conditions are met:
•
•
•
•
•
The power-supply voltage (VS) is between 1.7 V and 5.5 V.
The common-mode voltage (VCM) is within the specified range of –0.2 V to +40 V.
The maximum differential input signal times the gain plus VREF is less than the positive swing voltage VSP.
The ENABLE pin is driven or connected to VS.
The minimum differential input signal times the gain plus VREF is greater than the zero load swing to GND,
VZL (see Rail-to-Rail Output Swing).
For devices that do not feature a REF pin that value for VREF will be zero. During normal operation, this device
produces an output voltage that is the amplified representation of the difference voltage from IN+ to IN– plus the
voltage applied to the REF pin.
7.4.2 Unidirectional Mode
This device can be configured to monitor current flowing in one direction (unidirectional) or in both directions
(bidirectional) depending on how the REF pin is connected. Figure 7-2 shows the most common case is
unidirectional where the output is set to ground when no current is flowing by connecting the REF pin to ground.
When the current flows from the bus supply to the load, the input voltage from IN+ to IN– increases and causes
the output voltage at the OUT pin to increase.
Bus Voltage
up to 40 V
RSENSE
Load
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
ISENSE
VS
INA186
IN±
Capacitively
Coupled
Amplifier
±
OUT
VOUT
+
REF
IN+
GND
Figure 7-2. Typical Unidirectional Application
The linear range of the output stage is limited by how close the output voltage can approach ground under
zero input conditions. The zero current output voltage of the INA186 is very small and for most unidirectional
applications the REF pin is simply grounded. However, if the measured current multiplied by the current sense
resistor and device gain is less than the zero current output voltage, then bias the REF pin to a convenient value
above the zero current output voltage to get the output into the linear range of the device. To limit common-mode
rejection errors, buffer the reference voltage connected to the REF pin.
A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This
method results in the output voltage saturating at 40 mV less than the supply voltage when no differential input
voltage is present. This method is similar to the output saturated low condition with no differential input voltage
when the REF pin is connected to ground. The output voltage in this configuration only responds to currents
that develop negative differential input voltage relative to the device IN– pin. Under these conditions, when
14
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
the negative differential input signal increases, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF pin must not exceed VS.
Another use for the REF pin in unidirectional operation is to level shift the output voltage. Figure 7-3 shows an
application where the device ground is set to a negative voltage so currents biased to negative supplies, as
seen in optical networking cards, can be measured. The GND of the INA186 can be set to negative voltages,
as long as the inputs do not violate the common-mode range specification and the voltage difference between
VS and GND does not exceed 5.5 V. In this example, the output of the INA186 is fed into a positive-biased
analog-to-digital converter (ADC). By grounding the REF pin, the voltages at the output will be positive and not
damage the ADC. To make sure the output voltage never goes negative, the supply sequencing must be the
positive supply first, followed by the negative supply.
+ 1.8 V
-3.3 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA186
IN-
Capacitively
Coupled
Amplifier
±
OUT
ADC
+
REF
IN+
GND
- 3.3 V
Figure 7-3. Using the REF Pin to Level-Shift Output Voltage
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
15
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
7.4.3 Bidirectional Mode
The INA186 is a bidirectional current-sense amplifier capable of measuring currents through a resistive shunt
in two directions. This bidirectional monitoring is common in applications that include charging and discharging
operations where the current flowing through the resistor can change directions.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
RSENSE
Load
CBYPASS
0.1 µF
ISENSE
VS
INA186
IN±
Reference
Voltage
Capacitively
Coupled
Amplifier
±
OUT
VOUT
+
REF
IN+
GND
+
±
Figure 7-4. Bidirectional Application
By applying a voltage to the REF pin, Figure 7-4 shows how you can measure this current flowing in both
directions. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input level state.
The output then responds by increasing above VREF for positive differential signals (relative to the IN– pin) and
responds by decreasing below VREF for negative differential signals. This reference voltage applied to the REF
pin can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at VS/2 for equal
signal range in both current directions. In some cases, VREF is set at a voltage other than VS/2; for example,
when the bidirectional current and corresponding output signal do not need to be symmetrical.
7.4.4 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain exceeds the voltage swing specification, the INA186
drives its output as close as possible to the positive supply or ground, and does not provide accurate
measurement of the differential input voltage. If this input overload occurs during normal circuit operation, then
reduce the value of the shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this
mode of operation. If a differential overload occurs in a time-limited fault event, then the output of the INA186
returns to the expected value approximately 80 µs after the fault condition is removed.
16
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
7.4.5 Shutdown
The INA186 features an active-high ENABLE pin that shuts down the device when pulled to ground. When
the device is shut down, the quiescent current is reduced to 10 nA (typical), and the output goes to a highimpedance state. In a battery-powered application, the low quiescent current extends the battery lifetime when
the current measurement is not needed. When the ENABLE pin is driven to the supply voltage, the device turns
back on. The typical output settling time when enabled is 130 µs.
The output of the INA186 goes to a high-impedance state when disabled. Figure 7-5 shows how to connect
multiple outputs of the INA186 together to a single ADC or measurement device.
When connected in this way, enable only one INA186 at a time, and make sure all devices have the same supply
voltage.
Bus Voltage1
upto to +40 V
RSENSE
Supply Voltage
1.7 V to 5.5 V
LOAD
0.1 F
ENABLE
GPIO1
VS
IN±
INA186
ADC
OUT
Microcontroller
IN+
GPIO2
REF
GND
Bus Voltage2
upto to +40 V
RSENSE
Supply Voltage
1.7 V to 5.5 V
LOAD
0.1 F
ENABLE
VS
IN±
INA186
OUT
IN+
GND
REF
Figure 7-5. Multiplexing Multiple Devices With the ENABLE Pin
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
17
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The INA186 amplifies the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground. The high common-mode rejection of the INA186 makes it usable over a wide
range of voltage rails while still maintaining an accurate current measurement.
8.1.1 Basic Connections
Figure 8-1 shows the basic connections of the INA186. Place the device as close as possible to the current
sense resistor and connect the input pins (IN+ and IN–) to the current sense resistor through kelvin connections.
If present, the ENABLE pin must be controlled externally or connected to VS if not used.
Bus Voltage
±0.2 V to +40 V
0.5 nA
(typ)
Supply Voltage
1.7 V to 5.5 V
RSENSE
LOAD
0.1 …F
0.5 nA
(typ)
(1)
ENABLE
VS
IN±
INA186
IN+
GND
OUT
ADC
Microcontroller
REF(2)
(1) The ENABLE pin is available only
in the DDF and YFD packages.
(2) The REF pin is available only in
the DDF and DCK packages.
A.
To help eliminate ground offset errors between the device and the analog-to-digital converter (ADC), connect the REF pin to the ADC
reference input. When driving SAR ADCs, filter or buffer the output of the INA186 before connecting directly to the ADC.
Figure 8-1. Basic Connections
18
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
8.1.2 RSENSE and Device Gain Selection
The accuracy of any current-sense amplifier is maximized by choosing the current-sense resistor to be as large
as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow
and reduces the error contribution of the offset voltage. However, there are practical limits as to how large the
current-sense resistor can be in a given application because of the resistor size and maximum allowable power
dissipation. Equation 2 gives the maximum value for the current-sense resistor for a given power dissipation
budget:
RSENSE
PDMAX
IMAX2
(2)
where:
•
•
PDMAX is the maximum allowable power dissipation in RSENSE.
IMAX is the maximum current that will flow through RSENSE.
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing-to-rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. Equation 3 provides
the maximum values of RSENSE and GAIN to keep the device from exceeding the positive swing limitation.
IMAX u RSENSE u GAIN < VSP
VREF
(3)
where:
•
•
•
•
IMAX is the maximum current that will flow through RSENSE.
GAIN is the gain of the current-sense amplifier.
VSP is the positive output swing as specified in the data sheet.
VREF is the externally applied voltage on the REF pin. This voltage is zero for devices without a REF pin.
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off
between the value of the sense resistor and the gain of the device under consideration. If the sense resistor
selected for the maximum power dissipation is too large, then it is possible to select a lower-gain device in order
to avoid positive swing limitations.
The negative swing limitation places a limit on how small the sense resistor value can be for a given application.
Equation 4 provides the limit on the minimum value of the sense resistor.
IMIN u RSENSE u GAIN > VSN
VREF
(4)
where:
•
•
•
•
IMIN is the minimum current that will flow through RSENSE.
GAIN is the gain of the current-sense amplifier.
VSN is the negative output swing of the device (see Rail-to-Rail Output Swing).
VREF is the externally applied voltage on the REF pin. This voltage is zero for devices without a REF pin.
In addition to adjusting RSENSE and the device gain, the voltage applied to the REF pin can be slightly increased
above GND to avoid negative swing limitations.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
19
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
8.1.3 Signal Conditioning
When performing accurate current measurements in noisy environments, the current-sensing signal is often
filtered. The INA186 features low input bias currents. Therefore, adding a differential mode filter to the input
without sacrificing the current-sense accuracy is possible. Filtering at the input is advantageous because this
action attenuates differential noise before the signal is amplified. Figure 8-2 provides an example of how to use a
filter on the input pins of the device.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
Capacitively Coupled
Amplifier
IN±
RF
f3dB
1
4SRFCF
CF
VS
INA186
±
RDIFF
OUT
VOUT
+
RF
REF
IN+
GND
Figure 8-2. Filter at the Input Pins
Figure 8-2 shows the differential input impedance (RDIFF) limits the maximum value for RF. Figure 8-3 shows the
value of RDIFF is a function of the device temperature.
6
A1
A2, A3, A4, A5
Input Impedance (M:)
5
4
3
2
1
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
D115
Figure 8-3. Differential Input Impedance vs. Temperature
20
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
As the voltage drop across the sense resistor (VSENSE) increases, the amount of voltage dropped across the
input filter resistors (RF) also increases. The increased voltage drop results in additional gain error. The error
caused by these resistors is calculated by the resistor divider equation shown in Equation 5.
Error(%)
§
RDIFF
¨1
¨ RSENSE RDIFF
©
2 u RF
·
¸ u 100
¸
¹
(5)
where:
•
•
RDIFF is the differential input impedance.
RF is the added value of the series filter resistance.
The input stage of the INA186 uses a capacitive feedback amplifier topology in order to achieve high dc
precision. As a result, periodic high-frequency shunt voltage (or current) transients of significant amplitude (10
mV or greater) and duration (hundreds of nanoseconds or greater) may be amplified by the INA186, even
though the transients are greater than the device bandwidth. Use a differential input filter in these applications to
minimize disturbances at the INA186 output.
The high input impedance and low bias current of the INA186 provide flexibility in the input filter design without
impacting the accuracy of current measurement. For example, set RF = 100 Ω and CF = 22 nF to achieve
a low-pass filter corner frequency of 36.2 kHz. These filter values significantly attenuate most unwanted highfrequency signals at the input without severely impacting the current sensing bandwidth or precision. If a lower
corner frequency is desired, increase the value of CF.
Filtering the input filters out differential noise across the sense resistor. If high-frequency, common-mode noise
is a concern, add an RC filter from the OUT pin to ground. The RC filter helps filter out both differential and
common mode noise, as well as internally generated noise from the device. The value for the resistance of the
RC filter is limited by the impedance of the load. Any current drawn by the load manifests as an external voltage
drop from the INA186 OUT pin to the load input. To select the optimal values for the output filter, use Output
Impedance vs. Frequency and see the Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using
ZOUT application report
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
21
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
8.1.4 Common-Mode Voltage Transients
With a small amount of additional circuitry, the INA186 can be used in circuits subject to transients that exceed
the absolute maximum voltage ratings. The most simple way to protect the inputs from negative transients is to
add resistors in series with the IN– and IN+ pins. Use resistors that are 1 kΩ or less, and limit the current in the
ESD structures to less than 5 mA. For example, using 1-kΩ resistors in series with the INA186 allows voltages
as low as –5 V, while limiting the ESD current to less than 5 mA. Use the circuits shown in Figure 8-4 and Figure
8-5 if protection from high-voltage or more-negative, common-voltage transients is needed. When implementing
these circuits, use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transzorbs);
any other type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as a
working impedance for the Zener diode (see Figure 8-4). Keep these resistors as small as possible; most often,
use around 100 Ω. See Signal Conditioning for information on how larger values can be used with an effect on
gain. This circuit limits only short-term transients; therefore, many applications are satisfied with a 100-Ω resistor
along with conventional Zener diodes of the lowest acceptable power rating. This combination uses the least
amount of board space. These diodes can be found in packages as small as
SOT-523 or SOD-523.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
RPROTECT
INA186
IN±
< 1 k:
Capacitively
Coupled
Amplifier
±
OUT
RPROTECT
< 1 k:
VOUT
+
REF
IN+
GND
Figure 8-4. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in Figure 8-5. The most space-efficient solutions are dual, seriesconnected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in Figure 8-4 and
Figure 8-5, the total board area required by the INA186 with all protective components is less than that of an
SO-8 package, and only slightly greater than that of an VSSOP-8 package.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
RPROTECT
INA186
IN±
< 1 k:
Capacitively
Coupled
Amplifier
Transorb
±
OUT
VOUT
+
RPROTECT
< 1 k:
REF
IN+
GND
Figure 8-5. Transient Protection Using a Single Transzorb and Input Clamps
For more information, see the Current Shunt Monitor With Transient Robustness reference design.
22
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
8.2 Typical Applications
The low input bias current of the INA186 allows accurate monitoring of small-value currents. To accurately
monitor currents in the microamp range, increase the value of the sense resistor to increase the sense
voltage so that the error introduced by the offset voltage is small. Figure 8-6 shows the circuit configuration
for monitoring low-value currents. As a result of the differential input impedance of the INA186, limit the value of
RSENSE to 1 kΩ or less for best accuracy.
RSENSE ” 1 kO
12 V
5V
LOAD
0.1 F
VS
IN±
OUT
INA186
IN+
REF
GND
Figure 8-6. Microamp Current Measurement
8.2.1 Design Requirements
Table 8-1 lists the design requirements for the circuit shown in Figure 8-6.
Table 8-1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power-supply voltage (VS)
5V
Bus supply rail (VCM)
12 V
Minimum sense current (IMIN)
1 µA
Maximum sense current (IMAX)
150 µA
Device gain (GAIN)
25 V/V
Reference voltage (VREF)
0V
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
23
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
8.2.2 Detailed Design Procedure
The maximum value of the current-sense resistor is calculated based on choice of gain, value of the maximum
current the be sensed (IMAX), and the power-supply voltage (VS). When operating at the maximum current, the
output voltage must not exceed the positive output swing specification, VSP. Using Equation 6, for the given
design parameters the maximum value for RSENSE is calculated to be 1.321 kΩ.
RSENSE <
VSP
IMAX u GAIN
(6)
However, because this value exceeds the maximum recommended value for RSENSE, a resistance value of 1
kΩ must be used. When operating at the minimum current value, IMIN the output voltage must be greater than
the swing to GND (VSN), specification. For this example, the output voltage at the minimum current is calculated
using Equation 7 to be 25 mV, which is greater than the value for VSN.
VOUTMIN
IMIN u RSENSE u GAIN
(7)
8.2.3 Application Curve
Figure 8-7 shows the output of the device under the conditions given in Table 8-1 and with RSENSE = 1 kΩ.
4
3.5
Output Voltage (V)
3
2.5
2
1.5
1
0.5
0
0
25
50
75
100
Input Current (µA)
125
150
D031
Figure 8-7. Typical Application DC Transfer Function
9 Power Supply Recommendations
The input circuitry of the INA186 accurately measures beyond the power-supply voltage, VS. For example, VS
can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 40 V. However, the output voltage
range of the OUT pin is limited by the voltage on the VS pin. The INA186 also withstands the full differential input
signal range up to 40 V at the IN+ and IN– input pins, regardless of whether the device has power applied at the
VS pin. There is no sequencing requirement for VS and VIN+ or VIN–.
24
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
10 Layout
10.1 Layout Guidelines
•
•
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added
to compensate for noisy or high-impedance power supplies.
When routing the connections from the current-sense resistor to the device, keep the trace lengths as short
as possible. The input filter capacitor CF should be placed as close as possible to the input pins of the device.
10.2 Layout Examples
Current Sense
Output
Connect REF to GND for
Unidirectional Measurement
or to External Reference for
Bidirectional Measurement
Note: RF and CF are optional in low
noise/ripple environments
VIA to Ground Plane
Supply Voltage
(1.7 V to 5.5 V)
REF
1
GND
2
VS
3
INA186
6
OUT
5
IN-
4
IN+
CF
RF
RSHUNT
CBYPASS
RF
VIA to Ground Plane
Figure 10-1. Recommended Layout for SC70 (DCK) Package
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
25
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
Note: RF and CF are optional in low
noise/ripple environments
CF
RF
CBYPASS
Supply Voltage
(1.7 V to 5.5 V)
VS
1
8
IN-
7
IN+
RSHUNT
2
ENABLE
Connect to VS
if not used
TI Device
REF
3
6
N.C.
GND
4
5
OUT
IN+
RF
VIA to Ground Plane
Connect REF to GND for
Unidirectional Measurement
or to External Reference for
Bidirectional Measurement
Current Sense
Output
Figure 10-2. Recommended Layout for SOT-23 (DDF) Package
26
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
RSHUNT
RF(1)
RF(1)
CF(1)
VIA to Ground
Plane
IN±
B1
A1
IN+
GND
B2
A2
VS
ENABLE
B3
A3
OUT
Connect to Supply
(1.7 V to 5.5 V)
CBYPASS
Current
Sense Output
Connect to Control or VS
(Do not float)
Figure 10-3. Recommended Layout DSBGA (YFD) Package
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
27
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following: Texas Instruments, INA186EVM user's guide
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
28
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
PACKAGE OUTLINE
YFD0006-C02
DSBGA - 0.4 mm max height
SCALE 14.000
DIE SIZE BALL GRID ARRAY
A
1.20
1.14
B
BALL A1
CORNER
0.80
0.73
0.4 MAX
C
SEATING PLANE
0.175
0.125
BALL TYP
0.8 TYP
B
SYMM
0.4
TYP
A
6X
0.015
0.285
0.185
C A B
2
1
3
SYMM
0.4
TYP
4224626/B 02/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
29
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
EXAMPLE BOARD LAYOUT
YFD0006-C02
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
6X (
0.225)
1
2
A
(0.4) TYP
B
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:50X
0.05 MAX
( 0.225)
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
( 0.225)
SOLDER MASK
OPENING
0.05 MIN
EXPOSED
METAL
NON-SOLDER MASK
DEFINED
(PREFERRED)
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4224626/B 02/2019
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
Refer to Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
30
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
INA186
www.ti.com
SBOS318B – APRIL 2019 – REVISED JULY 2021
EXAMPLE STENCIL DESIGN
YFD0006-C02
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
6X ( 0.25)
1
3
2
A
SYMM
(0.4) TYP
B
METAL
TYP
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:50X
4224626/B 02/2019
NOTES: (continued)
www.ti.com
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA186
31
PACKAGE OPTION ADDENDUM
www.ti.com
12-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
INA186A1IDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1E7
INA186A1IDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1E7
INA186A1IDDFR
ACTIVE
SOT-23-THIN
DDF
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZLW
INA186A1IDDFT
ACTIVE
SOT-23-THIN
DDF
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZLW
INA186A1IYFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1IJ
INA186A2IDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1E8
INA186A2IDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1E8
INA186A2IDDFR
ACTIVE
SOT-23-THIN
DDF
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZMW
INA186A2IDDFT
ACTIVE
SOT-23-THIN
DDF
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZMW
INA186A2IYFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1IK
INA186A3IDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1E9
INA186A3IDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1E9
INA186A3IDDFR
ACTIVE
SOT-23-THIN
DDF
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZNW
INA186A3IDDFT
ACTIVE
SOT-23-THIN
DDF
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZNW
INA186A3IYFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1IL
INA186A4IDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1EA
INA186A4IDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1EA
INA186A4IDDFR
ACTIVE
SOT-23-THIN
DDF
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZOW
INA186A4IDDFT
ACTIVE
SOT-23-THIN
DDF
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZOW
INA186A4IYFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1IM
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
12-Aug-2021
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
INA186A5IDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1EB
INA186A5IDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1EB
INA186A5IDDFR
ACTIVE
SOT-23-THIN
DDF
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZPW
INA186A5IDDFT
ACTIVE
SOT-23-THIN
DDF
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1ZPW
INA186A5IYFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1IN
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
