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INA203-Q1
SBOS539A – DECEMBER 2010 – REVISED APRIL 2016
INA203-Q1 Automotive Grade, –16 V to +80 V, Low- or High-Side, High-Speed, Voltage
Output Current Shunt Monitor With Dual Comparators and Reference
1 Features
3 Description
•
•
The INA203-Q1 is a unidirectional current-shunt
monitor (also called a current sense amplifier) with
voltage output, dual comparators, and voltage
reference. The INA203-Q1 can sense drops across
shunts at common-mode voltages from –16 V to +80
V. The INA203-Q1 is available with 20-V/V gain with
up to 500-kHz bandwidth.
1
•
•
•
•
Qualified for Automotive Applications
Current Sense Amplifier
– Common-Mode Range: –16 V to +80 V
– Accuracy: 3.5% (Maximum) Over Temperature
– Bandwidth: 500 kHz
– Gain: 20 V/V
Integrated Dual Comparators:
– Comparator 1 With Latch
– Comparator 2 With Optional Delay
Quiescent Current: 1.8 mA
Latch-Up Performance Meets 100 mA Per AECQ100, Level I
Packages: TSSOP-14
The INA203-Q1 incorporates two open-drain
comparators with internal 0.6-V references and also
provides a 1.2-V reference output. The comparator
references can be overridden by external inputs.
Comparator 1 includes a latching capability, and
Comparator 2 has a user-programmable delay.
The INA203-Q1 operates from a single 2.7 V to 18 V
supply. It is specified over the extended operating
temperature range of –40°C to +125°C.
2 Applications
•
•
•
•
Device Information(1)
Electric Power Steering (EPS) Systems
Body Control Modules
Brake Systems
Electronic Stability Control (ESC) Systems
PART NUMBER
INA203-Q1
PACKAGE
TSSOP (14)
BODY SIZE (NOM)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Basic Connections Schematic
RSHUNT
3m
Load Supply
±16V to +80V
Load
5V Supply
Current Shunt
Monitor Output
C BYPASS
0.01 …F
VS
OUT
CMP1 IN-/0.6 REF
INA203-Q1
x20
1.2V REF
VIN+
VIN-
R PULL-UP
4.7 kŸ
R PULL-UP
4.7 kŸ
1.2V REF OUT
CMP1 IN+
CMP1 OUT
CMP2 IN+
CMP2 OUT
CMP2 IN-/0.6 REF
CMP2 DELAY
GND
CMP1RESET
Optional Delay
Capacitor
0.2 …F
Transparent/Reset
Latch
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA203-Q1
SBOS539A – DECEMBER 2010 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
4
4
4
4
5
6
7
7
8
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics: Current-Shunt Monitor ....
Electrical Characteristics: Comparator.....................
Electrical Characteristics: Reference .......................
Electrical Characteristics: General...........................
Typical Characteristics ..............................................
Detailed Description ............................................ 12
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
12
12
12
14
Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Applications ................................................ 19
10 Power Supply Recommendations ..................... 21
11 Layout................................................................... 21
11.1 Layout Guidelines ................................................. 21
11.2 Layout Example .................................................... 21
12 Device and Documentation Support ................. 22
12.1
12.2
12.3
12.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
13 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (December 2010) to Revision A
Page
•
Updated data sheet title, Features, Applications, and Description......................................................................................... 1
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section,
Mechanical, Packaging, and Orderable Information section, Pin Configuration and Functions section,
Recommended Operating Conditions Table, and Thermal Information Table ....................................................................... 1
•
Added Device Comparison Table........................................................................................................................................... 3
•
Changed V+ to VS throughout ................................................................................................................................................ 4
•
Changed MAX value 18 to (VS) + 0.3 for Comparator output pins......................................................................................... 4
•
Changed MAX value 10 to (VS) up to 10 for 1.2-V REF and CMP2 DELAY pins .................................................................. 4
•
Changed pin names in Absolute Maximum Ratings to show correct names ......................................................................... 4
•
Added Operating Temperature to Absolute Maximum Ratings table ..................................................................................... 4
•
Changed CMP2 IN– to CMP2 IN+ in Electrical Characteristics: Current-Shunt Monitor condition statement ....................... 5
•
Changed CMP2 IN– to CMP2 IN+ in Electrical Characteristics: General condition statement .............................................. 7
•
Updated Overview section.................................................................................................................................................... 12
•
Deleted 10-pin device image ................................................................................................................................................ 12
•
Changed text from "RFILT – 3%" to "RFILT + 3%" in 2nd paragraph of Input Filtering section ......................................... 16
•
Changed Figure 35 caption .................................................................................................................................................. 16
2
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SBOS539A – DECEMBER 2010 – REVISED APRIL 2016
5 Device Comparison Table
Table 1. Related Products
PRODUCT
DESCRIPTION
INA200–Q1
Single comparator alternative to the INA203's dual comparators
INA193A–Q1
Same amplifier performance without the comparators integrated
INA282–Q1
High-accuracy, high common-mode capable current sense amplifier
INA300–Q1
36-V overcurrent protection comparator
High-accuracy, high slew-rate current sense amplifier with integrated high-speed comparator
optimized for overcurrent protection.
INA301
6 Pin Configuration and Functions
PW Package
14-Pin TSSOP
Top View
VS
1
14
VIN+
OUT
2
13
VIN-
CMP1 IN-/0.6-V REF
3
12
1.2-V REF OUT
CMP1 IN+
4
11
CMP1 OUT
CMP2 IN+
5
10
CMP2 OUT
CMP2 IN±/0.6-V REF
6
9
CMP2 DELAY
GND
7
8
CMP1 RESET
Pin Functions
PIN
NO.
1
NAME
I/O
DESCRIPTION
VS
I
Power supply
2
OUT
O
Output voltage
3
CMP1 IN-/0.6-V REF
I
Comparator 1 negative input, can be used to override the internal 0.6-V reference
4
CMP1 IN+
I
Comparator 1 positive input
5
CMP2 IN+
I
Comparator 2 positive input
6
CMP2 IN–/0.6-V REF
I
Comparator 2 negative input, can be used to override the internal 0.6-V reference
7
GND
I
Ground
8
CMP1 RESET
I
Comparator 1 ouput reset, active low
9
CMP2 DELAY
I
Connect an optional capacitor to adjust comparator 2 delay
10
CMP2 OUT
O
Comparator 2 output
11
CMP1 OUT
O
Comparator 1 output
12
1.2-V REF OUT
O
1.2-V reference output
13
VIN–
I
Amplifier Negative Input. Connect to shunt low side
14
VIN+
I
Amplifier Positive Input. Connect to shunt high side
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INA203-Q1
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7 Specifications
7.1
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
18
V
–18
18
V
–16
80
V
Comparator analog input
CMP1 IN+, CMP1 IN-/0.6-V REF,
CMP2 IN+, CMP2 IN-/0.6-V REF
GND – 0.3
(VS) + 0.3
V
Comparator reset
CMP1 RESET
GND – 0.3
(VS) + 0.3
Analog output
OUT
GND – 0.3
(VS) + 0.3
V
Comparator output
CMP1 OUT, CMP2 OUT
GND – 0.3
(VS) + 0.3
V
GND – 0.3
(VS) up to 10
V
5
mA
150
°C
150
°C
150
°C
Supply voltage
VS
Current-shunt monitor analog
inputs, VIN+ and VIN–
Differential (VIN+) – (VIN–)
Common-mode
1.2-V REF and CMP2 DELAY pins
Input current into any pin
Operating temperature
–55
Junction temperature
Storage temperature, Tstg
(1)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002 (1)
±2000
Charged-device model (CDM), per AEC Q100-011
±500
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
–16
12
80
Operating supply voltage
2.7
12
18
V
Operating free-air temperature
–40
25
125
ºC
VCM
Common-mode input voltage
VS
TA
UNIT
V
7.4 Thermal Information
INA203-Q1
THERMAL METRIC (1)
PW (TSSOP)
UNIT
14 PINS
RθJA
Junction-to-ambient thermal resistance
112.6
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
37.2
°C/W
RθJB
Junction-to-board thermal resistance
55.4
°C/W
ψJT
Junction-to-top characterization parameter
2.7
°C/W
ψJB
Junction-to-board characterization parameter
54.7
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
150
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5
SBOS539A – DECEMBER 2010 – REVISED APRIL 2016
Electrical Characteristics: Current-Shunt Monitor
At TA = 25°C, VS = 12 V, VCM = 12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each connected from CMP1
OUT and CMP2 OUT to VS, and CMP1 IN+ = 1 V and CMP2 IN+ = GND, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VSENSE
Full-scale sense input voltage
VSENSE = VIN+ – VIN–
VCM
Common-mode input range
TA = –40°C to +125°C
–16
CMRR
Common-mode rejection ratio
VCM = –16 V to +80 V
80
100
dB
100
123
dB
90
100
Over temperature
VCM = 12 V to 80 V
0.15 (VS – 0.25)/Gain
TA = 25°C to 125°C
TA = –40°C to +25°C
±0.5
Offset voltage, RTI (1)
VOS
V
80
TA = 25°C to 125°C
TA = –40°C to +25°C
V
dB
±2.5
mV
±3
mV
±3.5
mV
μV/°C
dVOS/dT
Versus temperature
TMIN to TMAX
TA = –40°C to +125°C
5
PSR
Versus power supply
VOUT = 2 V, VCM = +18 V
TA = –40°C to +125°C
2.5
100
μV/V
IB
Input bias current, VIN– Pin
TA = –40°C to +125°C
±9
±16
μA
OUTPUT (VSENSE ≥ 20 mV)
G
Gain
RO
20
Gain error
VSENSE = 20 mV to 100 mV
Over temperature
VSENSE = 20 mV to 100 mV
Total output error (2)
VSENSE = 120 mV, VS = +16 V
Over temperature
VSENSE = 120 mV, VS = +16 V TA = –40°C to +125°C
Nonlinearity error (3)
VSENSE = 20 mV to 100 mV
±1%
±0.75%
±2.2%
TA = –40°C to +125°C
±2%
±3.5%
±0.002%
Output impedance, Pin 2
Maximum capacitive load
V/V
±0.2%
No sustained oscillation
1.5
Ω
10
nF
OUTPUT (VSENSE < 20 mV) (4)
–16 V ≤ VCM < 0 V
VOUT
Output voltage
300
0 V ≤ VCM ≤ VS, VS = 5 V
mV
0.4
VS < VCM ≤ 80 V
V
300
mV
VOLTAGE OUTPUT (5)
Output swing to the positive rail VIN– = 11 V, VIN+ = 12 V
TA = –40°C to +125°C
(VS) – 0.15
(VS) – 0.25
V
Output Swing to GND (6)
TA = –40°C to +125°C
(VGND) + 0.004
(VGND) + 0.05
V
VIN– = 0 V, VIN+ = –0.5 V
FREQUENCY RESPONSE
BW
SR
Bandwidth
CLOAD = 5 pF
500
kHz
Phase margin
CLOAD < 10 nF
40
Degrees
1
V/μs
2
μs
40
nV/√Hz
Slew rate
Settling time (1%)
VSENSE = 10 mVPP to 100 mVPP,
CLOAD = 5 pF
NOISE, RTI
Output Voltage Noise Density
(1)
(2)
(3)
(4)
(5)
(6)
Offset is extrapolated from measurements of the output at 20 mV and 100 mV VSENSE.
Total output error includes effects of gain error and VOS.
Linearity is best fit to a straight line.
For details on this region of operation, see the Accuracy Variations section.
See Typical Characteristics curve Positive Output Voltage Swing vs Output Current (Figure 8).
Specified by design; not production tested.
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7.6
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Electrical Characteristics: Comparator
At TA = +25°C, VS = +12 V, VCM = +12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, and RPULL-UP = 5.1 kΩ each connected from
CMP1 OUT and CMP2 OUT to VS, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
Offset voltage
Comparator common-mode voltage = threshold voltage
Offset voltage drift, comparator 1
TA = –40°C to +125°C
2
mV
±2
μV/°C
Offset voltage drift, comparator 2
TA = –40°C to +125°C
Threshold
Rising Edge on Non-Inverting input, TA = +25°C
590
Over temperature
TA = –40°C to +125°C
586
Hysteresis (1), CMP1
TA = –40°C to +85°C
–8
mV
Hysteresis (1), CMP2
TA = –40°C to +85°C
8
mV
μV/°C
5.4
608
620
mV
625
mV
INPUT BIAS CURRENT (2)
CMP1 IN+, CMP2 IN+
Over temperature
0.005
TA = –40°C to +125°C
10
nA
15
nA
INPUT IMPEDANCE
Pins 3 and 6
10
kΩ
INPUT RANGE
CMP1 IN+ and CMP2 IN+
Pins 3 and 6
(3)
0 V to VS – 1.5 V
V
0 V to VS – 1.5 V
V
OUTPUT
Large-signal differential voltage gain
CMP VOUT 1 V to 4 V, RL ≥ 15 kΩ connected to 5 V
High-level output current
VID = 0.4 V, VOH = VS
Low-level output voltage
200
V/mV
0.0001
1
μA
VID = –0.6 V, IOL = 2.35 mA
220
300
mV
Comparator 1
RL to 5 V, CL = 15 pF, 100 mV input step with 5 mV overdrive
1.3
μs
Comparator 2
RL to 5 V, CL = 15 pF, 100 mV input step with 5 mV overdrive,
CDELAY pin open
1.3
μs
RESPONSE TIME (4)
RESET
RESET threshold (5)
1.1
Logic input impedance
Minimum RESET pulse width
RESET propagation delay
Comparator 2 delay equation (6)
tD
(1)
(2)
(3)
(4)
(5)
(6)
6
Comparator 2 delay
CDELAY = 0.1 μF
V
2
MΩ
1.5
μs
3
μs
CDELAY = tD/5
μF
0.5
s
Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the
noninverting input of the comparator; refer to Figure 1.
Specified by design; not production tested.
See the Comparator Maximum Input Voltage Range section.
The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
The CMP1 RESET input has an internal 2 MΩ (typical) pull-down. Leaving the CMP1 RESET open results in a LOW state, with
transparent comparator operation.
The Comparator 2 delay applies to both rising and falling edges of the comparator output.
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7.7
SBOS539A – DECEMBER 2010 – REVISED APRIL 2016
Electrical Characteristics: Reference
At TA = +25°C, VS = +12 V, VCM = +12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, and RPULL-UP = 5.1 kΩ each connected from
CMP1 OUT and CMP2 OUT to VS, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.188
1.2
1.212
40
100
ppm/°C
40
100
ppm/°C
VREFOUT – 1.2 V
0.4
2
mV/mA
0 mA < ISOURCE < 0.5 mA
0.4
REFERENCE VOLTAGE
1.2 VREFOUT output voltage
dVOUT/dT
Reference drift (1)
0.6 VREF
Output voltage (Pins 3 and 6)
dVOUT/dT
Reference drift (1)
TA = –40°C to +85°C
V
0.6
TA = –40°C to +85°C
V
LOAD REGULATION
dVOUT/dILOAD
Sourcing
0 mA < ISINK < 0.5 mA
Sinking
mV/mA
LOAD CURRENT
ILOAD
1
mA
2.7 V < VS < 18 V
30
μV/V
No sustained oscillations
10
nF
10
kΩ
LINE REGULATION
dVOUT/dVS
CAPACITIVE LOAD
Reference output maximum
capacitive load
OUTPUT IMPEDANCE
Pins 3 and 6
(1)
7.8
Specified by design; not production tested.
Electrical Characteristics: General
All specifications at TA = +25°C, VS = +12 V, VCM = +12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each
connected from CMP1 OUT and CMP2 OUT to VS, and CMP1 IN+ = 1 V and CMP2 IN+ = GND, unless otherwise noted.
GENERAL PARAMETERS
CONDITIONS
MIN
TYP
MAX
UNIT
18
V
1.8
2.2
mA
2.8
mA
POWER SUPPLY
VS
Operating Power Supply
TA = –40°C to +125°C
IQ
Quiescent current
VOUT = 2 V
Over temperature
VSENSE = 0 mV
2.7
TA = –40°C to +125°C
Comparator power-on reset
threshold (1)
(1)
1.5
V
The INA203-Q1 is designed to power-up with the comparator in a defined reset state as long as CMP1 RESET is open or grounded.
The comparator will be in reset as long as the power supply is below the voltage shown here. The comparator assumes a state based
on the comparator input above this supply voltage. If CMP1 RESET is high at power-up, the comparator output comes up high and
requires a reset to assume a low state, if appropriate.
VTHRESHOLD
0.592
VTHRESHOLD
0.6
0.6
0.608
Input Voltage
Input Voltage
Hysteresis = VTHRESHOLD - 8mV
Hysteresis = VTHRESHOLD - 8mV
a) CMP1
b) CMP2
Figure 1. Comparator Hysteresis
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7.9 Typical Characteristics
All specifications at TA = +25°C, VS = +12 V, VCM = +12 V, and VSENSE = 100 mV, unless otherwise noted.
45
45
40
40
35
35
30
Gain (dB)
Gain ( dB)
CLOAD = 1000pF
G = 20
25
30
G = 20
25
20
20
15
15
10
10
5
5
10k
100k
1M
CLOAD = 0
10k
Frequency (Hz)
Figure 2. Gain vs Frequency
Figure 3. Gain vs Frequency
140
18
130
Common-Mode and
Power-Supply Rejection (dB)
20
16
VOUT ( V)
14
12
10
8
20V/V
6
4
120
CMR
110
100
90
PSR
80
70
60
50
2
40
0
20
100
200
300
400
500
600
700
800
10
900
100
1k
100k
Figure 5. Common-Mode and Power-Supply Rejection vs
Frequency
Figure 4. Gain Plot
4.0
0.1
3.5
0.09
3.0
Total Output Error (%)
Total Output Error
(% error of the ideal output value)
10k
Frequency (Hz)
VSENSE (mV)
2.5
2.0
1.5
1.0
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.5
0.01
0
0
50
100 150
200
250 300
350 400 450 500
0
-16 -12 -8 -4
VSENSE (mV)
0
4
8
12 16 20
...
76 80
Common-Mode Voltage (V)
Figure 6. Total Output Error vs VSENSE
8
1M
100k
Frequency (Hz)
Figure 7. Total Output Error vs Common-Mode Voltage
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Typical Characteristics (continued)
All specifications at TA = +25°C, VS = +12 V, VCM = +12 V, and VSENSE = 100 mV, unless otherwise noted.
3.5
12
11
VS = 12V
10
9
2.5
+25°C
8
-40°C
+125°C
7
6
VS = 3V
5
Sourcing Current
+25°C
4
-40°C
Output stage is designed
to source current. Current
sinking capability is
approximately 400mA.
3
2
1
+125°C
0
0
IQ (mA)
Output Voltage (V)
3.0
Sourcing Current
2.0
1.5
1.0
0.5
0
5
10
20
15
25
30
0
1
2
3
4
5
7
6
8
9
10
Output Current (mA)
Output Voltage (V)
Figure 8. Positive Output Voltage Swing vs Output Current
Figure 9. Quiescent Current vs Output Voltage
34
VSENSE = 100mV
1.75
Output Short-Circuit Current (mA)
2.00
VS = 2.7V
VS = 12V
IQ (mA)
1.50
1.25
VS = 12V
1.00
VS = 2.7V
VSENSE = 0mV
0.75
0.50
-16 -12 -8 -4
-40°C
30
+25°C
26
+125°C
22
18
14
10
6
0
4
8
12 16 20 24 28 32 36
2.5 3.5
VCM (V)
4.5
5.5 6.5
7.5
8.5
9.5 10.5 11.5 17
18
Supply Voltage (V)
Figure 10. Quiescent Current vs Common-Mode Voltage
Figure 11. Output Short-Circuit Current vs Supply Voltage
G = 20
Output Voltage (50mV/div)
Output Voltage (500mV/div)
G = 20
VSENSE = 10mV to 20mV
VSENSE = 10mV to 100mV
Time (2ms/div)
Time (2ms/div)
Figure 12. Step Response
Figure 13. Step Response
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Typical Characteristics (continued)
All specifications at TA = +25°C, VS = +12 V, VCM = +12 V, and VSENSE = 100 mV, unless otherwise noted.
600
G = 20
Output Voltage (50mV/div)
500
VOL (mV)
400
300
200
100
VSENSE = 90mV to 100mV
0
1
0
Time (2ms/div)
2
3
4
5
6
ISINK (mA)
Figure 14. Step Response
Figure 15. Comparator VOL vs ISINK
600
602
Comparator Trip Point (mV)
Comparator Trip Point (mV)
599
598
597
596
595
594
593
592
601
600
599
598
597
591
596
590
2
4
6
8
10
12
14
16
18
-25
-50
0
Supply Voltage (V)
25
50
75
100
125
Temperature (°C)
Figure 16. Comparator Trip Point vs Supply Voltage
Figure 17. Comparator Trip Point vs Temperature
200
14
Propagation Delay (ms)
Propagation Delay (ns)
175
150
125
100
13
12
11
75
50
10
0
10
20
40
60
80
100 120 140
160 180
200
0
20
40
60
80
100 120 140
160 180
200
Overdrive Voltage (mV)
Overdrive Voltage (mV)
Figure 18. Comparator 1 Propagation Delay vs Overdrive
Voltage
Figure 19. Comparator 2 Propagation Delay vs Overdrive
Voltage
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Typical Characteristics (continued)
1.2
300
1.0
275
Propagation Delay (ns)
Reset Voltage (V)
All specifications at TA = +25°C, VS = +12 V, VCM = +12 V, and VSENSE = 100 mV, unless otherwise noted.
0.8
0.6
0.4
0.2
250
225
200
175
150
0
4
2
6
8
10
12
14
16
125
-50
18
-25
0
25
50
75
100
125
Supply Voltage (V)
Temperature (°C)
Figure 20. Comparator Reset Voltage vs supply Voltage
Figure 21. Comparator 1 Propagation Delay vs Temperature
Propagation Delay (ms)
1000
100
Input
200mV/div
10
1
Output
2V/div
0.1
VOD = 5mV
0.01
0.001
0.01
0.1
1
10
100
2ms/div
Delay Capacitance (nF)
Figure 22. Comparator 2 Propagation Delay vs Capacitance
Figure 23. Comparator 1 Propagation Delay
1.22
Input
200mV/div
VREF (V)
1.21
1.20
1.19
Output
2V/div
1.18
-50
VOD = 5mV
5ms/div
-25
0
25
50
75
100
125
Temperature (°C)
Figure 24. Comparator 2 Propagation Delay
Figure 25. Reference Voltage vs Temperature
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8 Detailed Description
8.1 Overview
The INA203-Q1 device is a unidirectional voltage output current-sense amplifier with dual comparators and
voltage reference. The INA203-Q1 operates over a wide range of common-mode voltage (–16 V to +80 V) and
incorporates two open-drain comparators with internal 0.6-V references. Comparator 1 includes a latching
capability, and Comparator 2 has a user-programmable delay. The device also incorporates a 1.2-V reference
output.
8.2 Functional Block Diagram
VS
1
14 VIN+
13 VIN±
OUT 2
1.2V REF
CMP1 IN± /0.6V REF
3
12 1.2V REF OUT
CMP1 IN+ 4
11 CMP1 OUT
CMP2 IN+ 5
10 CMP2 OUT
CMP2 IN± /0.6V REF 6
9
CMP2 DELAY
GND 7
8
CMP1 RESET
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8.3 Feature Description
8.3.1 Comparator
The INA203-Q1 incorporates two open-drain comparators. These comparators typically have 2 mV of offset and
a 1.3-μs (typical) response time. The output of Comparator 1 latches and is reset through the CMP1 RESET pin,
as shown in Figure 26.
The INA203-Q1 device includes additional features for comparator functions. The comparator reference voltage
of both Comparator 1 and Comparator 2 can be overridden by external inputs for increased design flexibility.
Comparator 2 has a programmable delay.
0.6V
VIN
0V
CMP Out
RESET
Figure 26. Comparator Latching Capability
8.3.2 Comparator Delay
The Comparator 2 programmable delay is controlled by a capacitor connected to the CMP2 Delay Pin; see
Figure 30. The capacitor value (in μF) is selected by using Equation 1:
t
CDELAY (in mF) = D
5
(1)
A simplified version of the delay circuit for Comparator 2 is shown in Figure 27. The delay comparator consists of
two comparator stages with the delay between them.
12
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Feature Description (continued)
NOTE
I1 and I2 cannot be turned on simultaneously; I1 corresponds to a U1 low output and I2
corresponds to a U1 high output.
Using an initial assumption that the U1 output is low, I1 is on, then U2 +IN is zero. If U1 goes high, I2 supplies
120 nA to CDELAY. The voltage at U2 +IN begins to ramp toward a 0.6-V threshold. When the voltage crosses this
threshold, the U2 output goes high while the voltage at U2 +IN continues to ramp up to a maximum of 1.2 V
when given sufficient time (twice the value of the delay specified for CDELAY). This entire sequence is reversed
when the comparator outputs go low, so that returning to low exhibits the same delay.
1.2V
I2
120nA
U1
U2
I1
120nA
0.6V
CDELAY
Figure 27. Simplified Model of The Comparator 2 Delay Circuit
It is important to note the behavior of the Comparator 2 when the events at the inputs occur more rapidly than
the set delay timeout. For example, when the U1 output goes high (turning on I2), but returns low (turning I1
back on) prior to reaching the 0.6 V transition for U2. The voltage at U2 +IN ramps back down at a rate
determined by the value of CDELAY, and only returns to zero if given sufficient time.
In essence, when analyzing Comparator 2 for behavior with events more rapid than its delay setting, use the
model shown in Figure 27.
8.3.3 Comparator Maximum Input Voltage Range
The maximum voltage at the comparator input for normal operation is up to (VS) – 1.5 V. There are special
considerations when overdriving the reference inputs (pins 3 and 6). Driving either or both inputs high enough to
drive 1 mA back into the reference introduces errors into the reference. Figure 28 shows the basic input
structure. A general guideline is to limit the voltage on both inputs to a total of 20 V. The exact limit depends on
the available voltage and whether either or both inputs are subject to the large voltage. When making this
determination, consider the 20 kΩ from each input back to the comparator. Figure 29 shows the maximum input
voltage that avoids creating a reference error when driving both inputs (an equivalent resistance back into the
reference of 10 kΩ).
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Feature Description (continued)
” 1mA
1.2V
20 kŸ
20 kŸ
CMP1 IN±
CMP2 IN±
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Figure 28. Limit Current Into Reference ≤ 1 mA
RSHUNT
3 PŸ
Load Supply
±16V to +80V
Load
18V Supply
Current Shunt
Monitor Output
CBYPASS
0.01 F
V
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