INA851EVM

www.ti.com User’s Guide INA851 Evaluation Module ABSTRACT This user's guide contains information and support documentation for the INA851 evaluation module (EVM). Included are the circuit description, jumper settings, required connections, printed circuit board (PCB) layout, schematic, and bill of materials of the INA851EVM. Throughout this document, the terms evaluation board, evaluation module, and EVM are synonymous with the INA851EVM. SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated INA851 Evaluation Module 1 Table of Contents www.ti.com Table of Contents 1 Overview..................................................................................................................................................................................3 1.1 Related Documentation......................................................................................................................................................3 1.2 Electrostatic Discharge Caution......................................................................................................................................... 3 1.3 Hot Surface Warning.......................................................................................................................................................... 3 2 EVM Circuit Description.........................................................................................................................................................4 3 Jumper Settings......................................................................................................................................................................5 4 Power-Supply Connections................................................................................................................................................... 6 5 Input and Output Connections.............................................................................................................................................. 7 6 Modifications...........................................................................................................................................................................9 7 Schematic, PCB Layout, and Bill of Materials......................................................................................................................9 7.1 Schematic.......................................................................................................................................................................... 9 7.2 PCB Layout........................................................................................................................................................................ 9 7.3 Bill of Materials.................................................................................................................................................................15 8 Revision History................................................................................................................................................................... 16 List of Figures Figure 2-1. INA851EVM Simplified Schematic............................................................................................................................ 4 Figure 3-1. INA851EVM Default Jumper Settings....................................................................................................................... 5 Figure 4-1. INA851EVM Voltage Supply Connections.................................................................................................................6 Figure 5-1. INA851EVM Input and Output Connections..............................................................................................................7 Figure 7-1. INA851EVM Schematic.............................................................................................................................................9 Figure 7-2. Top Overlay PCB Layout......................................................................................................................................... 10 Figure 7-3. Top Layer PCB Layout.............................................................................................................................................11 Figure 7-4. Ground Layer PCB Layout...................................................................................................................................... 12 Figure 7-5. Power Layer PCB Layout........................................................................................................................................ 13 Figure 7-6. Bottom Layer PCB Layout.......................................................................................................................................14 List of Tables Table 1-1. Related Documentation.............................................................................................................................................. 3 Table 3-1. Default Jumper Configuration..................................................................................................................................... 5 Table 4-1. INA851EVM Supply-Range Specifications................................................................................................................. 6 Table 5-1. INA851EVM Input and Output Connections............................................................................................................... 8 Table 7-1. INA851EVM Bill of Materials.....................................................................................................................................15 Trademarks All trademarks are the property of their respective owners. 2 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Overview 1 Overview The INA851 is a high-precision instrumentation amplifier with differential outputs that is optimized to drive high-performance analog-to-digital converters (ADCs) with fully differential inputs. A single external resistor sets any gain from 0.2 V/V to 10,000 V/V. The device features super-beta input transistors from Texas Instruments, which provide ultra-low input offset voltage, offset drift, input bias current, input voltage noise, and current noise. For a full list of electrical characteristics for the INA851, see the INA851 Precision, Fully Differential Output, Instrumentation Amplifier data sheet. 1.1 Related Documentation The following document provides information regarding Texas Instruments integrated circuits used in the assembly of the INA851EVM. This user's guide is available from the TI website under literature number SBOU273. Any letter appended to the literature number corresponds to the document revision that is current at the time of the writing of this document. Newer revisions are available from the TI website at https://www.ti.com/, or call the Texas Instruments Literature Response Center at (800) 477-8924 or the Product Information Center at (972) 644-5580. When ordering, identify the document by both title and literature number. Table 1-1. Related Documentation Device Literature Number INA851 SBOS999 1.2 Electrostatic Discharge Caution CAUTION Many of the components on the INA851EVM are susceptible to damage by electrostatic discharge (ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation. 1.3 Hot Surface Warning WARNING Device can become hot under high-current conditions. Take care when handling the EVM. SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated INA851 Evaluation Module 3 EVM Circuit Description www.ti.com 2 EVM Circuit Description This EVM provides access to the features and measures the performance of the INA851. By default, the INA851EVM instrumentation amplifier is configured to a gain of 1 V/V. The evaluation board provides optional footprints for gain resistors RG1 and RG2 to modify the input-stage instrumentation-amplifier gain. Optional footprints R5 and R9 can be populated with 0-Ω jumpers to set the output stage gain to 0.2 V/V. The INA851 incorporates features that simplify interfacing to a fully-differential ADC. The VOCM connector sets the output common-mode voltage. If the VOCM connector is not driven, the output common-mode voltage defaults to the INA851 midsupply value. Clamp pins are provided to limit the INA851 output voltage level, which can be applied to the ADC inputs. The output clamp pins, VCLAMP+ and VCLAMP–, are accessible using connector J9. Selectable jumpers J11 and J12 set the output clamp voltage level to the INA851 supplies (default), or to external voltages using connector J9. Revision A of the INA851EVM allows access to the FDA_IN– and FDA_IN+ pins with optional capacitors C7 and C18. These capacitors are in parallel with the INA851 output stage internal feedback resistors to implement noise filtering. A simplified block diagram of the INA851EVM is displayed in Figure 2-1. For a full schematic of the INA851EVM, see Figure 7-1. VCC C17 100 nF FDA_IN– FDA_IN– 3 VCLAMP+ 2 U1 INA851RGT 1 FDA_IN– VS+ J7 VCLAMP+ Output Clamp SMA Connector J6 IN– IN– R11 100  RG– + 1.25 k – 5 k RG1 DNP C9 100 pF SMA Connector J3 IN+ R2 100 3k IN+ 5 k G02+ 5 k 1.25 k J5.3 R9 DNP G02– VOCM FDA_IN+ VS– VOCM Connector OUT– C18 DNP 1 3 J5.1 R10 100 Output Clamp VCLAMP– C6 100 nF VCLAMP– FDA_IN+ VEE VCC OUT+ J5.2 J4 2 J5.4 C13 100 pF OUT– + – Output Connector R4 100  R5 DNP OUT+ – + RG+ C15 10pF 5 k – C12 3 k
+ 10pF C7 DNP D2 VEE FDA_IN+ VCC R18 10 k R1 Vclamp Connector J10.1 100  R19 J10.2 10 k C5 100 nF Vclamp+_ext J9.1 3 100 nF VCLAMP+ 1 J11 J9.2 VEE VCC J9.4 100 nF C20 Vclamp-_ext J9.3 Power Supply Connector VCC J1.3 C1 10 µF J1.1 3 VCC VCLAMP– C2 100 nF C4 100 nF VEE 2 1 D1 36 V J1.2 C3 10 µF 2 C19 VEE VCC D3 J12 VEE VEE Figure 2-1. INA851EVM Simplified Schematic 4 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Jumper Settings 3 Jumper Settings Figure 3-1 details the default jumper settings of the INA851EVM. Table 3-1 explains the configuration for these jumpers. Figure 3-1. INA851EVM Default Jumper Settings Table 3-1. Default Jumper Configuration Jumper Function Default Position Description J4 Positive (noninverting) input, IN+ Shunt 2-3 Shunt 2-3: Input signal to SMA connector J3 Shunt 1-2 connects IN+ to GND J7 Negative (inverting) input, IN– Shunt 2-3 Shunt 2-3: Input signal to SMA connector J6 Shunt 1-2 connects IN– to GND J11 VCLAMP+ connection Shunt 1-2 Shunt 1-2: Sets level of output VCLAMP+ to +VCC supply Shunt 2-3 connects VCLAMP+ to external connector J9 pin 3 J12 VCLAMP– connection Shunt 1-2 Shunt 1-2: Sets level of output VCLAMP-to-VEE supply Shunt 2-3 connects VCLAMP– to external connector J9 pin 1 SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated INA851 Evaluation Module 5 Power-Supply Connections www.ti.com 4 Power-Supply Connections The power-supply connections for the INA851EVM are provided through connector J1 at the top of the EVM. The positive power-supply connection is labeled +VCC, the negative power-supply connection is labeled –VEE, and the ground connection is labeled GND. To connect power to the INA851EVM, insert wires into each terminal of J1 and then tighten the screws to make the connection. Table 4-1 summarizes the pin definition for supply connector J1 and the allowed voltage range for each supply connection. Table 4-1. INA851EVM Supply-Range Specifications Pin Number Supply Connection J1.3 Positive supply (+VCC) J1.2 Ground J1.1 Negative supply (–VEE) Voltage Range Single supply, VS = (+VCC): 8 V to 36 V Dual supply, VS = (+VCC) – (–VEE): 4 V to 18 V 0V Single supply, VS = (+VCC): 0 V (GND) Dual supply, VS = (+VCC) – (–VEE): –4 V to –18 V Figure 4-1 shows the INA851EVM voltage supply connections. VCC U1 INA851RGT FDA_IN– VS+ TP1 VCC IN– C4 100 nF RG– – D1 36 V 3 k
5 k 3k RG+ IN+ 5 k OUT– + – 5 k 1.25 k VEE TP3 GND OUT+ – + TP2 VEE G02+ 5 k + C3 10 µF C2 100 nF 1.25 k + – C1 10 µF VCLAMP+ Output Clamp VCC Power-Supply Connector J1 3 2 1 C17 100 nF G02– Output Clamp VOCM FDA_IN+ VS– VCLAMP– C6 100 nF VEE Figure 4-1. INA851EVM Voltage Supply Connections 6 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Input and Output Connections 5 Input and Output Connections The instrumentation amplifier input signal connections for the INA851EVM are provided through the use of SMA connectors J3, J6, and test points TP5, TP7, located at the left of the EVM. The VOCM input is provided through screw-terminal connector J10, located on the left of the board. By default, the output clamp voltage levels, VCLAMP+ and VCLAMP–, are set to the INA851 positive (+VCC) and negative (–VEE) supplies, respectively. The VCLAMP+ pin is connected to +VCC through jumper J11 1-2, and the VCLAMP– pin is connected to –VEE through J12 1-2. Screw terminal connector J9 provides access to the output clamp pins. To set the voltage level of the clamps with an external supply, shunt jumper J11 2-3 to access the VCLAMP+ using connector J9.1. In a similar fashion, shunt jumper J12 2-3 to access the VCLAMP– pin using connector J9.3. The differential output amplifier connections are provided through screw-terminal connector J5, SMA connectors J2 and J8, and test points TP6 and TP8, located at the right side of the EVM. A simplified diagram of the INA851EVM input and output connections is displayed in Figure 5-1. FDA_IN– VCC C17 100 nF FDA_IN– TP4 SMA Output Connector TP6 VCLAMP+ U1 INA851RGT Output Clamp TP7 J6 IN– IN– R11 100 Ω 100 pF TP5 C15 10pF J3 – 5 k OUT+ Output Connector R5 G02+ J5.4 OUT+ R4 100 Ω DNP 5 k J2 C7 DNP 5 k C13 100pF OUT+ –+ J5.3 OUT– + – J5.2 3k RG+ IN+ 5 kΩ + IN+ 3 k
RG1 DNP C12 1.25 k + RG– C9 10pF SMA Connector GND VCLAMP+ – SMA Connector FDA_IN– VS+ DNP G02– J5.1 1.25 kΩ R2 100 Ω R9 Output Clamp VOCM FDA_IN+ VS– 100 Ω C18 SMA Output Connector TP8 DNP TP9 VCLAMP– C6 100 nF R1 OUT– R10 100 Ω J8 GND VCLAMP– OUT– FDA_IN+ C5 100 nF VEE FDA_IN+ VEE TP11 VCLAMP+ VCC D2 Vclamp Connector VCC VOCM Connector TP13 3 100 nF Vclamp+_ext J9.1 2 1 C19 R18 J11 J9.2 10 kΩ J10.1 J9.4 R19 TP10 VCLAMP+ TP12 VCLAMP– 100 nF VCC C20 Vclamp– _ext J9.3 10 kΩ 3 VEE VCLAMP– 2 J10.2 1 VEE VCC D3 J12 VEE Figure 5-1. INA851EVM Input and Output Connections SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated INA851 Evaluation Module 7 Input and Output Connections www.ti.com Table 5-1 summarizes the input and output connectors and corresponding test points. Table 5-1. INA851EVM Input and Output Connections 8 Connector Designator Signal Comment Test Point J3 IN+ SMA TP5 J6 IN– SMA TP7 J2 OUT+ SMA TP6 J8 OUT– SMA TP8 J5.4 OUT+ Screw terminal TP6 J5.3 GND Screw terminal TP4 J5.2 GND Screw terminal TP9 J5.1 OUT– Screw terminal TP8 J10.1 VOCM Screw terminal TP13 J10.2 GND Screw terminal N/A J9.1 VCLAMP+ external Screw terminal N/A J9.2 GND Screw terminal N/A J9.3 VCLAMP– external Screw terminal N/A J9.4 GND Screw terminal N/A INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Modifications 6 Modifications By default, the INA851EVM is populated with the INA851 device configured in gain of 1 V/V. However, for flexibility, the PCB layout has additional unpopulated, passive component footprints for gain resistors RG1 and RG2 to set the front-end amplifier gain. Optional footprints for jumper resistors R5 and R6 are provided to set the output stage to gain of 0.2 V/V. In addition, the evaluation board provides footprints R3, R12, C10, C8, and C14 for optional input low-pass filters, and footprints for load resistors R6 and R13. These additional component footprints in the layout allow the user to customize the evaluation circuit. For a full schematic of the INA851EVM, see Figure 7-1. 7 Schematic, PCB Layout, and Bill of Materials This section contains the schematic, PCB layout, and bill of materials for the INA851EVM. 7.1 Schematic Figure 7-1 illustrates the EVM schematic. J1 3 2 1 VCC TP1 VCC VCC C1 10uF C2 100nF C3 10uF C4 GND 100nF D1 TP2 VEE R1 VOCM CDSOD323-T36S 36V 100 C5 100nF 50V GND TP3 GND VEE Note: RG1, RG2, R5, R9 are not populated, for flexibility VEE TP4 GND FDA_IN- J2 1 2 3 4 5 VEE GND U1A INA851RGT TP5 IN+ C6 C7 DNP100pF C0G/NP0 J3 R2 1 0 J4 100 5 4 3 2 C10 DNP 100V 100pF GND TP7 IN- DNP C8 50V 10pF J6 1 0 R12 4 RG+ 2 C15 GND 50V 10pF R11 + 3 RG1 RG2 DNP 0 DNP 0 1 C17 C11 50V 10pF R6 DNP1.00k 3 C16 50V 10pF R10 100nF 50V 5 4 3 2 VCC Note: C7, C8, C10, C14, C18 are not populated, for flexibility GND GND GND 2 1 1 OUT- DNP R13 DNP1.00k C18 C0G/NP0 100pF GND 4 3 2 TP8 100 100 TP10 GND 4 C13 100V 100pF 0 R9 DNP Gain 0.2 (-) 9 J7 1 2 3 J5 OUT+ 100 10 - GND TP6 11 VOCM RG- 14 DNP C14 GND 50V 10pF C9 50V 10pF C12 100V 100pF GND Note: R6, R13, are not populated, for flexibility R4 Gain 0.2 (+) 0 R5 DNP 13 12 7 1 2 3 GND 100nF 50V GND R3 FDA_IN+ J8 1 GND GND 1 1 2 3 3 VCC BAT853SWF 1 1 2 2 3 3 4 4 VClamp+_ext 0 R15 Vclamp- to Vee TP11 Vclmp+ 1 2 3 2 0 R14 0 R17 VEE VCC 16 5 Vclamp+ Vclamp- FDA_IN+ NC FDA_INEP 3 0 R16 GND GND INA851RGT U1B VEE J12 D3 1 GND VClamp-_ext TP12 Vclmp- Vclamp+ to Ext C19 100nF J9 TP9 GND J11 2 VEE GND 2 3 4 5 Vclamp+ to Vcc VCC D2 GND 6 8 15 FDA_IN+ FDA_IN- 17 Vclamp- to Ext VEE BAT853SWF C20 100nF VCC GND GND Note: Rev A, Final Release R18 10.0k VOCM TP13 J10 VOCM 1 2 R19 10.0k GND VEE Note: DNP components are not populated. Figure 7-1. INA851EVM Schematic 7.2 PCB Layout The INA851EVM is a four-layer PCB design. Figure 7-2 to Figure 7-6 show the PCB layer illustrations. The top layer consists of all signal path traces, and is poured with a solid ground plane. A symmetrical board layout is used at the differential inputs and outputs to keep good performance matching and improve commonmode noise rejection. Route traces as symmetrically as possible for both positive and negative pathways. Gain resistors RG1 and RG2 are placed on the top layer in close proximity to the device to reduce parasitic capacitance. Capacitor C5 is placed in close proximity to VOCM to avoid injecting common-mode noise. Decoupling capacitors C6, and C17 are positioned on the top layer as close as possible to the power-supply pins of the device. The second internal layer is a dedicated solid GND plane. Independent vias are placed at the ground connection of every component to provide a low-impedance path to ground. The third internal layer and bottom layer route the power supplies and the VCLAMP+ and VCLAMP– connections. SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated INA851 Evaluation Module 9 Schematic, PCB Layout, and Bill of Materials www.ti.com Figure 7-2. Top Overlay PCB Layout 10 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Schematic, PCB Layout, and Bill of Materials Figure 7-3. Top Layer PCB Layout SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated INA851 Evaluation Module 11 Schematic, PCB Layout, and Bill of Materials www.ti.com Figure 7-4. Ground Layer PCB Layout 12 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Schematic, PCB Layout, and Bill of Materials Figure 7-5. Power Layer PCB Layout SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated INA851 Evaluation Module 13 Schematic, PCB Layout, and Bill of Materials www.ti.com Figure 7-6. Bottom Layer PCB Layout 14 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Schematic, PCB Layout, and Bill of Materials 7.3 Bill of Materials Table 7-1 lists the INA851EVM bill of materials (BOM). Table 7-1. INA851EVM Bill of Materials Designator Quantity Value Description Package Reference Printed Circuit Board Part Number Manufacturer !PCB1 1 AMPS140 Any C1, C3 2 10 µF CAP, CERM, 10 uF, 35 V, +/- 10%, X7R, 1206 1206 C3216X7R1V106K160AC TDK C2, C4, C19, C20 4 0.1 µF CAP, CERM, 0.1 uF, 50 V, +/- 10%, X7R, 0805 0805 08055C104KAT2A AVX C5, C6, C17 3 0.1 µF CAP, CERM, 0.1 uF, 50 V, +/- 5%, X7R, 0603 0603 C0603C104J5RACTU Kemet C9, C15 2 10 pF CAP, CERM, 10 pF, 50 V, +/- 1%, C0G/NP0, 0603 603 C0603C100F5GAC7867 Kemet C11, C16 2 10 pF CAP, CERM, 10 pF, 50 V, +/- 5%, C0G/NP0, 0805 0805 08055A100JAT2A AVX C12, C13 2 100 pF CAP, CERM, 100 pF, 100 V, +/- 5%, C0G/NP0, 0805 0805 C0805C101J1GACTU Kemet D1 1 39 V Zener Diode 39 V 200 mW ±5% Surface Mount SOD-323 SOD-323 BZX384C39-E3-08 Vishay Semiconductor D2, D3 2 Diode Array 1 Pair Series Connection Schottky 40 V 200 mA (DC) Surface Mount SC-70, SOT-323 SOT-323 BAT854SWF Nexperia H1, H2, H3, H4 4 Machine Screw, Round, #4-40 x 1/4, Nylon, Philips Screw panhead NY PMS 440 0025 PH B&F Fastener Supply H5, H6, H7, H8 4 Standoff, Hex, 0.5"L #4-40 Nylon Standoff 1902C Keystone J1 1 Terminal Block, 3.5mm Pitch, 3x1, TH 10.5x8.2x6.5mm ED555/3DS On-Shore Technology J2, J3, J6, J8 4 Connector, End launch SMA, 50 ohm, SMT End Launch SMA 142-0701-801 Cinch Connectivity J4, J7, J11, J12 4 Header, 100mil, 3x1, Gold, TH PBC03SAAN PBC03SAAN Sullins Connector Solutions J5, J9 2 TERM BLOCK 3.5MM VERT 4POS PCB HDR4 OSTTE040161 On Shore Technology J10 1 Terminal Block, 3.5mm Pitch, 2x1, TH 7.0x8.2x6.5mm ED555/2DS On-Shore Technology R1 1 100 Ω RES, 100, 1%, 0.1 W, 0603 0603 RC0603FR-07100RL Yageo R2, R4, R10, R11 4 100 Ω RES, 100, 0.1%, 0.125 W, 0805 0805 RT0805BRD07100RL Yageo America R3, R12 2 0Ω RES, 0, 5%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 ERJ-6GEY0R00V Panasonic R14, R15, R16, R17 4 0Ω RES, 0, 5%, 0.1 W, 0603 0603 RC0603JR-070RL Yageo R18, R19 2 10.0 kΩ RES, 10.0 k, 1%, 0.1 W, 0603 0603 ERJ-3EKF1002V Panasonic SH-J1, SH-J2, SH-J3 3 1×2 Shunt, 100mil, Flash Gold, Black Closed Top 100mil Shunt SPC02SYAN Sullins Connector Solutions TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10, TP11, TP12, TP13 13 Test Point, Miniature, SMT Test Point, Miniature, SMT 5019 Keystone U1 1 Precision, Fully Differential Output, Instrumentation VQFN16 Amplifier INA851RGT Texas Instruments SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback INA851 Evaluation Module Copyright © 2022 Texas Instruments Incorporated 15 Revision History www.ti.com 8 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (February 2022) to Revision A (November 2022) Page • Changed INA851EVM photo to show updated revision A board........................................................................ 1 • Added text to Section 2, EVM Circuit Description, regarding PCB revision A.................................................... 4 • Changed Figure 2-1, EVM Simplified Schematic, to show updated FDA_IN– and FDA_IN+ connections........ 4 • Changed Figure 3-1, INA851EVM Default Jumper Settings, to show updated RTM Revision A silkscreen...... 5 • Changed Figure 4-1, INA851EVM Voltage Supply Connections, to show FDA_IN– and FDA_IN+ pins........... 6 • Changed Figure 5-1, INA851EVM Input and Output Connections, to show PCB revision A changes............... 7 • Changed Figure 7-1, INA851EVM Schematic, to show PCB revision A.............................................................9 • Changed Figure 7-2 to 7-6 to show the latest PCB Revision A layout............................................................... 9 • Changed Table 7-1, Bill of Materials, to show PCB revision A updates............................................................15 16 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated STANDARD TERMS FOR EVALUATION MODULES 1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms. 1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms that accompany such Software 1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system. 2 Limited Warranty and Related Remedies/Disclaimers: 2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement. 2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM. User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10) business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected. 2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period. WARNING Evaluation Kits are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User shall operate the Evaluation Kit within TI’s recommended guidelines and any applicable legal or environmental requirements as well as reasonable and customary safeguards. Failure to set up and/or operate the Evaluation Kit within TI’s recommended guidelines may result in personal injury or death or property damage. Proper set up entails following TI’s instructions for electrical ratings of interface circuits such as input, output and electrical loads. NOTE: EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG. www.ti.com 3 Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter. 3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant: CAUTION This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • • • • Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. 3.2 Canada 3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247 Concerning EVMs Including Radio Transmitters: This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concernant les EVMs avec appareils radio: Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concerning EVMs Including Detachable Antennas: Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. 2 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur 3.3 Japan 3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に 輸入される評価用キット、ボードについては、次のところをご覧ください。 http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified by TI as conforming to Technical Regulations of Radio Law of Japan. If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs (which for the avoidance of doubt are stated strictly for convenience and should be verified by User): 1. 2. 3. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan. 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 2. 3. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 実験局の免許を取得後ご使用いただく。 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures. 3 www.ti.com 4 EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages. 4.3 Safety-Related Warnings and Restrictions: 4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm. 4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees. 4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements. 5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free. 6. Disclaimers: 6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. 6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED. 7. 4 USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED. www.ti.com 8. Limitations on Damages and Liability: 8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS OR THE USE OF THE EVMS , REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE (12) MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED. 8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY USE OF AN EVM PROVIDED HEREUNDER, INCLUDING FROM ANY WARRANTY, INDEMITY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS, , EXCEED THE TOTAL AMOUNT PAID TO TI BY USER FOR THE PARTICULAR EVM(S) AT ISSUE DURING THE PRIOR TWELVE (12) MONTHS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT. 9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs. 10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. 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