ISO100AP

ISO100 ISO 100 Optically-Coupled Linear ISOLATION AMPLIFIER FEATURES APPLICATIONS ● EASY TO USE, SIMILAR TO AN OP AMP VOUT/IIN = RF, Current Input VOUT/VIN = RF/RIN, Voltage Input ● 100% TESTED FOR BREAKDOWN: 750V Continuous Isolation Voltage ● ULTRA-LOW LEAKAGE: 0.3µA, max, at 240V/60Hz ● WIDE BANDWIDTH: 60kHz ● INDUSTRIAL PROCESS CONTROL Transducer Sensing (Thermocouples, RTD, Pressure Bridges) 4mA to 20mA Loops Motor and SCR Control Ground Loop Elimination ● BIOMEDICAL MEASUREMENTS ● TEST EQUIPMENT ● 18-PIN DIP PACKAGE ● DATA ACQUISITION DESCRIPTION The ISO100 is an optically-coupled isolation amplifier. High accuracy, linearity, and time-temperature stability are achieved by coupling light from an LED back to the input (negative feedback) as well as forward to the output. Optical components are carefully matched and the amplifier is actively laser-trimmed to assure excellent tracking and low offset errors. The circuit acts as a current-to-voltage converter with a minimum of 750V (2500V test) between input and output terminals. It also effectively breaks the galvanic connection between input and output commons as indicated by the ultra-low 60Hz leakage current of 0.3µA at 250V. Voltage input operation is easily achieved by using one external resistor. Versatility along with outstanding DC and AC performance provide excellent solutions to a variety of challenging isolation problems. For example, the ISO100 is capable of operating in many modes, including: noninverting (unipolar and bipolar) and inverting (unipolar and bipolar) configurations. Two precision current sources are provided to accomplish bipolar operation. Since these are not required for unipolar operation, they are available for external use (see Applications section). Designs using the ISO100 are easily accomplished with relatively few external components. Since VOUT of the ISO100 is simply IINRF, gains can be changed by altering one resistor value. In addition, the ISO100 has sufficient bandwidth (DC to 60kHz) to amplify most industrial and test equipment signals. IREF1 Balance RF IREF2 7 16 13 14 +In –In Balance 8 5 6 15 17 A1 3 A2 D1 VOUT D2 LED 12 10 –VCC +VCC 18 Input Common 9 4 2 Output –VCC +VCC Common International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © SBOS134 1982 Burr-Brown Corporation PDS-456G 1 ISO100 Printed in U.S.A. August, 1997 SPECIFICATIONS ELECTRICAL At TA = +25°C and ±VCC = 15VDC, unless otherwise specified. ISO100AP PARAMETER ISOLATION Voltage Rated Continuous, AC peak or DC(1) Test Breakdown, DC Rejection(2) DC CONDITIONS MIN 10s 750 2500 Impedance Leakage Current TYP REFERENCE CURRENT SOURCES Magnitude Nominal vs Temperature vs Power Supplies Matching Nominal vs Temperature vs Power Supplies Compliance Voltage Output Resistance 500 5 105 300 2 ✻ 200 2 ✻ µV µV/°C dB µV/kHr 200 2 ✻ µV µV/°C dB µV/kHr nA/V dB V ✻ 150 ✻ µA ppm/°C nA/V ✻ 0.22 TEMPERATURE RANGE Specification Operating Storage ✻ 300 2 ✻ ✻ ✻ ✻ ✻ ✻ ✻ 12.5 300 3 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ 2 x 109 ✻ ✻ nA ppm/°C nA/V V Ω 60 5 0.31 100 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ kHz kHz V/µs µs –10 0.1% V V pA/V dB pA/V dB Ω||pF µA, rms ✻ 50 150 0.3 Gain = 1V/µA Gain = 1V/µA, VO = ±10V UNITS ✻ ✻ ✻ ✻ ✻ ✻ 0.3 MAX ✻ ±10 12 TYP 0.3 1 3 90 10.5 MIN ✻ ✻ 500 5 105 60Hz, RF = 1MΩ RIN = 10kΩ, Gain = 100 MAX ✻ ✻ ✻ ✻ ✻ 1 Common-Mode Range FREQUENCY RESPONSE Small Signal Bandwidth Full Power Bandwidth Slew Rate Settling Time MIN ISO100CP ✻ ✻ 240Vrms, 60Hz OFFSET VOLTAGE (RTI) Input Stage (VOSI) Initial Offset vs Temperature vs Input Power Supplies vs Time Output Stage (VOSO) Initial Offset vs Temperature vs Output Power Supplies vs Time Common-Mode Rejection Ratio(2) MAX 5 146 400 108 1012||2.5 RIN = 10kΩ, Gain = 100 60Hz, 480V, RF = 1MΩ RIN = 10kΩ, Gain = 100 AC TYP ISO100BP +15 –25 –40 –40 ✻ ✻ ✻ ✻ ✻ ✻ +85 +100 +100 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ °C °C °C –0.02 +1 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ 0 ✻ ✻ ✻ µA mA Ω V Ω UNIPOLAR OPERATION GENERAL PARAMETERS Input Current Range Linear Operation Without Damage Input Impedance Output Voltage Swing Output Impedance GAIN Initial Error (adjustable to zero) vs Temperature vs Time Nonlinearity(3) –20 –1 ✻ 0.1 RL = 2kΩ, RF = 1MΩ DC, Open-Loop –10 ✻ ✻ 1200 ✻ ✻ VO = RF (IIN) 2 0.03 0.05 0.1 5 0.07 0.4 1 0.01 ✻ 0.03 2 0.05 0.1 1 0.005 ✻ 0.02 2 0.03 0.07 % of FS %/°C %/kHr % IIN = 0.2µA CURRENT NOISE 0.01Hz to 10Hz 10Hz 100Hz 1kHz 20 1 0.7 0.65 ISO100 2 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ pAp-p pA/√Hz pA/√Hz pA/√Hz SPECIFICATIONS (CONT) ELECTRICAL At TA = +25°C and ±VCC = 15VDC, unless otherwise specified. ISO100AP PARAMETER CONDITIONS MIN INPUT OFFSET CURRENT (IOS) Initial Offset vs Temperature vs Power Supplies vs Time POWER SUPPLIES Input Stage Voltage (rated performance) Voltage (derated performance) Supply Current IIN = –0.02 µA IIN = –20µA Output Stage Voltage (rated performance) Voltage (derated performance) Supply Current Short Circuit Current Limit ±7 ±7 VO = 0 ISO100BP TYP MAX 1 0.05 0.1 100 10 MIN ±15 ±1.1 TYP MAX ✻ ✻ ✻ ✻ ✻ MIN ✻ ±18 ±1.1 ±2 +8, –1.1 +13, –2 ±15 ISO100CP ✻ ✻ ✻ ✻ +10 +1 ✻ ✻ +10 ✻ ✻ MAX UNITS ✻ ✻ ✻ ✻ ✻ nA nA/°C nA/V pA/kHr ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ±18 ±2 ±40 TYP ✻ ✻ ✻ V V mA mA ✻ ✻ ✻ V V mA mA ✻ ✻ BIPOLAR OPERATION GENERAL PARAMETERS Input Current Range Linear Operation Without Damage Input Impedance Output Voltage Swing Output Impedance –10 –1 GAIN Initial Error (Adjustable To Zero) vs Temperature vs Time Nonlinearity(3) CURRENT NOISE 0.01Hz to 10Hz 10Hz 100Hz 1kHz –10 Output Stage Voltage (rated performance) Voltage (derated performance) Supply Current Short Circuit Current Limit ✻ ✻ 1200 ✻ ✻ µA mA Ω V Ω VO = RF (IIN) 2 0.03 0.05 0.1 5 0.07 1 0.01 ✻ 0.03 0.4 2 0.05 1 0.005 ✻ 0.02 0.1 2 0.03 0.07 % of FS %/°C %/kHr % IIN = 0.2µA ✻ ✻ ✻ ✻ 1.5 17 7 6 INPUT OFFSET CURRENT (IOS, bipolar(4)) Initial Offset vs Temperature vs Power Supplies vs Time POWER SUPPLIES Input Stage Voltage (rated performance) Voltage (derated performance) Supply Current ✻ 0.1 RL = 2kΩ, RF = 1MΩ ✻ ✻ 40 200 3 0.7 20 IIN = +10µA IIN = –10µA ±7 VO = 0 ±15 ±1.1 10 ✻ ✻ ✻ ✻ ✻ 35 1 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ±18 ±2 ±40 nA, p-p pA/√Hz pA/√Hz pA/√Hz ✻ ✻ ±18 +2, –1.1 +3, –2 +8, –1.1 +13, –2 ±15 70 2 ✻ ✻ 250 ±7 ✻ ✻ ✻ ✻ ✻ ✻ ✻ V V mA mA ✻ ✻ ✻ V V mA mA ✻ ✻ nA nA/°C nA/V pA/kHr ✻ Same as ISO100AP. NOTES: (1) See Typical Performance Curves for temperature effects. (2) See Theory of Operation section for definitions. For dB see Ex. 2, CM and HV errors. (3) Nonlinearity is the peak deviation from a “best fit” straight line expressed as a percent of full scale output. (4) Bipolar offset current includes effects of reference current mismatch and unipolar offset current. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. 3 ISO100 PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Supply Voltages ................................................................................. ±18V Isolation Voltage, AC pk or DC ......................................................... 750V Input Current ..................................................................................... ±1mA Storage Temperature Range ......................................... –40°C to +100°C Lead Temperature (soldering, 10s) ............................................... +300°C Output Short-Circuit Duration ................................ Continuous to Ground Bottom View ISO100 Input Common 18 1 NC(1) –In 17 2 +VCCA2 Ref1 16 3 VOUT +In 15 4 –VCCA2 5 Bal Bal 13 6 Bal –VCCA1 12 7 RF (1) 11 8 Ref2 +VCCA1 10 9 Output Common Bal 14 NC A1 A2 PACKAGE INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) ISO100AP ISO100BP ISO100CP 18-Pin Bottom-Braze DIP 18-Pin Bottom-Braze DIP 18-Pin Bottom-Braze DIP 220 220 220 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. ELECTROSTATIC DISCHARGE SENSITIVITY NOTE: (1) No internal connection. This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with USA OEM PRICES appropriate precautions. Failure to observe proper handling 1-24 25-99 100+ and installation procedures can cause damage. ORDERING INFORMATION PRODUCT PACKAGE TEMPERATURE RANGE ISO100AP ISO100BP ISO100CP 18-Pin Bottom-Braze DIP 18-Pin Bottom-Braze DIP 18-Pin Bottom-Braze DIP –25°C to +85°C –25°C to +85°C –25°C to +85°C ISO100 $53.18 $40.94 $32.21 ESD from subtle performance 57.94damage can range 45.02 36.22 degrada64.62 51.69 42.48 circuits tion to complete device failure. Precision integrated may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 4 TYPICAL PERFORMANCE CURVES At TA = +25°C, ±VCC = 15VDC, unless otherwise specified. SMALL SIGNAL FREQUENCY RESPONSE BIPOLAR OUTPUT SWING vs RF 20 ±20 ±18VCC 10 ±15 Output Swing (V) Amplitude (dB) No CF 0 –10 CF = 4pF –20 ±13VCC ±10VCC ±10 Output Stage Power Supply ±7VCC ±5 –30 VO = (12µA) (RF) = |VCC| – 1.2V max –40 0 1 10 100 1000 10k 100k 1M Frequency (kHz) 10M 100M RF (Ω) BIPOLAR INPUT STAGE SUPPLY CURRENT vs INPUT CURRENT PHASE SHIFT vs FREQUENCY 0 10 90 5 Phase (degrees) Supply Current (mA) No CF +VCC 0 –VCC 180 CF = 4pF 270 –5 –10 –20 –10 0 10 20 1 10 100 Frequency (kHz) UNIPOLAR OUTPUT SWING vs RF UNIPOLAR INPUT STAGE SUPPLY CURRENT vs INPUT CURRENT 0 10 VO = (12µA) (RF) = |VCC| – 1.2 V max Not specified for operation in this region. Output Swing (V) Supply Current (mA) ±7VCC –5 ±10VCC –10 –15 1000 IIN (µA) ±13VCC Output Stage Power Supply ±18VCC 5 +VCC 0 –VCC –5 Short circuit current limit. –30 –20 10k 100k 1M 10M 100M –20 RF (Ω) –10 0 IIN (µA) 5 ISO100 10 20 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, ±VCC = 15VDC, unless otherwise specified. CONTINUOUS DC ISOLATION VOLTAGE vs TEMPERATURE 15 2 10 Max at 60Hz 1 5 Typ at 60Hz 1250 Continuous DC Isolation Voltage (V) 3 DC Leakage Current (nA) AC Leakage Current (µArms) ISOLATION LEAKAGE CURRENT vs ISOLATION VOLTAGE Typ at DC 0 1000 0 0 1 Recommended Operating Region 500 65°C 250 85°C 0 3 2 750 –25 0 25 Isolation Voltage (kV) AC ISOLATION VOLTAGE vs TEMPERATURE Rate of Change of Gain Error (%/hr) AC Isolation Voltage (Vp) 100 125 RATE OF GAIN ERROR SHIFT vs ISOLATION VOLTAGE 1000 750 Recommended Operating Region 250 85°C Short term shift (10 hrs) 1 Temp = +85°C Long term shift is random. 0.5 Temp = up to +65°C 0 0 –25 0 25 50 100 0 125 GAIN ERROR vs TEMPERATURE AND ISOLATION VOLTAGE 3 2.5 VIM >VT 2 VIM < VT 1.5 1 0.5 0 –25 0 25 50 65 75 TT 100 125 Temperature (°C) NOTES: VT and TT approximate the threshold for the indicated gain shift. This is caused by the properties of the optical cavity. TT ≈ +65°C, VT ≈ 200VDC. Shift does not occur fo AC voltages. ISO100 250 500 750 Isolation Voltage (VDC) Temperature (°C) Gain Error (Normalized to +25°C) 75 1.5 1250 500 50 Temperature (°C) VIM = Isolation-Mode Voltage VT = Threshold Voltage TT = Threshold Temperature 6 1000 THEORY OF OPERATION the LED. As the LED light output increases, D1 responds by generating an increasing current. The current increases until the sum of the currents in and out of the input node (–Input to A1) is zero. At that point, the negative feedback through D1 has stabilized the loop, and the current ID1 equals the input current plus the bias current. As a result, no bias current flows in the source. Since D1 and D2 are matched (ID1 = ID2), IIN is replicated at the output via D2. Thus, A1 functions as a unity-gain current amplifier, and A2 is a current-to-voltage converter, as described below. The ISO100 is fundamentally a unity gain current amplifier intended to transfer small signals between electrical circuits separated by high voltages or different references. In most applications, an output voltage is obtained by passing the output current through the feedback resistor (RF). The ISO100 uses a single light emitting diode (LED) and a pair of photodiode detectors coupled together to isolate the output signal from the input. Current produced by D2 must either flow into A2 or RF. Since A2 is designed for low bias current (≈10nA), almost all of the current flows through RF to the output. The output voltage then becomes: Figure 1 shows a simplified diagram of the amplifier. IREF1 and IREF2 are required only for bipolar operation to generate a midscale reference. The LED and photodiodes (D1 and D2) are arranged such that the same amount of light falls on each photodiode. Thus, the currents generated by the diodes match very closely. As a result, the transfer function depends upon optical match rather than absolute performance. Laser-trimming of the components improves matching and enhances accuracy, while negative feedback improves linearity. Negative feedback around A1 occurs through the optical path formed by the LED and D1. The signal is transferred across the isolation barrier by the matched light path to D2. VO = (ID2)RF = (ID1 ±IOS)RF ≈ –(–IIN)RF = IINRF where, IOS is the difference between A1 and A2 bias currents. For input voltage operation IIN can be replaced by a voltage source (VIN) and series resistor (RIN), since the summing node of the op amp is essentially at ground. Thus, IIN = VIN/RIN. Unipolar operation does have some constraints, however. In this mode the input current must be negative so as to produce a positive output voltage from A1 to turn the LED on. A current more negative than 20nA is necessary to keep the LED turned on and the loop stabilized. When this condition is not met, the output may be indeterminant. Many sensors generate unidirectional signals, e.g., photoconductive and photodiode devices, as well as some applications of thermocouples. However, other applications do require bipolar operation of the ISO100. The overall isolation amplifier is noninverting (a positive going input produces a positive going output). INSTALLATION AND OPERATING INSTRUCTIONS UNIPOLAR OPERATION In Figure 1, assume a current, IIN, flows out of the ISO100 (IIN must be negative in unipolar operation). This causes the voltage at pin 15 to decrease. Because the amplifier is inverting, the output of A1 increases, driving current through BIPOLAR OPERATION To activate the bipolar mode, reference currents as shown in Figure 1 are attached to the input nodes of the op amps. The input stage stabilizes just as it did in unipolar operation. RF IREF1 Isolation Barrier 16 7 Input Circuit RIN IREF2 8 Output Circuit +In 15 A1 A2 3 VOUT + VIN IIN – Optical Assembly D1 –In 17 (1) D2 VOUT = IIN RF 9 LED 18 Input Common Output Common Connect pins 15 and 16 for bipolar, and pins 16 and 17 for unipolar. Connect pins 7 and 8 for bipolar, and pins 8 and 9 for unipolar. FIGURE 1. Simplified Block Diagram of the ISO100. 7 ISO100 Assuming IIN = 0, the photodiode has to supply all the IREF1 current. Again, due to symmetry, ID1 = ID2. Since the two references are matched, the current generated by D2 will equal IREF2. This results in no current flow in RF, and the output voltage will be zero. When IIN either adds or subtracts current from the input node, the current D1 will adjust to satisfy ID1 = IIN + IREF1. Because IREF1 equals IREF2 and ID1 equals ID2, a current equal to IIN will flow in RF. The output voltage is then VO = IINRF. The range of allowable IIN is limited. Positive IIN can be as large as IREF1 (10.5µA, min). At this point, D1 supplies no current and the loop opens. Negative IIN can be as large as that generated by D1 with maximum LED output (recommended 10µA, max). The output then becomes: VOUT = RF[( ±VOSO , UNIPOLAR ] UNIPOLAR) Given: IOS BIPOLAR RIN = 100kΩ RF = 1MΩ (gain = 10) VOSI = +200µV VOSO = +200µV ID1 and ID2—currents generated by each photodiode in response to the light from the LED. VOS total RTO = VOS total RTI x RF/RIN = –21.2mV x 10 = –212mV Ae—gain error. Ae = | Ideal gain/Actual gain | – 1 RF(1) VOSO ISO100 + Isolation Barrier – + A1 VIN – ID1 IOS A2 ID2 LED IREF1 IREF2 NOTE: (1) Use 1MΩ or greater to achieve a full scale output of 10V. FIGURE 2. Circuit Model for DC Errors in the ISO100. ISO100 (3) + VOSO/(RF/RIN) = +35nA VOS total RTI = {[±VOSI ±RIN (IOS BIPOLAR) – RIN (IREF 1)] [1 + Ae] + RIN IREF 2} ±VOSO/(RF/RIN) = {[+200µV + 100kΩ (35nA) – 100kΩ (12.5µA)] [1.02] + 100kΩ (12.5µA]} + 200µV/(1MΩ/100kΩ) = {[0.2mV + 3.5mV – 1.25V] [1.02] + 1.25V} + 0.02mV = –21.2mV I REF1 and I REF2 —reference currents that, when connected to the inputs, enable bipolar operation. The two currents are trimmed, in the bipolar mode, to minimize the IOS BIPOLAR error. – ±VOSO Find: The total offset voltage error referred to the input and output when VIN = 0V. IOS—the offset current. This is the current at the input necessary to make the output zero. It is equal to the combined effect of the difference between the bias currents of A1 and A2 and the matching errors in the optical components in the unipolar mode. + ± IOS Example 1. Refer to Figure 2 and Electrical Specifications Table. see equation (2). RIN RIN VOS (RTI) = (±VOSI) ±RIN (IOS (4) (1) VOSI – IREF1 ± IOS)(1 + Ae)+ IREF2] (2) This voltage is then referred back to the input by dividing by RF/RIN. VOSO and VOSI—the input offset voltages of the output and input stage, respectively. VOSO appears directly at the output, but, VOSI appears at the output as RIN ±VOSI VOUT ≈ RF [ A1 and A2— assumed to be ideal amplifiers. RF RIN The total input referred offset voltage of the ISO100 can be simplified in the unipolar case by assuming that Ae = 0 and VIN = 0: DC ERRORS Errors in the ISO100 take the form of offset currents and voltages plus their drifts with temperature. These are shown in Figure 2. VOSI VIN ± VOS 8 VOUT NOTE: This error is dominated by IOS BIPOLAR and the reference current times the gain error (which appears as an offset). The error for unipolar operation is much lower. The error due to offset current can be zeroed using circuits shown in Figures 6 and 7. The gain error is adjusted by trimming either RF or RIN. VERR is the equivalent error signal, applied in series with the input voltage, which produces an output error identical to that produced by application of VCM and VIM. CMRR and IMRR are the common-mode and isolationmode rejection ratios, respectively. Total Capacitance (C1 and C2) is distributed along the isolation barrier. Most of the capacitance is coupled to low impedance or noncritical nodes and affects only the leakage current. Only a small capacitance (C2) couples to the input of the second stage, and contributes to IMRR. COMMON-MODE AND HIGH VOLTAGE ERRORS Figure 3 shows a model of the ISO100 that can be used to analyze common-mode and high voltage behavior. Example 2. Refer to Figure 3 and Electrical Specification Table. Isolation Barrier Given: RF RIN – + C2 VIN – – + VOUT Find: The error voltage referred to the input and output when VIN = 0V VERR RTI= (VCM)(CMRR)(RIN) + (VIM)(IMRR)(RIN) = 1V (3nA/V)(100kΩ) + 200V (5pA/V)(100kΩ) = 0.3mV + 0.1mV = 0.4mV VERR CM + – + VERR IM – + C1 VCM + Input Common – Output Common VIM VCM = 1VAC peak at 60Hz, VIM = 200VDC, CMRR = 3nA/V, IMRR = 5pA/V, RIN = 100kΩ, RF = 1MΩ (Gain = 10) VERR = 0.4mV (10) =4mV (with DC IMRR) FIGURE 3. High Voltage Error Model. NOTE: This error is dominated by the CMRR term. Definitions of CMR and IMR IOS is defined as the input current required to make the ISO100’s output zero. CMRR and IMRR in the ISO100 are expressed as conductances. CMRR defines the relationship between a change in the applied common-mode voltage (VCM) and the change in IOS required to maintain the amplifier’s output at zero: CMRR (I-mode) = ∆IOS/∆VCM in nA/V CMRR (V-mode) = ∆IOS ∆VCM RIN = ∆VERR CM ∆VCM For purposes of comparing CMRR and IMRR directly with dB specifications, the following calculations can be performed: CMRR in V/V = CMRR (I-mode)(RIN) = 3nA/V (100kΩ) = 0.3mV/V CMR = 20 LOG (0.3mV/V) = –70dB at 60Hz IMRR in V/V = IMRR (I-mode)(RIN) = 5pA/V(100kΩ) = 0.5µV/V IMR = 20 LOG (0.5 x 10–6V/V) = –126dB at DC (5) in V/V (6) IMRR defines the relationship between a change in the applied isolation mode voltage (VIM) and the change in IOS required to maintain the amplifier’s output to zero: IMRR (I-mode) = IMRR (V-mode) = ∆IOS ∆VIM in pA/V ∆IOS ∆VIM RIN = = VERR RTI (RF/RIN) RTO Example 3. In Example 3, VIM is an AC signal at 60Hz and (7) ∆VERR IM ∆VIM IMRR = 400pA V VERR RTI = VERR CM + VERR IM = 0.3mV + 200V (400pA/V)(100kΩ) = 8.3mV VERR RTO = 83mV (with AC IMRR) in V/V (8) CMRR and IMRR in V/V are a function of RIN. VIM is the voltage between input common and output common. VCM is the common-mode voltage (noise that is present on both input lines, typically 60Hz). 9 ISO100 OPTIONAL ADJUSTMENTS There are two major sources of offset error: offset voltage and offset current. VOSI and VOSO of the input and output amplifiers can be adjusted independently using external potentiometers. An example is shown in Figure 17. Note that VOSO (500µV, max) appears directly at the output, but VOSI appears at the output multiplied by gain (RF/RIN). In general, VOS is small compared to the effect of IOS (see Example 1). To adjust for IOS use a circuit which intentionally unbalances the offset in one direction and then allows for adjustment back to zero. Example 4. Given: Total error RTO from Examples 1 and 3 as 378mV worst case. Find: Percent error of +10V full scale output VERR TOTAL % Error = = x 100% VFS 378mV x 100% 10V = 3.78% Figure 6 shows how to adjust unipolar errors at zero input. The unipolar amplifier can be used down to zero input if it is made to be “slightly bipolar.” By sampling the reference current with R5 and R6, the minimum current required to keep the input stage in the linear region of operation can be established. R7 and R8 are adjusted to cancel the offset created in the input stage. This brings the output to zero, when the input is zero. Although the amplifier can now operate down to zero input voltage, it has only a small portion of the current drain and noise that the true bipolar configuration would have. NOISE ERRORS Noise errors in the unipolar mode are due primarily to the optical cavity. When the full 60kHz bandwidth is not needed, the output noise of the ISO100 can be limited by either a capacitor, CF, in the feedback loop or by a low-pass filter following the output. This is shown in Figure 4. Noise in the bipolar mode is due primarily to the reference current sources, and can be reduced by the low-pass filters shown in Figure 5. Adjusting the bipolar errors is illustrated in Figure 7. Each of the errors are adjusted in turn. With VIN = “open,”, IOS is trimmed by adjusting R10 to make the output zero. RG is then adjusted to trim the gain error. The effects of offset voltage are removed by adjusting R14. CF 15 RF fO = 1 2πRFCF 7 R 3 ISO100 IIN Optional Unipolar IOS Adjust. 9 1 fO = 2πRC 17 RF 1MΩ R6 84kΩ C 18 R5 10MΩ IIN R7 10MΩ IREF 1 IC1 IC2 +In FIGURE 4. Two Circuit Techniques for Reducing Noise in the Unipolar Mode. R8 200kΩ Pot IREF 2 λ ISO100 VOUT 1MΩ RF 100kΩ –In 18 1µF VOUT 100kΩ 15 16 1µF 7 IC2 (MIN) 8 3 ISO100 IIN IC2 (MAX) IIN VOUT ea l 9 Id 17 Shift due to R7 and R8. 18 Shift due to R5 and R6. FIGURE 6. Adjusting the Unipolar Amplifier Errors at Zero Input. FIGURE 5. Circuit Techniques for Reducing Noise from the Current Sources in the Bipolar Mode. ISO100 10 R10 1MΩ Optional Bipolar IOS Adjust. R11 10MΩ R1 RF 1MΩ RIN VIN 15 9.76kΩ RG 500Ω Pot R12 316kΩ IC 15 + RF 16 7 R13 10MΩ 8 3 ISO100 +In 9 λ 7 8 – RSOURCE 3 ISO100 9 + VOUT + – 17 VOUT = –VIN (RF /R1) 18 VIN(1) –In 17 14 13 +V NOTE: (1) Use postitive input voltage only, VIN >> 10µA x RSOURCE. 18 R14 100kΩ FIGURE 10. Unipolar Inverting. FIGURE 7. Adjusting the Bipolar Errors. R1 BASIC CIRCUIT CONNECTIONS 15 + RF 16 7 8 3 ISO100 9 RSOURCE + VOUT = –VIN (RF /R1) – 17 18 VIN(1) NOTE: (1) VIN >> 10µA x RSOURCE. FIGURE 11. Bipolar Inverting. APPLICATION INFORMATION FIGURE 8. Unipolar Noninverting. Shield RIN 15 + RF 16 7 + Major points to consider when designing circuits with the ISO100. 8 1. Input Common (pin 18) and –In (pin 17) should be grounded through separate lines. The Input Common can carry a large DC current and may cause feedback to the signal input. 3 ISO100 VIN The small size, low offset and drift, wide bandwidth, ultralow leakage, and low cost, make the ISO100 ideal for a variety of isolation applications. The basic mode of operation of the ISO100 will be determined by the type of signal and application. 9 IIN VOUT = IINRF or VOUT = VIN (RF /RIN) – 17 2. Use shielded or twisted pair cable at the input for long lines. 18 3. Care should be taken to minimize external capacitance across the isolation barrier. FIGURE 9. Bipolar Noninverting. 11 ISO100 4. The distance across the isolation barrier, between external components and conductor patterns, should be maximized to reduce leakage and arcing. CF may be used to improve frequency response (reduce peaking). fO = 1/2π RFCF Isolation Barrier 5. Although not an absolute requirement, the use of conformally-coated printed circuit boards is recommended. CF 0.02µA to 10µA 6. When in the unipolar mode, the reference currents (pins 8 and 16) must be terminated. IIN should be greater than 20nA to keep internal LED on. 16 RF 1MΩ 15 + 7 Photodiode 7. The noise contribution of the reference currents will cause the bipolar mode to be noisier than the unipolar mode. 8. The maximum output voltage swing is determined by IIN and RF. VSWING = IIN MAX X RF 3 2 9 VO = IINRF 4 C2 0.001µF – 17 9. A capacitor (about 3pF) can be connected across RF to compensate for peaking in the frequency response. The peaking is caused by the pole generated by RF and the capacitance at the input of the output amplifier. 8 ISO100 10 0 to –10V 12 18 C3 0.001µF R2 15kΩ R3 15kΩ Figure 12 through 18 show applications of the ISO100. +V C –V C –V +V p+ R1 1.2kΩ +15V 722 V+ E V– Isolated Power Supply C1 0.47µF R3 and R2 are required to maintain a 3mA minimum load to the 722. FIGURE 12. Two-Port Isolation Photodiode Amplifier Unipolar. R2 50kΩ Bridge Excitation VREF = +1V 6 Sensor Tranducer R – CF 2 IREF 1 OPA177 3 + RF 1MΩ 15 + + 1 R (2) 16 R 10 R R3 50kΩ ∆VIN (3) RG 404Ω INA101 X 100 4 5 – 8 R1 100kΩ 7 7 9 6 9 – 8 ISO100 X 10 + 4 VOUT 2 – 17 10 +15V –15V 12 18 Total Gain = 1000 Input Common Output Common (1) +15V –15V NOTES: (1) For isolated supplies see Figure 12. (2) In this example, the internal precision current reference, IREF, provides bridge excitation. (3) Pin 8 of the INA101 must be more negative than –2mV for linear operation of the ISO100 with R1 = 100kΩ. FIGURE 13. Precision Bridge Isolation Amplifier (Unipolar). ISO100 12 CF may be used to improve frequency response (reduce peaking). fO = 1/2π RFCF Isolation Barrier Offsetting CF R4 1kΩ R4 100kΩ RF 1MΩ 16 –15V 15 + 7 Thermocouple V = 10mV (±Temp) 8 R2 1kΩ 3 2 9 VO = IINRF 4 C2 0.001µF 17 10 R1 100kΩ + (±10V) RF 1MΩ 16 15 + 7 VIN C3 0.001µF VOUT – 17 18 15kΩ –V C –V +V p+ R1 1.2kΩ +15V 722 Cold junction compensation not shown. 3 9 R2 15kΩ R3 +V C 8 ISO100 12 18 CF R3 2MΩ Gain Adjust ISO100 – +15V V+ E V– Isolated Power Supply Gain = +10 to +1000 C1 0.47µF Approximate input offsetting = 0 to ±7.5µA for isolated supplies—see Figures 10 and 11. R3 and R2 are required to maintain a 3mA minimum load to the 722. FIGURE 14. Three-Port Isolation Thermocouple Amplifier (Bipolar). R1 1MΩ R2 500kΩ Input –5V to 0V Offset Adjust 16 +VISOLATED 15 RIN 500Ω FIGURE 15. Isolated Test Equipment Amplifier (Unipolar with Offsetting). + 7 Span Adjust 2 ISO100 9 + 4 – 17 18 IOUT 4-20mA 8 – 3 RL Siliconix VN88AF R4 335kΩ –VISOLATED For isolated supplies see Figures 10 and 11. R3 200Ω Calibration procedure: 1. Set VIN = 0V 2. Adjust R2 for IOUT = 20mA 3. Set VIN = –5V 4. Adjust RIN for IOUT = 4mA FIGURE 16. Isolated 4mA to 20mA Transmitter (Example of an isolated voltage controlled current source). 13 ISO100 +VCC RF 1MΩ Offset Adjust 1MΩ RIN 10kΩ VIN 1 +15V 13 Offset Adjust 14 15 + 7 9 5 1MΩ – 6 3 4 + VOUT 2 – Com 1 17 +15V –15V (Non ISO) +VCC 100kΩ VIN 2 –VCC VO = 1M [ 15 + 7 9 VIN 2 VIN 1 + + IIN 1 +IIN 2] 10k 100k – (1) + – Com 2 17 +VCC –VCC 15 + IIN 1 7 9 – (1) + – Com 3 17 +VCC ±VCCs to input stages of amplifiers –VCC 1 15 + IIN 2 7 9 2 3 – (1) + 724 Isolated Power Supply – Com 4 17 +VCC –VCC +15V (Non ISO) NOTE: (1) No additional connections to output amplifiers Note that a variety of input/gain configurations can be used. FIGURE 17. Four-Port Isolated Summing Amplifier (Unipolar). ISO100 14 4 Channel Select OPTO Isolator Gain Select CP CE IN7 CF IN6 IN5 Input Channels 16 IN4 IN3 1MΩ PGA100 Analog P/S IN2 IN1 IN0 15 + RF 1MΩ 7 Digital P/S 8 3 ISO100 4 9 2 – 17 VOUT 12 18 10 +5V +15V Input Common(1) –15V Output Common(1) +15V –15V NOTE: (1) For isolated power supplies see Figures 10 and 11. FIGURE 18. Multiple Channel Isolation Amplifier (Bipolar) with Programmable Gain (useful in data acquisition systems). 15 ISO100 PACKAGE OPTION ADDENDUM www.ti.com 3-Oct-2003 PACKAGING INFORMATION ORDERABLE DEVICE STATUS(1) PACKAGE TYPE PACKAGE DRAWING PINS PACKAGE QTY ISO100AP NRND CDIP BB JDG 18 20 ISO100BP NRND CDIP BB JDG 18 20 ISO100CP NRND CDIP BB JDG 18 20 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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