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ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
用于数字输入模块的 ISO121x 隔离式 24V 至 60V 数字输入接收器
1 特性
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3 说明
符合 IEC 61131-2 针对 24V 隔离式数字输入的 1、
2、3 类特性标准
支持 9V 至 300V 直流和交流数字输入设计（使用
外部电阻器）
通过精确电流限制实现低功耗：
– 对于 3 类，电流为 2.2mA 至 2.47mA
– 可调电流，最高为 6.5mA
消除了对现场侧电源的需求
具有反极性保护功能的宽输入电压范围：±60V
断线检测（请参阅 TIDA-01509）
可配置为拉电流或灌电流输入
高数据速率：最高 4Mbps
多路复用器输出信号使能引脚
高瞬态抗扰性：±70kV/µs CMTI
宽电源电压范围 (VCC1)：2.25V 至 5.5V
环境温度范围：–40°C 至 +125°C
紧凑型封装选项：
– 单通道 ISO1211，SOIC-8
– 双通道 ISO1212，SSOP-16
安全相关认证：
– 符合 DIN V VDE V 0884-10 标准的基本绝缘
– UL 1577 认证，2500VRMS 绝缘
– 可提供 CSA、CQC、TUV 认证
2 应用
•
•
•
•
•
•
可编程逻辑控制器 (PLC)
– 数字输入模块
– 混合 I/O 模块
电机驱动 I/O 和位置反馈
CNC 控制
变电站自动化
数据采集
二进制输入模块
ISO1211 和 ISO1212 器件是隔离式 24V 至 60V 数字
输入接收器，符合 IEC 61131-2 1 类、2 类和 3 类特
性标准。这些器件可以在可编程逻辑控制器 (PLC)、电
机控制、电网基础设施和其他工业应用中实现 9V 至
300V 直流和交流数字输入 模块。不同于具有分立式、
不精确电流限制电路的传统光耦合器解决方
案，ISO121x 器件提供具有精确电流限制的简单低功
耗解决方案，可实现紧凑型和高密度 I/O 模块的设计。
这些器件不需要现场侧电源，可配置为拉电流或灌电流
输入。
ISO121x 器件的工作电压范围为 2.25V 至 5.5V，支持
2.5V、3.3V 和 5V 控制器。具有反极性保护的 ±60V
输入容差有助于确保输入引脚在可忽略的反向电流发生
故障时受到保护。这些器件支持高达 4Mbps 的数据速
率，可通过 150ns 的最小脉冲宽度，从而实现高速运
行。ISO1211 器件适用于需要通道间隔离功能的设
计，而 ISO1212 器件适用于多通道空间受限的设计。
与传统解决方案相比，ISO121x 器件减少了组件数
量，简化了系统设计，提高了性能，降低了电路板温
度。有关详细信息，请参阅《如何简化隔离式 24V
PLC 数字输入模块设计》TI 技术手册、《如何提高电
机驱动中的隔离式数字输入的速度和可靠性》TI 技术
手册以及《如何设计用于 ±48V、110V 和 240V 直流
和交流检测的隔离式比较器》TI 技术手册。
器件信息(1)
器件型号
封装
封装尺寸（标称值）
ISO1211
SOIC (8)
4.90mm × 3.91mm
ISO1212
SSOP (16)
4.90mm × 3.90mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
ISO121x 器件与传统解决方案相比可降低电路板温度
应用图表
Field
TA = 25°C
TA = 25°C
PLC Digital Input Module
ISO1211
RTHR
24 V
Sensor/
Switch
RSENSE
SENSE
VCC1
IN
OUT
FGND
Host
Controller
GND1
a) 8-Ch With ISO1212
b) 8-Ch Traditional Solution Without Current Limit
Copyright © 2017, Texas Instruments Incorporated
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLLSEY7
ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
目录
1
2
3
4
5
6
特性 ..........................................................................
应用 ..........................................................................
说明 ..........................................................................
修订历史记录 ...........................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
1
1
1
2
3
5
Absolute Maximum Ratings ...................................... 5
ESD Ratings ............................................................ 5
Recommended Operating Conditions....................... 5
Thermal Information .................................................. 6
Power Ratings........................................................... 6
Insulation Specifications............................................ 7
Safety-Related Certifications..................................... 8
Safety Limiting Values .............................................. 9
Electrical Characteristics—DC Specification........... 10
Switching Characteristics—AC Specification ........ 11
Insulation Characteristics Curves ......................... 12
Typical Characteristics .......................................... 13
7
Parameter Measurement Information ................ 14
8
Detailed Description ............................................ 17
7.1 Test Circuits ............................................................ 14
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
17
17
17
18
Application and Implementation ........................ 19
9.1 Application Information............................................ 19
9.2 Typical Application .................................................. 19
10 Power Supply Recommendations ..................... 30
11 Layout................................................................... 31
11.1 Layout Guidelines ................................................. 31
11.2 Layout Example .................................................... 31
12 器件和文档支持 ..................................................... 33
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
器件支持................................................................
文档支持................................................................
相关链接................................................................
接收文档更新通知 .................................................
社区资源................................................................
商标 .......................................................................
静电放电警告.........................................................
术语表 ...................................................................
33
33
33
33
33
33
33
34
13 机械、封装和可订购信息 ....................................... 34
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision D (March 2018) to Revision E
•
Page
已更改 VIH and VIH to VIL and VIH in the RTHR resistor description in the Setting Current Limit and Voltage Thresholds
section .................................................................................................................................................................................. 21
Changes from Revision C (February 2018) to Revision D
Page
•
更新了特性 和应用 部分。在说明 和相关文档 部分中添加了新的 TI 技术手册参考。............................................................ 1
•
Changed the unit for CPG from µm to mm in the Insulation Specifications table .................................................................. 7
•
已更改 the Functional Block Diagram................................................................................................................................... 17
•
已更改 VIL from min to typ in the VIL equation ...................................................................................................................... 22
•
已添加 the Designing for Input Voltages Greater Than 60 V section................................................................................... 24
•
已添加 the bidirectional implementation example to the Sourcing and Sinking Inputs section............................................ 30
Changes from Revision B (September 2017) to Revision C
Page
•
已添加 将断线检测添加到特性 部分........................................................................................................................................ 1
•
已添加 将多路复用器输出信号使能引脚添加到了特性 部分中，更改了所有需要为 DW 和 D 封装完成的认证 ...................... 1
•
已更改 RTHR = 5 kΩ to 4 kΩ in the High-Level Voltage Transition Threshold vs Ambient Temperature graph.................... 13
•
已更改 the Type 1 RTH value from 3 kΩ to 2.5 kΩ in the Surge, IEC ESD and EFT table................................................... 25
Changes from Revision A (September 2017) to Revision B
Page
•
已更改 将状态从预告信息改为生产数据.................................................................................................................................. 1
2
Copyright © 2017–2018, Texas Instruments Incorporated
ISO1211, ISO1212
www.ti.com.cn
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
5 Pin Configuration and Functions
ISO1211 D Package
8-Pin SOIC
Top View
8 SENSE
EN
2
7
IN
OUT
3
6
FGND
GND1
4
5
SUB
ILIM
1
Basic Isolation
VCC1
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
VCC1
—
Power supply, side 1
2
EN
I
Output enable. The output pin on side 1 is enabled when the EN pin is high or open. The output pin on
side 1 is in the high-impedance state when the EN pin is low. In noisy applications, tie the EN pin to
VCC1.
3
OUT
O
Channel output
4
GND1
—
Ground connection for VCC1
5
SUB
—
Internal connection to input chip substrate. Leave this pin unconnected on the board.
6
FGND
—
Field-side ground
7
IN
I
Field-side current input
8
SENSE
I
Field-side voltage sense
Copyright © 2017–2018, Texas Instruments Incorporated
3
ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
ISO1212 DBQ Package
16-Pin SSOP
Top View
1
16 SENSE1
VCC1
2
15
IN1
EN
3
14
FGND1
OUT1
4
13
SUB1
Basic Isolation
ILIM
GND1
Functional Isolation
12
SUB2
5
NC
6
11 SENSE2
NC
7
10
IN2
GND1
8
9
FGND2
ILIM
OUT2
Pin Functions
PIN
I/O
Description
NO.
NAME
1
GND1
—
Ground connection for VCC1
2
VCC1
—
Power supply, side 1
3
EN
I
Output enable. The output pins on side 1 are enabled when the EN pin is high or open. The output
pins on side 1 are in the high-impedance state when the EN pin is low. In noisy applications, tie the EN
pin to VCC1.
4
OUT1
O
Channel 1 output
5
OUT2
O
Channel 2 output
NC
—
Not connected
8
GND1
—
Ground connection for VCC1
9
FGND2
—
Field-side ground, channel 2
10
IN2
I
Field-side current input, channel 2
11
SENSE2
I
Field-side voltage sense, channel 2
12
SUB2
—
Internal connection to input chip 2 substrate. Leave this pin unconnected on the board.
13
SUB1
—
Internal connection to input chip 1 substrate. Leave this pin unconnected on the board.
14
FGND1
—
Field-side ground, channel 1
15
IN1
I
Field-side current input, channel 1
16
SENSE1
I
Field-side voltage sense, channel 1
6
7
4
Copyright © 2017–2018, Texas Instruments Incorporated
ISO1211, ISO1212
www.ti.com.cn
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VCC1
Supply voltage, control side
–0.5
6
V
VOUTx,
VEN
Voltage on OUTx pins and EN pin
–0.5
VCC1 + 0.5 (2)
V
IO
Output current on OUTx pins
–15
15
mA
VINx, VSENSEx Voltage on IN and SENSE pins
–60
60
V
V(ISO,FUNC)
Functional isolation between channels in ISO1212 on the field side
–60
60
V
TJ
Junction temperature
–40
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Maximum voltage must not exceed 6 V.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
VCC1
Supply voltage input side
VINx,
VSENSEx
Voltage on INx and SENSEx pins
IOH
High-level output current from OUTx pin
IOL
(1)
Low-level output current into OUTx pin
MIN
MAX
2.25
5.5
V
–60
60
V
VCC1 = 5 V
–4
VCC1 = 3.3 V
–3
VCC1 = 2.5 V
–2
4
VCC1 = 3.3 V
3
VCC1 = 2.5 V
2
Minimum pulse width at SENSEx pins
150
TA
Ambient temperature
–40
(1)
mA
VCC1 = 5 V
tUI
UNIT
mA
ns
125
°C
See the Thermal Considerations section.
Copyright © 2017–2018, Texas Instruments Incorporated
5
ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
6.4 Thermal Information
THERMAL METRIC (1)
ISO1211
ISO1212
D (SOIC)
DBQ (SSOP)
8 PINS
16 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
146.1
116.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
63.1
56.5
°C/W
RθJB
Junction-to-board thermal resistance
80
64.7
°C/W
ΨJT
Junction-to-top characterization parameter
9.6
27.9
°C/W
ΨJB
Junction-to-board characterization parameter
79
64.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Power Ratings
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
450
mW
20
mW
VSENSE = 60 V, VCC1 = 5.5 V, RSENSE = 200 Ω,
RTHR = 0 Ω, TJ = 150°C
430
mW
VSENSEx = 60 V, VCC1 = 5.5 V, RSENSE = 200 Ω,
RTHR = 0 Ω, TJ = 150°C
900
mW
40
mW
860
mW
ISO1211
VSENSE = 60 V, VCC1 = 5.5 V, RSENSE = 200 Ω,
RTHR = 0 Ω, TJ = 150°C
PD
Maximum power dissipation, both sides
PD1
Maximum power dissipation, output side VCC1 = 5.5 V, CL = 15 pF, Input 2-MHz 50% duty(side 1)
cycle square wave at SENSE pin, TJ = 150°C
PD2
Maximum power dissipation, field input
side
ISO1212
PD
Maximum power dissipation, both sides
PD1
Maximum power dissipation, output side VCC1 = 5.5 V, CL = 15 pF, Input 2-MHz 50% duty(side 1)
cycle square wave at SENSEx pins, TJ = 150°C
PD2
Maximum power dissipation, field input
side
6
VSENSEx = 60 V, VCC1 = 5.5 V, RSENSE = 200 Ω,
RTHR = 0 Ω, TJ = 150°C
Copyright © 2017–2018, Texas Instruments Incorporated
ISO1211, ISO1212
www.ti.com.cn
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
6.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
SPECIFICATION
D-8
DBQ-16
UNIT
External clearance (1)
Shortest terminal-to-terminal distance through air
4
3.7
mm
CPG
External Creepage (1)
Shortest terminal-to-terminal distance across the
package surface
4
3.7
mm
DTI
Distance through the insulation
Minimum internal gap (internal clearance)
10.5
10.5
µm
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112
> 600
> 600
V
Material Group
According to IEC 60664-1
CLR
Overvoltage category
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM
Maximum repetitive peak isolation
voltage
VIOWM
Maximum working isolation voltage
I
I
Rated mains voltage ≤ 150 VRMS
I-IV
I-IV
Rated mains voltage ≤ 300 VRMS
I-III
I-III
AC voltage (bipolar)
566
566
VPK
AC voltage (sine wave); time-dependent dielectric
breakdown (TDDB) test
400
400
VRMS
DC voltage
566
566
VDC
3600
3600
VPK
4000
4000
VPK
Method a: After I/O safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 × VIORM = 680 VPK, tm = 10 s
109
Pollution degree
2
2
Climatic category
40/125/21
40/125/21
2500
2500
Ω
UL 1577
VISO
(1)
(2)
(3)
(4)
(5)
Withstand isolation voltage
VTEST = VISO = 2500 VRMS, t = 60 s (qualification);
VTEST = 1.2 × VISO = 3000 VRMS, t = 1 s (100%
production)
VRMS
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care
should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on
the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases.
Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
This coupler is suitable for basic electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall
be ensured by means of suitable protective circuits.
Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
Apparent charge is electrical discharge caused by a partial discharge (pd).
All pins on each side of the barrier tied together creating a two-terminal device
Copyright © 2017–2018, Texas Instruments Incorporated
7
ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
6.7 Safety-Related Certifications
VDE
CSA
Certified according to
DIN V VDE V 0884-10
(VDE V 0884-10):200612 and DIN EN 61010-1
(VDE 0411-1):2011-07
Certified according to IEC
60950-1 and IEC 62368-1
Basic Insulation,
Maximum Transient
Isolation Voltage, 3600
VPK,
Maximum Repetitive
Peak Isolation Voltage,
566 VPK,
Maximum Surge
Isolation Voltage, 4000
VPK
Certificate number:
40016131
8
UL
CQC
TUV
Certified according to
GB4943.1-2011
Certified according to EN
61010-1:2010 (3rd Ed) and
EN 609501:2006/A11:2009/A1:2010/
A12:2011/A2:2013
370 VRMS (ISO1212) and
400 VRMS (ISO1211) Basic
Insulation working voltage
per CSA 60950-1-07+A1 +
A2 and IEC 60950-1 2nd
Single protection, 2500
Ed. + A1 + A2
VRMS
300 VRMS Basic Insulation
working voltage per CSA
62368-1-14 and IEC 623681 2nd Ed.
Basic Insulation, Altitude ≤
5000m, Tropical Climate,
400 VRMS maximum
working voltage
Basic insulation per EN
61010-1:2010 (3rd Ed) up
to working voltage of 300
VRMS,
Basic insulation per EN
609501:2006/A11:2009/A1:2010/
A12:2011/A2:2013 up to
working voltage of 370
VRMS (ISO1212) and 400
VRMS (ISO1211)
Master contract number:
220991
ISO1211 Certificate
number:
CQC15001121656,
ISO1212 Certification
Planned
Client ID number: 77311
Recognized under UL
1577 Component
Recognition Program
File number: E181974
Copyright © 2017–2018, Texas Instruments Incorporated
ISO1211, ISO1212
www.ti.com.cn
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
6.8 Safety Limiting Values
Safety limiting (1) intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. A failure
of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat
the die and damage the isolation barrier, potentially leading to secondary system failures.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ISO1211
Safety input, output, or supply
current - side 1
IS
IS
Safety input current - field side
PS
Safety input, output, or total
power
TS
Maximum safety temperature
RθJA = 146.1°C/W, VI = 2.75 V, TJ = 150°C,
TA = 25°C, see 图 1
310
RθJA = 146.1°C/W, VI = 3.6 V, TJ = 150°C,
TA = 25°C, see 图 1
237
RθJA = 146.1°C/W, VI = 5.5 V, TJ = 150°C,
TA = 25°C, see 图 1
155
RθJA = 146.1°C/W, VI = 24 V, TJ = 150°C,
TA = 25°C, see 图 1
35
RθJA = 146.1°C/W, VI = 36 V, TJ = 150°C,
TA = 25°C, see 图 1
23
RθJA = 146.1°C/W, VI = 60 V, TJ = 150°C,
TA = 25°C, see 图 1
14
RθJA = 146.1°C/W, TJ = 150°C, TA = 25°C,
see 图 2
855
mW
150
°C
mA
mA
ISO1212
IS
IS
Safety input, output, or supply
current - side 1
Safety input current - field side
PS
Safety input, output, or total
power
TS
Maximum safety temperature
(1)
RθJA = 116.9°C/W, VI = 2.75 V, TJ = 150°C,
TA = 25°C, see 图 3
389
RθJA= 116.9°C/W, VI = 3.6 V, TJ = 150°C,
TA = 25°C, see 图 3
297
RθJA = 116.9°C/W, VI = 5.5 V, TJ = 150°C,
TA = 25°C, see 图 3
194
RθJA = 116.9°C/W, VI = 24 V, TJ = 150°C,
TA = 25°C, see 图 3
44
RθJA= 116.9°C/W, VI = 36 V, TJ = 150°C,
TA = 25°C, see 图 3
29
RθJA = 116.9°C/W, VI = 60 V, TJ = 150°C,
TA = 25°C, see 图 3
17
RθJA = 116.9°C/W, TJ = 150°C, TA = 25°C,
see 图 4
mA
mA
1070
mW
150
°C
The safety-limiting constraint is the maximum junction temperature specified in the data sheet. The power dissipation and junction-to-air
thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air
thermal resistance in the Thermal Information table is that of a device installed on a high-K test board for leaded surface-mount
packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient
temperature plus the power times the junction-to-air thermal resistance.
Copyright © 2017–2018, Texas Instruments Incorporated
9
ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
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6.9 Electrical Characteristics—DC Specification
(Over recommended operating conditions unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VCC1 VOLTAGE SUPPLY
VIT+ (UVLO1)
Positive-going UVLO threshold voltage
(VCC1)
VIT– (UVLO1)
Negative-going UVLO threshold (VCC1)
2.25
1.7
VHYS (UVLO1) UVLO threshold hysteresis (VCC1)
VCC1 supply
quiescent current
ICC1
ISO1211
ISO1212
V
0.2
EN = VCC1
V
V
0.6
1
1.2
1.9
mA
LOGIC I/O
VIT+ (EN)
Positive-going input logic threshold
voltage for EN pin
0.7 ×
VCC1
VIT– (EN)
Negative-going input logic threshold
voltage for EN pin
VHYS(EN)
Input hysteresis voltage for EN pin
IIH
Low-level input leakage at EN pin
EN = GND1
VOH
High-level output voltage on OUTx
VCC1 = 4.5 V; IOH = –4 mA
VCC1 = 3 V; IOH = –3 mA
VCC1= 2.25 V; IOH = –2 mA, see 图 10
VOL
Low-level output voltage on OUTx
VCC1 = 4.5 V; IOH = 4 mA
VCC1 = 3 V; IOH = 3 mA
VCC1= 2.25 V ; IOH = 2 mA, see 图 10
0.3 ×
VCC1
V
V
0.1 ×
VCC1
V
–10
μA
VCC1
– 0.4
V
0.4
V
2.47
mA
CURRENT LIMIT
I(INx+SENSEx), Typical sum of current drawn from IN
and SENSE pins across temperature
TYP
RTHR = 0 Ω, RSENSE = 562 Ω, VSENSE = 24 V,
–40°C < TA < 125°C, see 图 11
2.2
RTHR = 0 Ω, RSENSE = 562 Ω ± 1%;
–60 V < VSENSE < 0 V, see 图 11
I(INx+SENSEx)
Sum of current drawn from IN and
SENSE pins
–0.1
RTHR = 0 Ω, RSENSE = 562 Ω ± 1%;
5 V < VSENSE < VIL, see 图 11
1.9
2.5
RTHR = 0 Ω, RSENSE = 562 Ω ± 1%;
VIL < VSENSE < 30 V, see 图 11
2.05
2.75
RTHR = 0 Ω, RSENSE = 562 Ω ± 1%;
30 V < VSENSE < 36 V, see 图 11
2.1
2.83
RTHR = 0 Ω, RSENSE = 562 Ω ± 1%;
36 V < VSENSE < 60 V (1), see 图 11
2.1
3.1
mA
RTHR = 0 Ω, RSENSE = 200 Ω ± 1%;
–60 V < VSENSE < 0 V, see 图 11
(1)
10
µA
–0.1
µA
RTHR = 0 Ω, RSENSE = 200 Ω ± 1%;
5 V < VSENSE < VIL, see 图 11
5.3
6.8
RTHR = 0 Ω, RSENSE = 200 Ω ± 1%;
VIL < VSENSE < 36 V (1), see 图 11
5.5
7
RTHR = 0 Ω, RSENSE = 200 Ω ± 1%;
36 V < VSENSE < 60 V (1), see 图 11
5.5
7.3
mA
See the Thermal Considerations section.
Copyright © 2017–2018, Texas Instruments Incorporated
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Electrical Characteristics—DC Specification (continued)
(Over recommended operating conditions unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VOLTAGE TRANSITION THRESHOLD ON FIELD SIDE
VIL
VIH
VHYS
Low level threshold voltage at module
input (including RTHR) for output high
High level threshold voltage at module
input (including RTHR) for output low
Threshold voltage hysteresis at module
input
RSENSE = 562 Ω, RTHR = 0 Ω, see 图 11
6.5
7
RSENSE = 562 Ω, RTHR = 1 kΩ, see 图 11
8.7
9.2
RSENSE = 562 Ω, RTHR = 4 kΩ, see 图 11
15.2
15.8
V
RSENSE = 562 Ω, RTHR = 0 Ω, see 图 11
8.2
8.55
RSENSE = 562 Ω, RTHR = 1 kΩ, see 图 11
10.4
10.95
RSENSE = 562 Ω, RTHR = 4 kΩ, see 图 11
17
18.25
RSENSE = 562 Ω, RTHR = 0 Ω, see 图 11
1
1.2
RSENSE = 562 Ω, RTHR = 1 kΩ, see 图 11
1
1.2
RSENSE = 562 Ω, RTHR = 4 kΩ, see 图 11
1
1.2
V
V
6.10 Switching Characteristics—AC Specification
(Over recommended operating conditions unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tr, tf
Output signal rise and fall time,
OUTx pins
Input rise and fall times = 10 ns, see 图 10
3
tPLH
Propagation delay time for low to
high transition
Input rise and fall times = 10 ns, see 图 10
110
140
ns
tPHL
Propagation delay time for high
to low transition
Input rise and fall times = 10 ns, see 图 10
10
15
ns
tsk(p)
Pulse skew |tPHL - tPLH|
Input rise and fall times = 10 ns, see 图 10
102
130
ns
tUI
Minimum pulse width
Input rise and fall times = 125 ns, see 图 10
tPHZ
Disable propagation delay, highto-high impedance output
See 图 13
17
40
ns
tPLZ
Disable propagation delay, lowto-high impedance output
See 图 12
17
40
ns
tPZH
Enable propagation delay, high
impedance-to-high output
See 图 13
3
8.5
µs
tPZL
Enable propagation delay, high
impedance-to-low output
See 图 12
17
40
ns
CMTI
Common mode transient
immunity
See 图 14
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ns
150
25
ns
70
kV/µs
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6.11 Insulation Characteristics Curves
900
350
VCC1 = 2.75 V
VCC1 = 3.6 V
VCC1 = 5.5 V
VINx = 24 V
VINx = 36 V
VINx = 60 V
250
800
Safety Limiting Power (mW)
Safety Limiting Current (mA)
300
200
150
100
50
600
500
400
300
200
100
0
0
0
50
100
150
Ambient Temperature (qC)
0
200
50
D001
100
150
Ambient Temperature (qC)
200
D002
图 2. Thermal Derating Curve for Safety Limiting Power per
VDE for D-8 Package
图 1. Thermal Derating Curve for Safety Limiting Current per
VDE for D-8 Package
450
1200
350
300
Safety Limiting Power (mW)
VCC1 = 2.75 V
VCC1 = 3.6 V
VCC1 = 5.5 V
VINx = 24 V
VINx = 36 V
VINx = 60 V
400
Safety Limiting Current (mA)
700
250
200
150
100
1000
800
600
400
200
50
0
0
0
50
100
150
Ambient Temperature (qC)
200
D003
图 3. Thermal Derating Curve for Safety Limiting Current per
VDE for DBQ-16 Package
12
0
50
100
150
Ambient Temperature (qC)
200
D004
图 4. Thermal Derating Curve for Safety Limiting Power per
VDE for DBQ-16 Package
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6.12 Typical Characteristics
2.75
3
40qC
25qC
2.5
85qC
105qC
115qC
125qC
2.75
Input Current (mA)
2
1.5
1.25
1
0.75
ON = 8.25 V
1.75
OFF = 7.1 V
Input Current (mA)
2.25
±40°C
25°C
85°C
105°C
115°C
125°C
0.5
0.25
2.5
2.25
0
0
5
10
RSENSE = 562 Ω
15
20
Input Voltage (V)
25
2
30
30
RTHR = 0 Ω
35
-30
-10
RTHR = 2 k:
RTHR = 3 k:
10
RTHR = 4 k:
30
50
70
Temperature (qC)
90
55
60
D006
RTHR = 0 Ω
图 6. Input Current vs Input Voltage
Low-Level Threshold Voltage (V)
High-Level Threshold Voltage (V)
RTHR = 0 k:
RTHR = 1 k:
45
50
Input Voltage (V)
RSENSE = 562 Ω
图 5. Input Current vs Input Voltage
20
19
18
17
16
15
14
13
12
11
10
9
8
7
-50
40
110
130
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
-50
RTHR = 0 k:
RTHR = 1 k:
-30
-10
10
D007
RSENSE = 562 Ω
RTHR = 2 k:
RTHR = 3 k:
30
50
70
Temperature (qC)
RTHR = 4 k:
90
110
130
D008
RSENSE = 562 Ω
图 7. High-Level Voltage Transition Threshold vs Ambient
Temperature
图 8. Low-Level Voltage Transition Threshold vs Ambient
Temperature
7
Input Current (mA)
6
5
4
3
40qC
25qC
85qC
105qC
115qC
125qC
2
1
0
0
10
20
RSENSE = 200 Ω
30
40
Input Voltage (V)
50
60
70
D009
RTHR = 0 Ω
图 9. Input Current vs Input Voltage
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7 Parameter Measurement Information
7.1 Test Circuits
SENSE
18 V
VI
IN
Capacitive
Isolation
VCC1
0V
Signal
VI
100 nF
tPLH
VO
ILIM
tPHL
Generator
VO
OUT
50%
50%
RSENSE
90%
50%
10%
tr
FGND
VOH
50%
VOL
tf
CL
15 pF
GND1
图 10. Switching Characteristics Test Circuit and Voltage Waveforms
RTHR
SENSE
I(Inx+SENSEx)
VCC1
IN
Capacitive
Isolation
RSENSE
100 nF
Signal
OUT
VO
ILIM
VI
Generator
FGND
CL
15 pF
GND1
图 11. Input Current and Voltage Threshold Test Circuit
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Test Circuits (接
接下页)
SENSE
VCC1
IN
Capacitive
Isolation
0V
RSENSE
VCC1
RL
1k
VCC1 / 2
VCC1 / 2
VI
tPZL
tPLZ
0V
VO
ILIM
VOH
OUT
FGND
VO
0.5 V
50%
VOL
CL
15 pF
EN1
GND1
Signal
Generator
VI
50
图 12. Enable and Disable Propagation Delay Time Test Circuit and Waveform—Logic Low State
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Test Circuits (接
接下页)
SENSE
24 V
VCC1
VCC1
IN
Capacitive
Isolation
RSENSE
VCC1 / 2
VCC1 / 2
VI
0V
tPZH
VO
ILIM
VOH
OUT
CL
15 pF
RL
1k
50%
VO
FGND
0.5 V
0V
tPHZ
EN1
GND1
Signal
Generator
VI
50
图 13. Enable and Disable Propagation Delay Time Test Circuit and Waveform—Logic High State
S1
SENSE
24 V
VCC1
IN
Capacitive
Isolation
+
±
RSENSE
ILIM
100 nF
OUT
VOH or VOL
FGND
CL
15 pF
GND1
GND1
(1)
+ VCM ±
FGND
Pass Criterion: The output must remain stable.
图 14. Common-Mode Transient Immunity Test Circuit
16
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8 Detailed Description
8.1 Overview
The ISO1211 and ISO1212 devices are fully-integrated, isolated digital-input receivers with IEC 61131-2 Type 1,
2, and 3 characteristics. The devices receive 24-V to 60-V digital-input signals and provide isolated digital
outputs. No field-side power supply is required. An external resistor, RSENSE, on the input-signal path precisely
sets the limit for the current drawn from the field input based on an internal feedback loop. The voltage transition
thresholds are compliant with Type 1, 2, and 3 and can be increased further using an external resistor, RTHR. For
more information on selecting the RSENSE and RTHR resistor values, see the Detailed Design Procedure section.
The ISO121x devices use an ON-OFF keying (OOK) modulation scheme to transmit the digital data across a
silicon-dioxide based isolation barrier. The transmitter sends a high frequency carrier across the barrier to
represent one digital state and sends no signal to represent the other digital state. The receiver demodulates the
signal after advanced signal conditioning and produces the output through a buffer stage. The conceptual block
diagram of the ISO121x device is shown in the Functional Block Diagram section.
8.2 Functional Block Diagram
RTHR
SENSE
RSENSE
IN
CURRENT
LIMIT
ISOLATION
INPUT
OUT
REF
FGND
8.3 Feature Description
The ISO121x devices receive 24-V to 60-V digital input signals and provide isolated digital outputs. An external
resistor, RSENSE, connected between the INx and SENSEx pins, sets the limit for the current drawn from the field
input. Internal voltage comparators connected to the SENSEx pins determine the input-voltage transition
thresholds.
The output buffers on the control side are capable of providing enough current to drive status LEDs. The EN pin
is used to enable the output buffers. A low state on the EN pin puts the output buffers in a high-impedance state.
The ISO121x devices are capable of operating up to 4 Mbps. Both devices support an isolation withstand voltage
of 2500 VRMS between side 1 and side 2. 表 1 provides an overview of the device features.
表 1. Device Features
PART NUMBER
CHANNELS
MAXIMUM DATA RATE
PACKAGE
RATED ISOLATION
ISO1211
1
4 Mbps
8-pin SOIC (D)
2500 VRMS,
3600 VPK
ISO1212
2
4 Mbps
16-pin SSOP (DBQ)
2500 VRMS,
3600 VPK
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8.4 Device Functional Modes
表 2 lists the functional modes for the ISO121x devices.
表 2. Function Table (1)
SIDE 1 SUPPLY
VCC1
PU
PD
(1)
(2)
18
INPUT
(INx, SENSEx)
OUTPUT ENABLE
(EN)
OUTPUT
(OUTx)
H
H or Open
H
L
H or Open
L
Open
H or Open
L
When INx and SENSEx are open, the output of the
corresponding channel goes to Low.
X
L
Z
A low value of output enable causes the outputs to
be high impedance.
X
X
Undetermined
COMMENTS
Channel output assumes the logic state of channel
input.
When VCC1 is unpowered, a channel output is
undetermined (2). When VCC1 transitions from
unpowered to powered up; a channel output
assumes the logic state of the input.
VCC1 = Side 1 power supply; PU = Powered up (VCC1 ≥ 2.25 V); PD = Powered down (VCC1 ≤ 1.7 V); X = Irrelevant; H = High level; L =
Low level; Z = High impedance
The outputs are in an undetermined state when 1.7 V < VCC1 < 2.25 V.
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ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The ISO1211 and ISO1212 devices are fully-integrated, isolated digital-input receivers with IEC 61131-2 Type 1,
2, and 3 characteristics. These devices are suitable for high-channel density, digital-input modules for
programmable logic controllers and motor control digital input modules. The devices receive 24-V to 60-V digitalinput signals and provide isolated digital outputs. No field side power supply is required. An external resistor,
RSENSE, on the input signal path precisely sets the limit for the current drawn from the field input. This current limit
helps minimize power dissipated in the system. The current limit can be set for Type 1, 2, or 3 operation. The
voltage transition thresholds are compliant with Type 1, 2, and 3 and can be increased further using an external
resistor, RTHR. For more information on selecting the RSENSE and RTHR resistor values, see the Detailed Design
Procedure section. The ISO1211 and ISO1212 devices are capable of high speed operation and can pass
through a minimum pulse width of 150 ns. The ISO1211 device has a single receive channel. The ISO1212
device has two receive channels that are independent on the field side.
Type 1
Type 2
30
30
30
25
25
25
ON
ON
15
10
15
10
5
0
5
10
IIN (mA)
5
OFF
0
±3
15
15
10
5
OFF
0
±3
ON
20
VIN (V)
20
VIN (V)
20
VIN (V)
Type 3
0
5
10
15
IIN (mA)
OFF
0
±3
20
25
30
0
5
10
IIN (mA)
15
图 15. Switching Characteristics for IEC61131-2 Type 1, 2, and 3 Proximity Switches
9.2 Typical Application
9.2.1 Sinking Inputs
图 16 shows the design for a typical multichannel, isolated digital-input module with sinking inputs. Push-button
switches, proximity sensors, and other field inputs connect to the host controller through an isolated interface.
The design is easily scalable from a few channels, such as 4 or 8, to many channels, such as 256 or more. The
RSENSE resistor limits the current drawn from the input pins. The RTHR resistor is used to adjust the voltage
thresholds and limit the peak current during surge events. The CIN capacitor is used to filter noise on the input
pins. For more information on selecting RSENSE, RTHR, and CIN, see the Detailed Design Procedure section.
The ISO121x devices derive field-side power from the input pins which eliminates the requirement for a fieldside, 24-V input power supply to the module. Similarly, an isolated dc-dc converter creating a field-side power
supply from the controller side back plane supply is also eliminated which improves flexibility of system design
and reduces system cost.
For systems requiring channel-to-channel isolation on the field side, use the ISO1211 device as shown in 图 17.
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Typical Application (接
接下页)
PLC Digital Input Module
Field Side
PLC
5 V or 3.3 V or 2.5 V
Backplane supply
ISO1212
RTHR
SENSE1
CIN
RSENSE
VCC1
VCC
OUT1
IN1
FGND1
RTHR
SENSE2
CIN
24 V
RSENSE
OUT2
IN2
Power
Supply
FGND2
GND1
Host
Controller
0V
Sensors and
Switches
ISO1212
RTHR
SENSE1
CIN
VCC1
RSENSE
IN1
OUT1
FGND1
RTHR
SENSE2
CIN
RSENSE
Field Ground
(FGND)
IN2
OUT2
FGND2
GND1
GND
500 pF/2 kV
Protection
Earth (PE)
Copyright © 2017, Texas Instruments Incorporated
图 16. Typical Application Schematic With Sinking Inputs
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Typical Application (接
接下页)
5 V or 3.3 V or 2.5 V
Backplane Supply
ISO1211
RTHR
24 V
CIN
+
SENSE
VCC1
IN
OUT
VCC
RSENSE
±
FGND
GND1
Host
Controller
ISO1211
RTHR
24 V
+
CIN
SENSE
VCC1
IN
OUT
RSENSE
±
FGND
GND1
GND
Copyright © 2017, Texas Instruments Incorporated
图 17. Single-Channel or Channel-to-Channel Isolated Designs With ISO1211
9.2.1.1 Design Requirements
The ISO121x devices require two resistors, RTHR and RSENSE, and a capacitor, CIN, on the field side. For more
information on selecting RSENSE, RTHR, and CIN, see the Detailed Design Procedure section. A 100-nF decoupling
capacitor is required on VCC1.
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Setting Current Limit and Voltage Thresholds
The RSENSE resistor limits the current drawn from the field input. A value of 562 Ω for RSENSE is recommended for
Type 1 and Type 3 operation, and results in a current limit of 2.25 mA (typical). A value of 200 Ω for RSENSE is
recommended for Type 2 operation, and results in a current limit of 6 mA (typical). In each case, a (slightly) lower
value of RSENSE can be selected based on the need for a higher current limit or component availability. For more
information, see the Electrical Characteristics—DC Specification table and Typical Characteristics section. A 1%
tolerance is recommended on RSENSE but 5% resistors can also be used if higher variation in the current limit
value is acceptable. The relationship between the RSENSE resistor and the typical current limit (IL) is given by 公式
1.
2.25 mA u 562 :
IL
RSENSE
(1)
The RTHR resistor sets the voltage thresholds (VIL and VIH) as well as limits the surge current. A value of 1 kΩ is
recommended for RTHR in Type 3 systems (maximum threshold voltage required is 11 V). A value of 2.5 kΩ is
recommended for RTHR in Type 1 systems (maximum threshold voltage required is 15 V) and a value of 330 Ω is
recommended for RTHR in Type 2 systems. The Electrical Characteristics—DC Specification table lists and the
Typical Characteristics section describes the voltage thresholds with different values of RTHR. For other values of
RTHR, derive the values through linear interpolation. Use 公式 2 and 公式 3 to calculate the values for the typical
VIH values and minimum VIL values, respectively.
2.25 mA u 562 :
VIH (typ) 8.25 V RTHR u
RSENSE
(2)
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Typical Application (接
接下页)
VIL (typ)
7.1 V RTHR u
2.25 mA u 562 :
RSENSE
(3)
The maximum voltage on the SENSE pins of the ISO121x device is 60 V. However, because the RTHR resistor
drops additional voltage, the maximum voltage supported at the module inputs is higher and given by 公式 4.
2.1 mA u 562 :
VIN (max) 60 V RTHR u
RSENSE
(4)
Use the ISO121x Threshold Calculator for 9V to 300V DC and AC Voltage Detection to estimate the values of
the voltage transition thresholds, the maximum-allowed module input voltage, and module input current for the
given values of the RSENSE and RTHR resistors.
A value of 0 Ω for RTHR also meets Type 1, Type 2 and Type 3 voltage-threshold requirements. The value of
RTHR should be maximized for best EMC performance while meeting the desired input voltage thresholds.
Because RTHR is used to limit surge current, 0.25 W MELF resistors must be used.
图 18 shows the typical input current characteristics and voltage transition thresholds for 562-Ω RSENSE and 1-kΩ
RTHR.
2.75
2.5
2
1.5
1.25
1
0.75
ON = 8.25 V
1.75
OFF = 7.1 V
Input Current (mA)
2.25
±40°C
25°C
85°C
105°C
115°C
125°C
0.5
0.25
0
0
5
10
15
20
Input Voltage (V)
25
30
图 18. Transition Thresholds
9.2.1.2.2 Thermal Considerations
Thermal considerations constrain operation at different input current and voltage levels. The power dissipated
inside the ISO121x devices is determined by the voltage at the SENSE pin (VSENSE) and the current drawn by the
device (I(INx+SENSEx)). The internal power dissipated, when taken with the junction-to-air thermal resistance defined
in the Thermal Information table can be used to determine the junction temperature for a given ambient
temperature. The junction temperature must not exceed 150°C.
图 19 shows the maximum allowed ambient temperature for the ISO1211 device for different current limit and
input voltage conditions. The ISO1211 device can be used with a VSENSE voltage up to 60 V and an ambient
temperature of up to 125°C for an RSENSE value of 562 Ω, which corresponds to a typical current limit of 2.25 mA.
At higher levels of current limit, either the ambient temperature or the maximum value of the VSENSE voltage must
be derated. In any design, the voltage drop across the external series resistor, RTHR, reduces the maximum
voltage received by the SENSE pin and helps extend the allowable module input voltage and ambient
temperature range.
22
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Typical Application (接
接下页)
Maximum Ambient Temperature (qC)
130
125
120
115
110
105
100
95
90
85
RSENSE = 562 :, IL = 2.25 mA
RSENSE = 400 :, IL = 3.2 mA
RSENSE = 200 :, IL = 6.3 mA
80
75
70
0
(1)
10
20
30
40
50
Voltage at SENSE (V)
60
70
80
D011
This figure also applies to the ISO1212 device if only one of the two channels are expected to be active at a given
time.
图 19. Maximum Ambient Temperature Derating Curve for ISO1211 vs VSENSE
图 20 shows the maximum allowed ambient temperature for the ISO1212 device for different current limit and
input voltage conditions. The ISO1212 device can be used with a VSENSE voltage up to 36 V and an ambient
temperature of up to 125°C for an RSENSE value of 562 Ω, which corresponds to a typical current limit of 2.25 mA.
At higher current limit levels, either the ambient temperature or the maximum value of the VSENSE voltage must
be derated. Operation of the ISO1212 device with an RSENSE value of 200 Ω and with both channels active is not
recommended beyond a VSENSE voltage of 36 V. In any design, the voltage drop across the series resistor, RTHR,
reduces the maximum voltage received by the SENSE pin and helps extend the allowable module input voltage
and ambient temperature range.
Maximum Ambient Temperature (qC)
130
125
120
115
110
105
100
95
90
85
RSENSE = 562 :, IL = 2.25 mA
RSENSE = 400 :, IL = 3.2 mA
RSENSE = 200 :, IL = 6.3 mA
80
75
70
0
(1)
10
20
30
40
50
Voltage at SENSE (V)
60
70
80
D012
This figure only applies if both channels of the ISO1212 device are expected to be on at the same time. If only one
channel is expected to be on at a given time, refer to 图 19.
图 20. Maximum Ambient Temperature Derating Curve for ISO1212 vs VSENSE
9.2.1.2.3 Designing for 48-V Systems
The ISO121x devices are suitable for 48-V digital input receivers. The current limit, voltage transition thresholds,
and maximum voltage supported at the module input are governed by 公式 1, 公式 2, 公式 3, and 公式 4. For 48V systems, a threshold voltage close to 25 V is desirable. The RTHR resistor can be adjusted to achieve this
higher threshold. For example, with an RSENSE value of 562 Ω and an RTHR value of 7.5 k Ω, a VIH value of
approximately 25 V can be achieved. With this setting, the RTHR resistor drops a voltage of approximately 17 V,
reducing the maximum value of the VSENSE voltage for any given module input voltage. This drop vastly increases
the allowable module input voltage and ambient temperature range as discussed in Thermal Considerations.
版权 © 2017–2018, Texas Instruments Incorporated
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ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
Typical Application (接
接下页)
9.2.1.2.4 Designing for Input Voltages Greater Than 60 V
The ISO121x devices are rated for 60 V on the SENSE and IN pins with respect to FGND. However, larger
voltages on the module input can be supported by dropping extra voltage across an external resistor, RTHR.
Because the current drawn by the SENSE and IN pins is well controlled by the built-in current limit, the voltage
drop across RTHR is well controlled as well. However, increasing the RTHR resistance also correspondingly raises
the voltage transition threshold. An additional resistor, RSHUNT (see 图 21), provides the flexibility to change the
voltage transition thresholds independently of the maximum input voltage. The current through the RSHUNT
resistor is less near the voltage transition threshold, but increases with the input voltage, increasing the voltage
drop across the RTHR resistor, and preventing the voltage on the ISO121x pins from exceeding 60 V. With the
correct value selected for the RTHR and RSHUNT resistors, the voltage transition thresholds and the maximum input
voltage supported can be adjusted independently.
A 1-nF or greater CIN capacitor is recommended between the SENSE and FGND pins to slow down the
transitions on the SENSE pin, and to prevent overshoot beyond 60 V during transitions.
For more information, refer to the How to Design Isolated Comparators for ±48V, 110V and 240V DC and AC
Detection TI TechNote. Use the ISO121x Threshold Calculator for 9V to 300V DC and AC Voltage Detection to
estimate the values of voltage transition thresholds, the maximum-allowed module input voltage, and module
input current for given values of the RSENSE, RTHR, and RSHUNT resistors.
ISO1211
RTHR
SENSE
VIN
VCC1
RSENSE
+
RSHUNT
±
CIN
OUT
IN
FGND
GND1
图 21. Increase ISO121x Input Voltage Range With RSHUNT
Another way to increase the maximum module input voltage without changing the voltage transition thresholds is
to use a 60-V Zener diode to limit the voltage on the ISO121x pins to less than 60 V as shown in 图 22. In this
case, when the module input is greater than 60 V, the Zener diode must be designed to sink the additional
current, and the RTHR resistor must be designed to drop a higher voltage.
For example, with a 2.5-kΩ RTHR and 560-Ω RSENSE, the voltage transition threshold is 15 V, and the ISO121x
input current is 2.25 mA. If the module voltage reaches 100 V, the voltage drop across the RTHR resistor is 40 V,
and the current through the Zener diode is approximately 14 mA.
ISO1211
RTHR
SENSE
VIN
+
±
VCC1
RSENSE
60 V
CIN
OUT
IN
FGND
GND1
图 22. Increase ISO121x Input Voltage Range Using a Zener Diode
9.2.1.2.5 Surge, ESD, and EFT Tests
Digital input modules are subject to surge (IEC 61000-4-5), electrostatic discharge or ESD (IEC 61000-4-2) and
electrical fast transient or EFT (IEC 61000-4-4) tests. The surge impulse waveform has the highest energy and
the widest pulse width, and is therefore the most stringent test of the three.
图 16 shows the application diagram for Type 1 and 3 systems. For a 1-kVPP surge test between the input
terminals and protection earth (PE), a value of 1 kΩ for RTHR and 10 nF for CIN is recommended. 表 3 lists a
summary of recommended component values to meet different levels of EMC requirements for Type 1 and 3
systems.
24
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ISO1211, ISO1212
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ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
Typical Application (接
接下页)
表 3. Surge, IEC ESD and EFT
IEC 61131-2
TYPE
RSENSE
RTH
CIN
Type 1
562
2.5 kΩ
Type 3
562
1 kΩ
SURGE
IEC ESD
IEC EFT
±1 kV
±6 kV
±4 kV
±500 V
±6 kV
±4 kV
±6 kV
±4 kV
LINE-TO-PE
LINE-TO-LINE
LINE-TO-FGND
10 nF
±1 kV
±1 kV
10 nF
±1 kV
±1 kV
330 nF
±1 kV
±1 kV
±1 kV
图 23 shows the test setup and application circuit used for surge testing. A noise filtering capacitor of 500 pF is
recommended between the FGND pin and PE (earth). The total value of effective capacitance between the
FGND pin and any other ground potential (including PE) must not exceed 500 pF for optimum surge
performance. For line-to-PE test (common-mode test), the FGND pin is connected to the auxiliary equipment
(AE) through a decoupling network.
5 V or 3.3 V or 2.5 V
Backplane supply
20 mH
ISO1212
RTHR
IN1
SENSE1
CIN
RSENSE
VCC1
VCC
OUT1
IN1
FGND1
20 mH
RTHR
IN2
SENSE2
CIN
RSENSE
OUT2
IN2
FGND2
Host
Controller
Decoupling
Network
20 mH
INN
Line-to-PE
ISO1212
INN-1
RTHR
SENSE1
Line-to-FGND
20 mH
Line-to-Line
Auxiliary
Equipment
(AE)
CIN
VCC1
RSENSE
IN1
OUT1
FGND1
RTHR
SENSE2
CIN
RSENSE
Field Ground
(FGND)
20 mH
GND1
IN2
OUT2
FGND2
GND1
GND
FGND(1)
500 pF(2)
2 kV
PE
Protection
Earth (PE)
PE
Copyright © 2017, Texas Instruments Incorporated
(1)
For line-to-PE test, FGND is connected to the auxiliary equipment (AE) through a decoupling network.
(2)
A noise filtering capacitor of about 500 pF is recommended between the FGND pin and PE (earth). The total value of
effective capacitance between the FGND pin and any other ground potential (including PE) must not exceed 500 pF
for optimum performance.
图 23. Setup and Application Circuit Used for Surge Test
版权 © 2017–2018, Texas Instruments Incorporated
25
ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
For higher voltage levels of surge tests or for faster systems that cannot use a large value for CIN, TVS diodes or
varistors can be used to meet EMC requirements. Type 2 systems that use a smaller value for RTHR may also
require TVS diodes or varistors for surge protection. 图 24 shows an example usage of TVS diodes for surge
protection. The recommended components for surge protection are VCAN26A2-03S (TVS, Vishay), EZJP0V420WM (Varistor, Panasonic), and GSOT36C (TVS, Vishay).
Use of the RTHR resistor also reduces the peak current requirement for the TVS diodes, making them smaller and
cost effective. For example, a 2-kV surge through a 1-kΩ RTHR resistor creates only 2-A peak current. Also,
because of voltage drop across the RTHR resistor in normal operation, the working voltage requirement for the
varistor or TVS diodes is reduced. For example, for a RTHR value of 1 kΩ and an RSENSE value of 562 Ω, a
module designed for 30-V inputs only requires 28-V TVS diodes because the RTHR resistor drops more than 2 V.
5 V or 3.3 V or 2.5 V
Backplane Supply
ISO1211
RTHR
24 V
SENSE
VCC1
IN
OUT
VCC
RSENSE
TVS
0V
FGND
GND1
Host
Controller
GND
Copyright © 2017, Texas Instruments Incorporated
图 24. TVS Diodes Used Instead of a Filtering Capacitor for Surge Protection in Faster Systems
9.2.1.2.6 Multiplexing the Interface to the Host Controller
The ISO121x devices provide an output-enable pin on the controller side (EN). Setting the EN pin to 0 causes
the output buffers to be in the high-impedance state. This feature can be used to multiplex the outputs of multiple
ISO121x devices on the same host-controller input, reducing the number of pins on the host controller.
In the example shown in 图 25, two sets of 8-channel inputs are multiplexed, reducing the number of input pins
required on the controller from 16 to 10. Similarly, if four sets of 8-channel inputs are multiplexed, the number of
pins on the controller is reduced from 32 to 12.
26
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ISO1211, ISO1212
www.ti.com.cn
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
ISO1212
ISO1212
RTHR
IN1
RTHR
SENSE1
SENSE1
RSENSE
OUT1
OUT1
IN1
RTHR
IN2
IN1
SENSE2
SENSE2
RSENSE
IN2
OUT2
RTHR
EN
ISO1212
ISO1212
RTHR
RTHR
RSENSE
RSENSE
SENSE1
SENSE1
IN1
RTHR
IN8
IN15
RSENSE
OUT1
OUT1
IN1
RTHR
SENSE2
SENSE2
IN2
IN10
RSENSE
IN2
OUT2
EN
IN7
IN9
RSENSE
IN16
RSENSE
OUT2
OUT2
IN2
EN
EN2
DIN8
DIN7
DIN2
DIN1
EN1
EN
Host
Controller
Copyright © 2017, Texas Instruments Incorporated
图 25. Using the Output Enable Option to Multiplex the Interface to the Host Controller
9.2.1.2.7 Status LEDs
The outputs of the ISO121x devices can be used to drive status LEDs on the controller side as shown in 图 26.
The output buffers of the ISO121x can provide 4-mA, 3-mA, and 2-mA currents while working at VCC1 values of 5
V, 3.3 V, and 2.5 V respectively.
In some cases, placing the LED on the field side is desirable although it is powered from VCC1. In such cases, the
signal carrying current to the LED can be routed in an inner layer without compromising the isolation of the
digital-input module. For more information, see the Layout Guidelines section.
5 V or 3.3 V or 2.5 V
Backplane Supply
ISO1211
RTHR
24 V
CIN
Power
Supply
0V
SENSE
VCC1
IN
OUT
VCC
RSENSE
FGND
GND1
Host
Controller
GND
Status
LED
Copyright © 2017, Texas Instruments Incorporated
图 26. Using ISO121x Outputs to Drive Status LEDs
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ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
9.2.1.3 Application Curve
2.75
2.5
2
1.5
1.25
1
0.75
ON = 8.25 V
1.75
OFF = 7.1 V
Input Current (mA)
2.25
±40°C
25°C
85°C
105°C
115°C
125°C
0.5
0.25
0
0
5
10
15
20
Input Voltage (V)
25
30
RSENSE = 562 Ω
RTHR = 0 Ω
图 27. Input Current vs Input Voltage
28
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ISO1211, ISO1212
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ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
9.2.2 Sourcing Inputs
The ISO121x devices can be configured as sourcing inputs as shown in 图 28. In this configuration, all the
SENSE pins are connected to the common voltage (24 V), and the inputs are connected to the individual FGND
pins.
24-V
Common
5 V or 3.3 V or 2.5 V
Backplane supply
ISO1212
SENSE1
CIN
RSENSE
VCC
OUT1
IN1
RTHR
VCC1
FGND1
Current Flow
SENSE2
CIN
24 V
RSENSE
Power
Supply
OUT2
IN2
RTHR
FGND2
GND1
0V
Host
Controller
ISO1212
SENSE1
Sensors and
Switches
CIN
VCC1
RSENSE
IN1
RTHR
OUT1
FGND1
Current Flow
SENSE2
CIN
RSENSE
RTHR
IN2
OUT2
FGND2
GND1
GND
500 pF/2 kV
PE
Protection
Earth (PE)
Copyright © 2017, Texas Instruments Incorporated
图 28. Typical Application Circuit With Sourcing Inputs
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ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
9.2.3 Sourcing and Sinking Inputs (Bidirectional Inputs)
The ISO1212 device can be used to create a bidirectional input module that can sink and source current as
shown in 图 29. In this configuration, channel 1 is active if the COM terminal is connected to ground for sinking
inputs, and channel 2 is active if the COM terminal is connected to 24 V for sourcing input. The digital input is
considered high if either the OUT1 or OUT2 pin is high.
5 V or 3.3 V or 2.5 V
Backplane supply
IN
ISO1212
RTHR
SENSE1
CIN
VCC
VCC1
RSENSE
IN1
OUT1
FGND1
Host
Controller
SENSE2
±24 V
RSENSE
OUT2
IN2
FGND2
GND1
GND
COM
Current for positive polarity
Current for negative polarity
Copyright © 2017, Texas Instruments Incorporated
图 29. Application Circuit—ISO1212 With Sourcing and Sinking Inputs
A bidirectional input module can also be built with the ISO121x devices using low-cost Schottky diodes as shown
in 图 30.
IN
RTHR
BAT54CLT1G
ISO1211
±24 V
SENSE
VCC1
RSENSE
COM
CIN
IN
FGND
Host
Controller
OUT
GND1
图 30. Bidirectional Implementation With ISO1211 and Bridge Rectifier
10 Power Supply Recommendations
To help ensure reliable operation at data rates and supply voltages, a 0.1-μF bypass capacitor is recommended
on the side 1 supply pin (VCC1). The capacitor should be placed as close to the supply pins as possible.
30
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ISO1211, ISO1212
www.ti.com.cn
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
11 Layout
11.1 Layout Guidelines
The board layout for ISO1211 and ISO1212 can be completed in two layers. On the field side, place RSENSE, CIN,
and RTHR on the top layer. Use the bottom layer as the field ground (FGND) plane. TI recommends using RSENSE
and CIN in 0603 footprint for a compact layout, although larger sizes (0805) can also be used. The CIN capacitor
is a 50-V capacitor and is available in the 0603 footprint. Keep CIN as close to the ISO121x device as possible.
The SUB pin on the ISO1211 device and the SUB1 and SUB2 pins on the ISO1212 device should be left
unconnected. For group isolated design, use vias to connect the FGND pins of the ISO121x device to the bottom
FGND plane. The placement of the RTHR resistor is flexible, although the resistor pin connected to external high
voltage should not be placed within 4 mm of the ISO121x device pins or the CIN and RSENSE pins to avoid
flashover during EMC tests.
Only a decoupling capacitor is required on side 1. Place this capacitor on the top-layer, with the bottom layer for
GND1.
If a board with more than two layers is used, placing two ISO121x devices on the top-and bottom layers (back-toback) is possible to achieve a more compact board. The inner layers can be used for FGND.
图 31 and 图 32 show the example layouts.
In some designs, placing the LED on the field side is desirable although it is powered from VCC1. In such cases,
the signal carrying current to the LED can be routed in an inner layer without compromising the isolation of the
digital-input module as shown in 图 33. The LED must be placed with at least 4-mm spacing between other
components and connections on side 1 to ensure adequate isolation.
11.2 Layout Example
2 mm maximum
from VCC
VCC
RTHR
0.1 F
C
VCC1
GND1
Plane
GND1
Isolation Capacitor
C
CIN
OUT
R
IN
RSENSE
EN
MCU
R
SENSE
High Voltage Input
FGND
SUB
FGND
Plane
图 31. Layout Example With ISO1211
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31
ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
Layout Example (接
接下页)
2 mm Maximum
from VCC
VCC
INP1
R
EN
OUT1
MCU
OUT2
NC
RTHR
FGND
FGND
SUB1
High Voltage
Input
RTHR
SUB2
INP2
R
SENSE1
IN1
R
FGND
GND1
C
C
CIN
GND1
Plane
IN1
RSENSE
NC
Isolation Capacitor
VCC1
R
SENSE1
GND1
CIN
C
RSENSE
0.1 F
FGND
Plane
图 32. Layout Example With ISO1212
2 mm maximum
from VCC
VCC
RTHR
0.1 F
C
VCC1
GND1
R
Isolation Capacitor
IN
C
CIN
OUT
R
RSENSE
EN
MCU
R
SENSE
High Voltage Input
FGND
SUB
4 mm minimum
FGND
Plane
LED
GND1
Plane
图 33. Layout Example With LED Placed on the Field Side But Driven From VCC1 Power Domain
32
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ISO1211, ISO1212
www.ti.com.cn
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
12 器件和文档支持
12.1 器件支持
12.1.1 开发支持
有关开发支持，请参阅：
• 低于 1W 的 16 通道隔离数字输入模块参考设计
• 采用光学开关的断线检测参考设计
• 用于在变速驱动器中实现安全转矩关闭的冗余双通道参考设计
12.2 文档支持
12.2.1 相关文档
如需相关文档，请参阅：
• 德州仪器 (TI)，《如何提高电机驱动中的隔离式数字输入的速度和可靠性》TI 技术手册
• 德州仪器 (TI)，《如何设计用于 ±48V、110V 和 240V 直流和交流检测的隔离式比较器》TI 技术手册
• 德州仪器 (TI)，《如何简化隔离式 24V PLC 数字输入模块设计》TI 技术手册
• 德州仪器 (TI)，《隔离相关术语》
• 德州仪器 (TI)，《用于 9V 至 300V 直流和交流电压检测的 ISO121x 阈值计算器》
• 德州仪器 (TI)，《ISO1211 隔离式数字输入接收器评估模块》用户手册
• 德州仪器 (TI)，《ISO1212 隔离式数字输入接收器评估模块》用户手册
12.3 相关链接
下表列出了快速访问链接。类别包括技术文档、支持和社区资源、工具和软件，以及立即订购快速访问。
表 4. 相关链接
器件
产品文件夹
立即订购
技术文档
工具与软件
支持和社区
ISO1211
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
ISO1212
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
12.4 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。
12.5 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
12.6 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.7 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
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ISO1211, ISO1212
ZHCSGU8E – JUNE 2017 – REVISED AUGUST 2018
www.ti.com.cn
12.8 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
34
版权 © 2017–2018, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
ISO1211D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1211
ISO1211DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1211
ISO1212DBQ
ACTIVE
SSOP
DBQ
16
75
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1212
ISO1212DBQR
ACTIVE
SSOP
DBQ
16
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1212
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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