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ISO7640FM, ISO7641FM
SLLSE89G – SEPTEMBER 2011 – REVISED JANUARY 2015
ISO764xFM Low-Power Quad-Channel Digital Isolators
1 Features
3 Description
•
•
ISO7640FM and ISO7641FM provide galvanic
isolation up to 6 KVPK for 1 minute per UL and VDE.
These devices are also certified up to 5-KVRMS
Reinforced isolation at a working voltage of 400 VRMS
per end equipment standards EN/UL/CSA 60950-1
and 61010-1. ISO7640F and ISO7641F are quadchannel isolators; ISO7640F has four forward and
ISO7641F has three forward and one reversedirection channels. Suffix F indicates that output
defaults to Low-state in fail-safe conditions (see
Table 4). M-Grade devices are high-speed isolators
capable of 150-Mbps data rate with fast propagation
delays.
1
•
•
•
•
•
•
•
•
Signaling Rate: 150 Mbps
Low Power Consumption, Typical ICC per Channel
(3.3-V Supplies):
– ISO7640FM: 2 mA at 25 Mbps
– ISO7641FM: 2.4 mA at 25 Mbps
Low Propagation Delay: 7-ns Typical
Output Defaults to Low-State in Fail-Safe Mode
Wide Temperature Range: –40°C to 125°C
50-KV/µs Transient Immunity, Typical
Long Life With SiO2 Isolation Barrier
Operates From 2.7-V, 3.3-V, and 5-V Supply and
Logic Levels
Wide Body SOIC-16 Package
Safety and Regulatory Approvals
– 6000 VPK / 4243 VRMS for 1 Minute per UL
1577
– VDE 6000 VPK Transient Overvoltage, 1414
VPK Working Voltage per DIN V VDE V 088410 (VDE V 0884-10):2006-12
– CSA Component Acceptance Notice 5A, IEC
60950-1, IEC 61010-1, and IEC 60601-1 End
Equipment Standards
– TUV 5 KVRMS Reinforced Insulation per
EN/UL/CSA 60950-1 and EN/UL/CSA 61010-1
– CQC Reinforced Insulation per GB4943.12011
Each isolation channel has a logic input and output
buffer separated by a silicon dioxide (SiO2) insulation
barrier. Used in conjunction with isolated power
supplies, these devices prevent noise currents on a
data bus or other circuits from entering the local
ground and interfering with or damaging sensitive
circuitry. The devices have TTL input thresholds and
can operate from 2.7-V, 3.3-V, and 5-V supplies. All
inputs are 5-V tolerant when supplied from 3.3-V or
2.7-V supplies.
Device Information(1)
PART NUMBER
SOIC (16)
ISO7641FM
Optocoupler Replacement in:
– Industrial Fieldbus
– Profibus
– Modbus
– DeviceNet™ Data Buses
– Servo Control Interface
– Motor Control
– Power Supplies
– Battery Packs
BODY SIZE (NOM)
10.30 mm × 7.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
2 Applications
•
PACKAGE
ISO7640FM
VCCI
VCCO
Isolation
Capacitor
INx
OUTx
ENx
GND1
GND2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
ISO7640FM, ISO7641FM
SLLSE89G – SEPTEMBER 2011 – REVISED JANUARY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.17 Switching Characteristics: VCC1 at 3.3 V ±10% and
VCC2 at 5 V ±10% .................................................... 15
6.18 Switching Characteristics: VCC1 and VCC2 at 3.3 V
±10% ........................................................................ 15
6.19 Switching Characteristics: VCC1 and VCC2 at 2.7
V............................................................................... 16
6.20 Typical Characteristics .......................................... 17
1
1
1
2
5
6
6.1
6.2
6.3
6.4
6.5
Absolute Maximum Ratings ...................................... 6
ESD Ratings.............................................................. 6
Recommended Operating Conditions....................... 6
Thermal Information .................................................. 6
Electrical Characteristics: VCC1 and VCC2 at 5 V
±10% .......................................................................... 7
6.6 Electrical Characteristics: VCC1 at 5 V ±10% and
VCC2 at 3.3 V ±10% ................................................... 7
6.7 Electrical Characteristics: VCC1 at 3.3 V ±10% and
VCC2 at 5 V ±10% ...................................................... 7
6.8 Electrical Characteristics: VCC1 and VCC2 at 3.3 V
±10% .......................................................................... 8
6.9 Electrical Characteristics: VCC1 and VCC2 at 2.7 V ... 8
6.10 Supply Current: VCC1 and VCC2 at 5 V ±10% ......... 9
6.11 Supply Current: VCC1 at 5 V ±10% and VCC2 at 3.3
V ±10%..................................................................... 10
6.12 Supply Current: VCC1 at 3.3 V ±10% and VCC2 at 5
V ±10%..................................................................... 11
6.13 Supply Current: VCC1 and VCC2 at 3.3 V ±10% .... 12
6.14 Supply Current: VCC1 and VCC2 at 2.7 V............... 13
6.15 Switching Characteristics: VCC1 and VCC2 at 5 V
±10% ........................................................................ 14
6.16 Switching Characteristics: VCC1 at 5 V ±10% and
VCC2 at 3.3 V ±10% ................................................. 14
7
8
Parameter Measurement Information ................ 19
Detailed Description ............................................ 21
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
21
21
21
25
Application and Implementation ........................ 26
9.1 Application Information............................................ 26
9.2 Typical Application ................................................. 26
10 Power Supply Recommendations ..................... 29
11 Layout................................................................... 29
11.1 Layout Guidelines ................................................. 29
11.2 Layout Example .................................................... 29
12 Device and Documentation Support ................. 30
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
30
30
30
30
30
13 Mechanical, Packaging, and Orderable
Information ........................................................... 30
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (September 2013) to Revision G
Page
•
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
•
VDE standard changed to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12. ..................................................................... 1
Changes from Revision E (January 2013) to Revision F
•
Page
Changed the REGULATORY INFORMATION table, TUV column From: Certificate Number: U8V 13 07 77311 009
To: Certificate Number: U8V 13 09 77311 010 .................................................................................................................... 23
Changes from Revision D (July 2012) to Revision E
•
2
Page
Changed Z to Undetermined in the OUTPUT (OUTx) column of the FUNCTION TABLE................................................... 25
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SLLSE89G – SEPTEMBER 2011 – REVISED JANUARY 2015
Changes from Revision C (January 2012) to Revision D
Page
•
Deleted devices: ISO7631FM, ISO7631FC, ISO7640FC, ISO7641FC from the data sheet ................................................. 1
•
Changed the Title From: Low Power Triple and Quad Channels Digital Isolators To: Low Power Quad Channels
Digital Isolators ....................................................................................................................................................................... 1
•
Deleted devices from the Features List.................................................................................................................................. 1
•
Changed the DESCRIPTION ................................................................................................................................................ 1
•
Changed EN1 and EN2 Pin Descriptions............................................................................................................................... 5
•
Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables ..................................... 7
•
Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables ..................................... 7
•
Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables ..................................... 7
•
Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables ..................................... 8
•
Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables ..................................... 8
•
Changed the TYPICAL CHARACTERISTICS section.......................................................................................................... 17
•
Deleted device from the Available Options Table ................................................................................................................ 21
•
Deleted devices from the TYPICAL SUPPLY CURRENT EQUATIONS section ................................................................. 28
Changes from Revision B (December 2011) to Revision C
Page
•
Changed Safety and Regulatory Approvals bullet From: 6000 VPK / 4243 VRMS for 1 Minute per UL1577 (pending)
To: 6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (approved) ........................................................................................... 1
•
Changed Description text From: The devices have TTL input thresholds and can operate from 2.7 V, 3.3 V and 5 V
supplies. To: The devices have TTL input thresholds and can operate from 2.7 V (M-Grade), 3.3 V and 5 V supplies....... 1
•
Changed the ESD standards.................................................................................................................................................. 6
•
Changed the typical characteristics section ......................................................................................................................... 17
•
Deleted the Product Preview Note From the Available Options Table................................................................................. 21
Changes from Revision A (October 2011) to Revision B
Page
•
Changed feature bullet From: ISO7641FC: 1.2 mA at 10 Mbps To: ISO7641FC: 1.3 mA at 10 Mbps ................................. 1
•
Changed Safety and Regulatory Approvals bullet From: 6 KVPK for 1 Minute per UL1577 and VDE (Pending) To:
6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (pending) ................................................................................................... 1
•
Changed Safety and Regulatory Approvals bullet From: To: 6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (approved) . 1
•
Changed Safety and Regulatory Approvals bullet From: CSA Component Acceptance Notice 5A, IEC 60601-1
Medical Standard (pending) To: CSA Component Acceptance Notice 5A, IEC 60601-1 Medical Standard (approved) ..... 1
•
Changed all the ELECTRICAL CHARACTERISTICS tables ................................................................................................. 7
•
Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ..................................... 9
•
Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 10
•
Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 11
•
Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 12
•
Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 13
•
Changed all the SWITCHING CHARACTERISTICS tables ................................................................................................. 14
•
Changed the IEC 60664-1 Ratings Table ............................................................................................................................ 23
Changes from Original (September 2011) to Revision A
Page
•
Changed Figure 11 - From: 0 V or VCC To: IN = VCC ........................................................................................................... 20
•
Added Note (1) "Per JEDEC package dimensions" to the IEC INSULATION AND SAFETY-RELATED
SPECIFICATIONS FOR DW-16 PACKAGE table................................................................................................................ 20
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Product Folder Links: ISO7640FM ISO7641FM
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•
Changed L(I01) Min Value From: 8 mm To: 8.3 mm............................................................................................................ 20
•
Changed L(I02) Min Value From: 7.8 mm To: 8.1 mm......................................................................................................... 20
•
Added pinout for ISO7641 and ISO7631.............................................................................................................................. 28
4
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ISO7640FM, ISO7641FM
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SLLSE89G – SEPTEMBER 2011 – REVISED JANUARY 2015
5 Pin Configuration and Functions
DW Package
16-Pin SOIC
Top View
ISO7640
ISO7641
VCC1
1
16
VCC2
VCC1
1
16
VCC2
GND1
2
15
GND2
GND1
2
15
GND2
INA
INB
3
14
OUTA
14
OUTA
13
OUTB
INA
INB
3
4
4
13
OUTB
INC
5
12
OUTC
INC
5
12
OUTC
IND
6
11
OUTD
OUTD
6
11
IND
NC
7
10
EN1
7
10
GND1
8
9
GND1
8
9
EN
GND2
EN2
GND2
Pin Functions
PIN
NAME
I/O
DESCRIPTION
ISO7640
ISO7641
EN
10
-
I
Enables (when High or Open) or Disables (when Low) OUTA, OUTB, OUTC and OUTD of
ISO7640
EN1
-
7
I
Enables (whenHigh or Open) or Disables (when Low) OUTD of ISO7641
EN2
-
10
I
Enables (when High or Open) or Disables (when Low) OUTA, OUTB, and OUTC of ISO7641
2
2
8
8
–
Ground connection for VCC1
–
Ground connection for VCC2
GND1
9
9
15
15
INA
3
3
I
Input, channel A
INB
4
4
I
Input, channel B
INC
5
5
I
Input, channel C
IND
6
11
I
Input, channel D
GND2
NC
7
-
-
No Connect pins are floating with no internal connection
OUTA
14
14
O
Output, channel A
OUTB
13
13
O
Output, channel B
OUTC
12
12
O
Output, channel C
OUTD
11
6
O
Output, channel D
VCC1
1
1
–
Power supply, VCC1
VCC2
16
16
–
Power supply, VCC2
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6 Specifications
6.1 Absolute Maximum Ratings (1)
MIN
MAX
UNIT
Supply voltage (2)
VCC1, VCC2
–0.5
6
V
Voltage
INx, OUTx, ENx
–0.5
VCC + 0.5 (3)
V
–15
15
mA
150
°C
150
°C
Output Current, IO
Maximum junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak
voltage values.
Maximum voltage must not exceed 6 V.
6.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±4000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
±1500
Machine model, per JEDEC JESD22-A115-A
±200
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
MIN
VCC1, VCC2
Supply voltage
2.7
IOH
High-level output current
–4
IOL
Low-level output current
VIH
High-level input voltage
VIL
Low-level input voltage
NOM
MAX
5.5
UNIT
V
mA
4
mA
2
5.5
V
0
0.8
V
≥3-V Operation
6.67
1011
CIO (2)
Barrier capacitance, Input to
Output
VI = 0.4 sin (2πft), f = 1MHz
2
pF
CI (3)
Input capacitance
VI = VCC/2 + 0.4 sin (2πft), f = 1MHz, VCC = 5 V
2
pF
(1)
(2)
(3)
Ω
Per JEDEC package dimensions.
All pins on each side of the barrier tied together creating a two-terminal device.
Measured from input pin to ground.
NOTE
Creepage and clearance requirements should be applied according to the specific
equipment isolation standards of an application. Care should be taken to maintain the
creepage and clearance distance of a board design to ensure that the mounting pads of
the isolator on the printed-circuit-board (PCB) do not reduce this distance.
Creepage and clearance on a PCB become equal according to the measurement
techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or
ribs on a PCB are used to help increase these specifications.
8.3.2 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics
over recommended operating conditions (unless otherwise noted) (4)
PARAMETER
VIORM
VPR
TEST CONDITIONS
Maximum working insulation voltage
Input-to-output test voltage
SPECIFICATION
UNIT
1414
VPEAK
After Input/Output safety test subgroup 2/3,
VPR = VIORM x 1.2, t = 10 s,
Partial discharge < 5 pC
1697
Method a, After environmental tests subgroup 1,
VPR = VIORM x 1.6, t = 10 s,
Partial Discharge < 5 pC
2262
Method b1, 100% Production test
VPR = VIORM x 1.875, t = 1 s
Partial discharge < 5 pC
2652
VPEAK
VIOTM
Maximum transient overvoltage
VTEST = VIOTM
t = 60 sec (Qualification)
t = 1 sec (100% Production)
6000
VPEAK
RS
Insulation resistance
VIO = 500 V at TS
>109
Ω
Pollution degree
(4)
22
2
Climatic Classification 40/125/21
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Table 1. IEC 60664-1 Ratings Table
PARAMETER
Basic Isolation Group
Installation classification
TEST CONDITIONS
SPECIFICATION
Material Group
II
Rated mains voltage ≤ 300 VRMS
I–IV
Rated mains voltage ≤ 600 VRMS
I–III
Rated mains voltage ≤ 1000 VRMS
I–II
Table 2. Regulatory Information
VDE
TUV
CSA
UL
CQC
Certified according to DIN
V VDE V 0884-10 (VDE V
0084-10):2006-12
Certified according to
EN/UL/CSA 60950-1 and
EN/UL/CSA 61010-1
Approved under CSA
Component Acceptance
Notice 5A, IEC 61010-1,
IEC 60950-1, IEC 60601-1
Recognized under UL
1577 Component
Recognition Program
Certified according to
GB4943.1-2011
Basic Insulation,
Maximum Transient
Overvoltage, 6000 VPK ,
Maximum Working
Voltage, 1414 VPK
5000 VRMS Isolation
Rating, Reinforced
Insulation, 400 VRMS
maximum working
voltage, Basic Insulation,
600 VRMS maximum
working voltage
5000 VRMS Isolation
Rating, 380 VRMS
Reinforced and 760 VRMS
Basic working voltage per
CSA 60950-1-07 and IEC
60950-1 (2nd Ed.),
300 VRMS Reinforced and
600 VRMS Basic working
voltage per CSA 61010-104 and IEC 61010-1 (2nd
Ed.),
2 Means of Patient
Protection at 125 VRMS
per CSA 60601-1:08 and
IEC 60601-1 (3rd Ed.)
Single Protection, 4243
VRMS (1)
Reinforced Insulation,
Altitude ≤ 5000 m,
Tropical Climate, 250
VRMS maximum working
voltage
Certificate number:
40016131
Certificate number: U8V
13 09 77311 010
Master contract number:
220991
File Number: E181974
Certificate number:
CQC14001109542
(1)
Production tested ≥ 5092 VRMS for 1 second in accordance with UL 1577.
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8.3.3 Safety Limiting Values
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate
sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system
failures.
Table 3. Safety Limiting Values
PARAMETER
IS
Safety input, output, or supply
current
TS
Maximum case temperature
TEST CONDITIONS
DW-16
MIN
TYP MAX
θJA = 72°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C
316
θJA = 72°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C
482
θJA = 72°C/W, VI = 2.7 V, TJ = 150°C, TA = 25°C
643
150
UNIT
mA
°C
Safety Limiting Current - mA
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum
ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the
Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface Mount
Packages. The power is the recommended maximum input voltage times the current. The junction temperature is
then the ambient temperature plus the power times the junction-to-air thermal resistance.
700
600
VCC1 = VCC2 = 2.7V
500
VCC1 = VCC2 = 3.6V
400
300
VCC1 = VCC2 = 5.5V
200
100
0
0
50
100
150
200
o
Case Temperature - C
Figure 14. DW-16 θJC Thermal Derating Curve per DIN V VDE V 0884-10
24
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8.4 Device Functional Modes
Table 4. Function Table (1)
VCCI
VCCO
PU
(1)
INPUT
(INx)
OUTPUT ENABLE
(ENx)
OUTPUT
(OUTx)
H
H or Open
H
L
H or Open
L
PU
X
L
Z
Open
H or Open
L
H or Open
L
PD
PU
X
PD
PU
X
L
Z
X
PD
X
X
Undetermined
VCCI = Input-side VCC; VCCO = Output-side VCC; PU = Powered Up (VCC ≥ 2.7 V); PD = Powered
Down (VCC ≤ 2.1 V); X = Irrelevant; H = High Level; L = Low Level; Z = High Impedance
Input
VCCI
VCCI
Enable
Output
VCCO
VCCO VCCO
VCCO
1 MW
8W
500 W
IN
500 W
OUT
EN
13 W
7.5 µA
Figure 15. Device I/O Schematics
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
ISO764x use single-ended TTL-logic switching technology. Its supply voltage range is from 3 V to 5.5 V for both
supplies, VCC1 and VCC2. When designing with digital isolators, it is important to note that due to the single-ended
design structure, digital isolators do not conform to any specific interface standard and are only intended for
isolating single-ended CMOS or TTL digital signal lines. The isolator is typically placed between the data
controller (that is, μC or UART), and a data converter or a line transceiver, regardless of the interface type or
standard.
9.2 Typical Application
ISO-BARRIER
5VISO 5VISO
0.1 F
RTD
Bridge
Thermo
couple
Current
shunt
0.1 F
5VISO
22 1
0.1 F
AVDD DVDD
11
8
AIN1+
A0
12
7
AIN1A1
27
SCLK
18
28
AIN2+
DOUT
ADS1234
17
5VISO
5VISO
AIN220
REF+
0.1 F
13
19
AIN3+
REF0.1 F
14
23
AIN3GAIN0
24
GAIN1
16
25
AIN4+
SPEED
15
26
PWDN
AIN4AGND DGND
2
21
3.3V
16
10
14
VCC2
VCC1
EN2
EN1
0.1 F
1
7
3
INA
OUTA
4
ISO7641
INB
OUTB
5
12
OUTC
INC
6
11
IND
OUTD
9,15
2,8
GND2
GND1
10
14
VCC2
EN
VCC1
NC
11
12
3.3V
P3.0
DVcc
5
XOUT
P3.1
6
MSP430
XIN
F2132
18
13
P3.7
SOMI
17
P3.6
15
16
P3.4
P3.5
DVss
14
1
7
2
0.1 F
13
16
3.3V
CLK
0.1 F
4
3
OUTA
INA
4
ISO7640
OUTB
INB
12
5
OUTC
INC
11
6
OUTD
IND
9,15
2,8
GND2
GND1
13
Figure 16. Isolated Data Acquisition System for Process Control
9.2.1 Design Requirements
Unlike optocouplers, which require external components to improve performance, provide bias, or limit current,
the ISO764x device only requires two external bypass capacitors to operate.
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Typical Application (continued)
9.2.2 Detailed Design Procedure
2 mm max
from VCC2
2 mm max
from VCC1
ISO7640
0.1 µF
0.1 µF
VCC2
1
16
2
15
INA
3
14
OUTA
INB
4
13
OUTB
INC
5
12
OUTC
IND
6
11
OUTD
7
10
VCC1
GND1
NC
GND2
EN
9
8
GND1
GND2
Figure 17. Typical ISO7640FM Circuit Hookup
2 mm max
from VCC2
2 mm max
from VCC1
ISO7641
0.1 µF
VCC1
0.1 µF
VCC2
1
16
2
15
INA
3
14
OUTA
INB
4
13
OUTB
INC
5
12
OUTD
6
11
7
10
8
9
GND1
GND2
OUTC
IND
EN2
EN1
GND1
GND2
Figure 18. Typical ISO7641FM Circuit Hookup
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Typical Application (continued)
9.2.2.1 Typical Supply Current Equations
(Calculated based on room temperature and typical Silicon process)
ISO7640FM:
At VCC1 = VCC2 = 3.3 V
ICC1 = 0.388 + 0.0312 × f
ICC2 = 3.39 + 0.03561 × f + 0.006588 × f × CL
(1)
(2)
At VCC1 = VCC2 = 5 V
ICC1 = 0.584 + 0.05349 × f
ICC2 = 4.184 + 0.05597 × f + 0.009771 × f × CL
(3)
(4)
ISO7641FM:
At VCC1 = VCC2 = 3.3 V
ICC1 = 1.848 + 0.03233 × f + 0.001645 × f × CL
ICC2 = 3.005 + 0.03459 x f + 0.0049395 × f × CL
(5)
(6)
At VCC1 = VCC2 = 5 V
ICC1 = 2.369 + 0.05385 × f + 0.002448 × f × CL
ICC2 = 3.857 + 0.05506 × f + 0.007348 × f × CL
(7)
(8)
ICC1 and ICC2 are typical supply currents measured in mA; f is data rate measured in Mbps; CL is the capacitive
load on each channel measured in pF.
9.2.3 Application Curves
TA = 25 oC, CL = 15 pF
TA = 25 oC, CL = 15 pF
VCC1 = V CC2 = 5 V
VCC1 = V CC2 = 3.3 V
Pattern: NRZ 216-1
Pattern: NRZ 216-1
Figure 19. Typical Eye Diagram at 150 Mbps,
5-V Operation
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Figure 20. Typical Eye Diagram at 150 Mbps,
3.3-V Operation
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SLLSE89G – SEPTEMBER 2011 – REVISED JANUARY 2015
10 Power Supply Recommendations
To ensure reliable operation at all data rates and supply voltages, a 0.1-μF bypass capacitor is recommended at
input and output supply pins (VCC1 and VCC2). The capacitors should be placed as close to the supply pins as
possible. If only a single primary-side power supply is available in an application, isolated power can be
generated for the secondary-side with the help of a transformer driver such as Texas Instruments' SN6501. For
such applications, detailed power supply design and transformer selection recommendations are available in
SN6501 data sheet (SLLSEA0).
11 Layout
11.1 Layout Guidelines
A minimum of four layers is required to accomplish a low EMI PCB design (see Figure 21). Layer stacking should
be in the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low-frequency
signal layer.
• Routing the high-speed traces on the top layer avoids the use of vias (and the introduction of their
inductances) and allows for clean interconnects between the isolator and the transmitter and receiver circuits
of the data link.
• Placing a solid ground plane next to the high-speed signal layer establishes controlled impedance for
transmission line interconnects and provides an excellent low-inductance path for the return current flow.
• Placing the power plane next to the ground plane creates additional high-frequency bypass capacitance of
approximately 100 pF/in2.
• Routing the slower speed control signals on the bottom layer allows for greater flexibility as these signal links
usually have margin to tolerate discontinuities such as vias.
If an additional supply voltage plane or signal layer is needed, add a second power and ground plane system to
the stack to keep it symmetrical. This makes the stack mechanically stable and prevents it from warping. Also the
power and ground plane of each power system can be placed closer together, thus increasing the high-frequency
bypass capacitance significantly.
NOTE
For detailed layout recommendations, see Digital Isolator Design Guide, SLLA284.
11.2 Layout Example
High-speed traces
10 mils
Ground plane
40 mils
Keep this
space free
from planes,
traces , pads,
and vias
FR-4
0r ~ 4.5
Power plane
10 mils
Low-speed traces
Figure 21. Recommended Layer Stack
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
• Digital Isolator Design Guide, SLLA284
• Transformer Driver for Isolated Power Supplies, SLLSEA0
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 5. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
ISO7640FM
Click here
Click here
Click here
Click here
Click here
ISO7641FM
Click here
Click here
Click here
Click here
Click here
12.3 Trademarks
DeviceNet is a trademark of DeviceNet Open Vendors Association.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
SLLA353 -- Isolation Glossary.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
ISO7640FMDW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
ISO7640FM
ISO7640FMDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
ISO7640FM
ISO7641FMDW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
ISO7641FM
ISO7641FMDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
ISO7641FM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of