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ISO7810DWW

ISO7810DWW

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC16

  • 描述:

    DGTLISO5.7KVGENPURP16SOIC

  • 数据手册
  • 价格&库存
ISO7810DWW 数据手册
Product Folder Sample & Buy Support & Community Tools & Software Technical Documents ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 ISO7810x High-Performance, 8000-VPK Reinforced Single-Channel Digital Isolator 1 Features 3 Description • • • • • The ISO7810x device is a high-performance, singlechannel digital isolator with 8000 VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, CQC, and TUV. The isolator provides high electromagnetic immunity and low emissions at low power consumption, while isolating CMOS or LVCMOS digital I/Os. 1 • • • • • • • • Signaling Rate: Up to 100 Mbps Wide Supply Range: 2.25 V to 5.5 V 2.25 V to 5.5 V Level Translation Wide Temperature Range: –55°C to 125°C Low Power Consumption, Typical 1.8 mA at 1 Mbps Low Propagation Delay: 10.7 ns Typical (5 V Supplies) Industry leading CMTI (Min): ±100 kV/μs Robust Electromagnetic Compatibility (EMC) System-Level ESD, EFT, and Surge Immunity Low Emissions Isolation Barrier Life: > 40 Years SOIC-16 Wide Body (DW) and Extra-Wide Body (DWW) Package Options Safety-Related Certifications: – 8000 VPK Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 – 5.7 kVRMS Isolation for 1 minute per UL 1577 – CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 End Equipment Standards – CQC Certification per GB4943.1-2011 – TUV Certification per EN 61010-1 and EN 60950-1 – All DW Package Certifications Complete; DWW Package Certifications Complete per UL, VDE, and TUV and Planned for CSA and CQC The isolation channel has a logic input and output buffer separated by silicon dioxide (SiO2) insulation barrier. If the input power or signal is lost, the default output is high for the ISO7810 and low for the ISO7810F device. See the Device Functional Modes section for further details. Used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through innovative chip design and layout techniques, electromagnetic compatibility of the ISO7810x device has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance. The ISO7810x device is available in 16pin SOIC wide-body (DW) and extra-wide body (DWW) packages.The DWW package option comes with enable pin which can be used to put the output in high impedance state for multi-master driving applications and to reduce power consumption. Device Information(1) PART NUMBER ISO7810 ISO7810F Industrial Automation Motor Control Power Supplies Solar Inverters Medical Equipment Hybrid Electric Vehicles BODY SIZE (NOM) 10.30 mm × 7.50 mm DWW (16) 10.30 mm × 14.0 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. 2 Applications • • • • • • PACKAGE DW (16) Simplified Schematic VCC1 Isolation Capacitor VCC2 IN OUT EN2 (DWW package only) GND1 GND2 Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 6.12 6.13 6.14 6.15 6.16 6.17 6.18 1 1 1 2 4 5 Absolute Maximum Ratings ..................................... 5 ESD Ratings.............................................................. 5 Recommended Operating Conditions....................... 5 Thermal Information .................................................. 6 Power Rating............................................................. 6 Insulation Characteristics ......................................... 7 Regulatory Information.............................................. 8 Safety Limiting Values .............................................. 8 Electrical Characteristics—5-V Supply ..................... 9 Supply Current Characteristics—5-V Supply .......... 9 Electrical Characteristics—3.3-V Supply .............. 10 Supply Current Characteristics—3.3-V Supply ..... 10 Electrical Characteristics—2.5-V Supply .............. 11 Supply Current Characteristics—2.5-V Supply ..... 11 Switching Characteristics—5-V Supply................. 12 Switching Characteristics—3.3-V Supply.............. 12 Switching Characteristics—2.5-V Supply.............. 13 Insulation Characteristics Curves ......................... 14 6.19 Typical Characteristics .......................................... 15 7 8 Parameter Measurement Information ................ 16 Detailed Description ............................................ 18 8.1 8.2 8.3 8.4 9 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 18 18 19 20 Applications and Implementation ...................... 21 9.1 Application Information............................................ 21 9.2 Typical Application .................................................. 21 10 Power Supply Recommendations ..................... 23 11 Layout................................................................... 24 11.1 Layout Guidelines ................................................. 24 11.2 Layout Example .................................................... 24 12 Device and Documentation Support ................. 25 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 25 25 25 25 25 25 25 13 Mechanical, Packaging, and Orderable Information ........................................................... 26 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (September 2015) to Revision B Page • Changed Features From: Low Power Consumption, Typical 1.8 mA per Channel at 1 Mbps To: Low Power Consumption, Typical 1.8 mA at 1 Mbps................................................................................................................................ 1 • Changed Features From: Low Propagation Delay: 11 ns Typical To: Low Propagation Delay: 10.7 ns Typical ................. 1 • Changed Features From: Safety and Regulatory Approvals To: Safety-Related Certifications ........................................... 1 • Added the extra-wide body package (16 pin SOIC [DWW]) option........................................................................................ 1 • Changed the INA, OUTA, VCCI, and VCCO pin names to IN, OUT, VCC1, and VCC2 (respectively) and updated the pin out drawings, Pin Functions table, and other figures to match ............................................................................................. 4 • Moved Junction temperature From Recommended Operating Conditions To Absolute Maximum Ratings ......................... 5 • Changed the Thermal Information values for the DW package and add the values for the DWW package ........................ 6 • Changed the values in the Power Rating table ..................................................................................................................... 6 • Moved Insulation Characteristics to the Specifications section ............................................................................................. 7 • Changed CIO Specification From: 2 pF To: ~0.75 pF ............................................................................................................ 7 • Moved Regulatory Information to the Specifications section ................................................................................................. 8 • Moved Safety Limiting Values to the Specifications section ................................................................................................. 8 • Changed the minimum CMTI value from 50 to 100 and deleted the maximum value in the 5-V and 3.3-V electrical characteristics tables. Also added VCM to the test conditions ................................................................................................ 9 • Changed the maximum value for the supply current, AC parameter at 100 Mbps in all of the electrical characteristics tables ..................................................................................................................................................................................... 9 • Changed the minimum CMTI value from 70 to 100 and deleted the maximum value in the 2.5-V electrical characteristics table. Also added VCM to the test conditions ................................................................................................ 11 • Added the disable and enable propagation delay parameters to all of the switching characteristics tables ...................... 12 2 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F ISO7810, ISO7810F www.ti.com SLLSEP1B – JULY 2015 – REVISED JUNE 2016 Revision History (continued) • Changed tfs To: tDO in Switching Characteristics—5-V Supply............................................................................................. 12 • Changed tfs To: tDO in Switching Characteristics—3.3-V Supply.......................................................................................... 12 • Changed tfs To: tDO in Switching Characteristics—2.5-V Supply.......................................................................................... 13 • Added the Insulation Characteristics Curves section ........................................................................................................... 14 • Added the lifetime projection curves for the DW and DWW packages in the Insulation Characteristics Curves section.... 14 • Added Figure 15 in the Parameter Measurement Information section ................................................................................ 17 • Changed text "dual-channel digital isolator" To: "single-channel digital isolator" in Application Information ...................... 21 • Changed text "DC-DC converters" To: "transformer driver" in the Typical Application section ........................................... 21 • Changed Figure 20 .............................................................................................................................................................. 21 Changes from Original (July 2015) to Revision A • Page Changed From: 1-page Product Preview To: Production datasheet ..................................................................................... 1 Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F Submit Documentation Feedback 3 ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 www.ti.com 5 Pin Configuration and Functions DW Package 16-Pin SOIC Top View DWW Package 16-Pin SOIC Top View GND1 1 16 GND2 VCC1 1 16 VCC2 GND1 2 15 GND2 15 VCC1 3 14 VCC2 NC 3 IN 4 13 OUT NC 4 NC 5 12 NC IN 5 NC 6 11 NC NC 6 11 NC GND1 7 10 NC NC 7 10 NC NC 8 NC 9 GND2 ISOLATION 2 ISOLATION NC GND1 8 14 NC 13 EN2 12 OUT 9 GND2 Pin Functions PIN NAME EN2 NO. I/O DW DWW — 13 I DESCRIPTION Output enable 2. Output pin on side 2 is enabled when EN2 is high or open and in high-impedance state when EN2 is low. GND1 1, 7 2, 8 — Ground connection for VCC1 GND2 9, 16 9, 15 — Ground connection for VCC2 IN 4 5 I Input channel NC 2, 5, 6, 8, 10, 11, 12, 15 3, 4, 6, 7, 10, 11, 14 — Not connected OUT 13 12 O Output channel VCC1 3 1 — Power supply, side 1 VCC2 14 16 — Power supply, side 2 4 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F ISO7810, ISO7810F www.ti.com SLLSEP1B – JULY 2015 – REVISED JUNE 2016 6 Specifications 6.1 Absolute Maximum Ratings See (1) Supply voltage (2) VCC1, VCC2 Voltage IN, OUT, EN2 MIN MAX –0.5 6 –0.5 VCC + 0.5 UNIT V (3) V Output current, IO –15 15 mA Junction temperature, TJ –55 150 °C Storage temperature, Tstg –65 150 °C (1) (2) (3) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak voltage values. Maximum voltage must not exceed 6 V. 6.2 ESD Ratings VESD (1) (2) Electrostatic discharge VALUE UNIT Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±6000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±1500 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions MIN VCC1, VCC2 IOH Supply voltage NOM 2.25 High-level output current VCC2 = 5 V –4 VCC2 = 3.3 V –2 VCC2 = 2.5 V –1 MAX UNIT 5.5 V mA VCC2 = 5 V 4 VCC2 = 3.3 V 2 IOL Low-level output current VIH High-level input voltage 0.7 × VCC1 VCC1 V VIL Low-level input voltage 0 0.3 × VCC1 V tui Input pulse duration 7 DR Signaling rate 0 TA Ambient temperature VCC2 = 2.5 V mA 1 –55 Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F ns 25 100 Mbps 125 °C Submit Documentation Feedback 5 ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.4 Thermal Information ISO7810x THERMAL METRIC (1) DW (SOIC) DWW (SOIC) 16 PINS 16 PINS UNIT 89 92.2 °C/W RθJA Junction-to-ambient thermal resistance RθJC(top) Junction-to-case(top) thermal resistance 51.5 53.8 °C/W RθJB Junction-to-board thermal resistance 53.6 62.9 °C/W ψJT Junction-to-top characterization parameter 22.5 23.9 °C/W ψJB Junction-to-board characterization parameter 23.1 62.2 °C/W RθJC(bottom) Junction-to-case(bottom) thermal resistance — — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Power Rating PARAMETER PD Maximum power dissipation PD1 Maximum power dissipation by side-1 PD2 Maximum power dissipation by side-2 6 Submit Documentation Feedback TEST CONDITIONS MIN VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, input a 50 MHz 50% duty cycle square wave TYP MAX UNIT 50 mW 12.5 mW 37.5 mW Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F ISO7810, ISO7810F www.ti.com SLLSEP1B – JULY 2015 – REVISED JUNE 2016 6.6 Insulation Characteristics PARAMETER SPECIFICATION TEST CONDITIONS UNIT DW DWW Shortest terminal-to-terminal distance through air >8 >14.5 mm Shortest terminal-to-terminal distance across the package surface >8 >14.5 mm CLR External clearance (1) CPG External creepage DTI Distance through the insulation Minimum internal gap (internal clearance) >21 >21 μm CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112; UL 746A >600 >600 V I I Rated mains voltage ≤ 600 VRMS I–IV I–IV Rated mains voltage ≤ 1000 VRMS I–III I–IV (1) Material group Overvoltage category per IEC 60664-1 DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 (2) VIOTM Maximum transient isolation voltage VTEST = VIOTM t = 60 s (qualification) t= 1 s (100% production) 8000 8000 VPK VIOSM Maximum surge isolation voltage (3) Test method per IEC 60065, 1.2/50 µs waveform, VTEST = 1.6 × VIOSM = 12800 VPK (qualification) 8000 8000 VPK VIORM Maximum repetitive peak isolation voltage 2121 2828 VPK VIOWM Maximum isolation working voltage 1500 2000 VRMS 2121 2828 VDC Method a, After Input/Output safety test subgroup 2/3, VPR = VIORM × 1.2, t = 10 s, Partial discharge < 5 pC 2545 3394 Method a, After environmental tests subgroup 1, VPR = VIORM × 1.6, t = 10 s, Partial Discharge < 5 pC 3394 4525 Method b1,After environmental tests subgroup 1, VPR = VIORM × 1.875, t = 1 s (100% Production test) Partial discharge < 5 pC 3977 5303 VIO = 0.4 × sin (2πft), f = 1 MHz ~0.75 ~0.75 pF >1012 >1012 Ω 11 11 VPR Input-to-output test voltage Time dependent dielectric breakdown (TDDB) test; see Figure 1 and Figure 2 VPK CIO Barrier capacitance, input to output (4) RIO Isolation resistance, input to output (4) VIO = 500 V, TA = 25°C VIO = 500 V, 100°C ≤ TA ≤ max >10 >10 Ω RS Isolation resistance VIO = 500 V at TS >109 >109 Ω Pollution degree 2 2 Climatic category 55/125/21 55/125/21 5700 5700 UL 1577 VISO (1) (2) (3) (4) Withstanding isolation voltage VTEST = VISO = 5700 VRMS, t = 60 s (qualification); VTEST = 1.2 × VISO = 6840 VRMS , t = 1 s (100% production) VRMS Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications. This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. All pins on each side of the barrier tied together creating a two-terminal device. Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F Submit Documentation Feedback 7 ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.7 Regulatory Information DW package certifications are complete. DWW package certifications completed for UL, VDE, and TUV and planned for CSA and CQC. VDE CSA UL Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 and DIN EN 60950-1 (VDE 0805 Teil 1):2011-01 Approved under CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 Recognized under UL 1577 Component Recognition Program Reinforced insulation Maximum transient isolation voltage, 8000 VPK; Maximum repetitive peak isolation voltage, 2121 VPK(DW package), 2828 VPK (DWW package); Maximum surge isolation voltage, 8000 VPK Certificate number: 40040142 Reinforced insulation per CSA 60950-1-07+A1+A2 and IEC 60950-1 2nd Ed., 800 VRMS max working voltage (pollution degree 2, material group I); 2 MOPP (Means of Patient Protection) per CSA 606011:14 and IEC 60601-1 Ed. 3.1, 250 VRMS (354 VPK) max working voltage Master contract number: 220991 Single protection, 5700 VRMS File number: E181974 CQC Certified according to GB 4943.1-2011 TUV Certified according to EN 610101:2010 (3rd Ed) and EN 609501:2006/A11:2009/A1:2010/A12:2011 /A2:2013 5700 VRMS Reinforced insulation per EN 61010-1:2010 (3rd Ed) up to working voltage of 600 VRMS (DW package) and 1000 VRMS (DWW package) Reinforced Insulation, Altitude ≤ 5000 m, Tropical Climate, 250 VRMS maximum 5700 VRMS Reinforced insulation per working voltage EN 609501:2006/A11:2009/A1:2010/A12:2011 /A2:2013 up to working voltage of 800 VRMS (DW package) and 1450 VRMS (DWW package) Certificate number: CQC15001121716 Client ID number: 77311 6.8 Safety Limiting Values Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DW PACKAGE IS Safety input, output, or supply current PS Safety input, output, or total power TS Maximum safety temperature RθJA = 89°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C, see Figure 3 255 RθJA = 89°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C, see Figure 3 390 RθJA = 89°C/W, VI = 2.75 V, TJ = 150°C, TA = 25°C, see Figure 3 511 RθJA = 89°C/W, TJ = 150°C, TA = 25°C, see Figure 5 mA 1404 mW 150 °C DWW PACKAGE IS Safety input, output, or supply current PS Safety input, output, or total power TS Maximum safety temperature RθJA = 92.2°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C, see Figure 4 246 RθJA = 92.2°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C, see Figure 4 377 RθJA = 92.2°C/W, VI = 2.75 V, TJ = 150°C, TA = 25°C, see Figure 4 493 RθJA = 92.2°C/W, TJ = 150°C, TA = 25°C, see Figure 6 mA 1356 mW 150 °C The maximum safety temperature is the maximum junction temperature specified for the device. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information is that of a device installed on a high-K test board for leaded surface mount packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. 8 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F ISO7810, ISO7810F www.ti.com SLLSEP1B – JULY 2015 – REVISED JUNE 2016 6.9 Electrical Characteristics—5-V Supply VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP VCC2 – 0.4 VCC2 – 0.2 MAX UNIT VOH High-level output voltage IOH = –4 mA; see Figure 13 VOL Low-level output voltage IOL = 4 mA; see Figure 13 VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC1 at IN or EN2 IIL Low-level input current VIL = 0 V at IN or EN2 –10 μA CMTI Common-mode transient immunity VI = VCC1 or 0 V, VCM = 1500 V; see Figure 16 100 kV/μs CI Input capacitance (1) (1) 0.2 V 0.4 V 10 μA 0.1 × VCC1 V VI = VCC/2 + 0.4 × sin (2πft), f = 1 MHz, VCC = 5 V 2 pF Measured from input pin to ground. 6.10 Supply Current Characteristics—5-V Supply VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER Supply current - disable (DWW package only) TEST CONDITIONS MIN TYP MAX EN2 = 0 V, VI = 0 V (Devices with suffix F), VI = VCC1 (Devices without suffix F) ICC1 0.6 1.1 ICC2 0.16 0.3 EN2 = 0 V, VI = VCC1 (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 1.8 2.7 ICC2 0.16 0.3 VI = 0 V (Devices with suffix F), VI = VCC1 (Devices without suffix F) ICC1 0.6 1.1 ICC2 0.6 1.1 VI = VCC1 (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 1.8 2.7 ICC2 0.7 1.1 ICC1 1.2 1.9 ICC2 0.6 1.1 ICC1 1.2 1.9 ICC2 1.1 1.6 ICC1 1.3 2 ICC2 5.7 7.3 Supply current - DC signal 1 Mbps Supply current - AC signal SUPPLY CURRENT Input signal switching with square wave clock input; CL = 15 pF 10 Mbps 100 Mbps Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F Submit Documentation Feedback UNIT mA mA mA 9 ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.11 Electrical Characteristics—3.3-V Supply VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP VCC2 – 0.4 VCC2 – 0.2 MAX UNIT VOH High-level output voltage IOH = –2 mA; see Figure 13 VOL Low-level output voltage IOL = 2 mA; see Figure 13 VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC1 at IN or EN2 IIL Low-level input current VIL = 0 V at IN or EN2 –10 μA CMTI Common-mode transient immunity VI = VCC1 or 0 V, VCM = 1500 V; see Figure 16 100 kV/μs 0.2 V 0.4 V 10 μA 0.1 × VCC1 V 6.12 Supply Current Characteristics—3.3-V Supply VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER Supply current - disable (DWW package only) SUPPLY CURRENT TEST CONDITIONS MAX ICC1 0.6 1.1 ICC2 0.16 0.3 EN2 = 0 V, VI = VCC1 (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 1.8 2.7 ICC2 0.16 0.3 VI = 0 V (Devices with suffix F), VI = VCC1 (Devices without suffix F) ICC1 0.6 1.1 ICC2 0.6 1 VI = VCC1 (Devices with suffix F), VI = 0 V(Devices without suffix F) ICC1 1.8 2.7 ICC2 0.6 1.1 ICC1 1.2 1.9 ICC2 0.6 1.1 ICC1 1.2 1.9 ICC2 0.9 1.4 ICC1 1.3 2 ICC2 4.1 5.4 1 Mbps Input signal switching with square wave clock input; CL = 15 pF 10 Mbps 100 Mbps 10 TYP EN2 = 0 V, VI = 0 V (Devices with suffix F), VI = VCC1 (Devices without suffix F) Supply current - DC signal Supply current - AC signal MIN Submit Documentation Feedback UNIT mA mA mA Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F ISO7810, ISO7810F www.ti.com SLLSEP1B – JULY 2015 – REVISED JUNE 2016 6.13 Electrical Characteristics—2.5-V Supply VCC1 = VCC2 = 2.5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP VCC2 – 0.4 VCC2 – 0.2 MAX UNIT VOH High-level output voltage IOH = –1 mA; see Figure 13 VOL Low-level output voltage IOL = 1 mA; see Figure 13 VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC1 at IN or EN2 IIL Low-level input current VIL = 0 V at IN or EN2 –10 μA CMTI Common-mode transient immunity VI = VCC1 or 0 V, VCM = 1500 V; see Figure 16 100 kV/μs 0.2 V 0.4 V 10 μA 0.1 x VCC1 V 6.14 Supply Current Characteristics—2.5-V Supply VCC1 = VCC2 = 2.5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER Supply current, - disable (DWW package only) TEST CONDITIONS MIN TYP MAX EN2 = 0 V, VI = 0 V (Devices with suffix F), VI = VCC1 (Devices without suffix F) ICC1 0.6 1.1 ICC2 0.16 0.3 EN2 = 0 V, VI = VCC1 (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 1.8 2.7 ICC2 0.16 0.3 VI = 0 V (Devices with suffix F), VI = VCCx (Devices without suffix F) ICC1 0.6 1.1 ICC2 0.6 1 VI = VCCx (Devices with suffix F), VI = 0 V(Devices without suffix F) ICC1 1.8 2.7 ICC2 0.6 1.1 ICC1 1.2 1.9 ICC2 0.6 1.1 ICC1 1.2 1.9 ICC2 0.9 1.3 ICC1 1.3 2 ICC2 3.3 4.4 Supply current - DC signal 1 Mbps Supply current - AC signal SUPPLY CURRENT Input signal switching with square wave clock input; CL = 15 pF 10 Mbps 100 Mbps Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F Submit Documentation Feedback UNIT mA mA mA 11 ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.15 Switching Characteristics—5-V Supply VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP MAX 6 10.7 16 ns 0.6 4.6 ns 4.5 ns 2.4 3.9 ns 2.4 3.9 ns tPHZ Disable propagation delay, high-to-high impedance output for ISO7810DWW and ISO7810FDWW 12 20 ns tPLZ Disable propagation delay, low-to-high impedance output for ISO7810DWW and ISO7810FDWW 12 20 ns tPZH Enable propagation delay, high impedance-to-high output ISO7810DWW 10 20 ns ISO7810FDWW 2 2.5 μs Enable propagation delay, high impedance-to-low output ISO7810DWW 2 2.5 μs 10 20 ns 0.2 9 μs tPLH, tPHL Propagation delay time PWD Pulse width distortion (1) |tPHL – tPLH| tsk(pp) Part-to-part skew time (2) tr Output signal rise time tf Output signal fall time tPZL tDO See Figure 13 See Figure 13 See Figure 14 ISO7810FDWW Measured from the time VCC goes below 1.7 V. See Figure 15 Default output delay time from input power loss tie (1) (2) TEST CONDITIONS 16 Time interval error 2 1 – 1 PRBS data at 100 Mbps UNIT ns Also known as pulse skew. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. 6.16 Switching Characteristics—3.3-V Supply VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER tPLH, tPHL TEST CONDITIONS Propagation delay time (1) See Figure 13 PWD Pulse width distortion tsk(pp) Part-to-part skew time (2) |tPHL – tPLH| tr Output signal rise time tf Output signal fall time tPHZ Disable propagation delay, high-to-high impedance output for ISO7810DWW and ISO7810FDWW tPLZ Disable propagation delay, low-to-high impedance output for ISO7810DWW and ISO7810FDWW See Figure 13 tPZH Enable propagation delay, high impedance-to-high output ISO7810DWW tPZL Enable propagation delay, high impedance-to-low output ISO7810DWW See Figure 14 ISO7810FDWW ISO7810FDWW tDO Default output delay time from input power loss Measured from the time VCC goes below 1.7 V. See Figure 15 tie Time interval error 216 – 1 PRBS data at 100 Mbps (1) (2) 12 MIN TYP MAX 6 10.8 16 UNIT ns 0.7 4.7 ns 4.5 ns 1.3 3 ns 1.3 3 ns 17 32 ns 17 32 ns 17 32 ns 2 2.5 μs 2 2.5 μs 17 32 ns 0.2 9 μs 1 ns Also known as pulse skew. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F ISO7810, ISO7810F www.ti.com SLLSEP1B – JULY 2015 – REVISED JUNE 2016 6.17 Switching Characteristics—2.5-V Supply VCC1 = VCC2 = 2.5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP MAX UNIT 7.5 11.7 17.5 ns 0.7 4.7 ns 4.5 ns 1.8 3.5 ns 1.8 3.5 ns tPHZ Disable propagation delay, high-to-high impedance output for ISO7810DWW and ISO7810FDWW 22 45 ns tPLZ Disable propagation delay, low-to-high impedance output for ISO7810DWW and ISO7810FDWW 22 45 ns tPZH Enable propagation delay, high impedance-to-high output ISO7810DWW 18 45 ns ISO7810FDWW 2 2.5 μs tPZL Enable propagation delay, high impedance-to-low output ISO7810DWW 2 2.5 μs 18 45 ns 0.2 9 μs tPLH, tPHL Propagation delay time PWD Pulse width distortion (1) |tPHL – tPLH| tsk(pp) Part-to-part skew time (2) tr Output signal rise time tf Output signal fall time tDO tie (1) (2) TEST CONDITIONS See Figure 13 See Figure 13 See Figure 14 ISO7810FDWW Default output delay time from input power loss Measured from the time VCC goes below 1.7 V. See Figure 15 16 Time interval error 2 – 1 PRBS data at 100 Mbps 1 ns Also known as pulse skew. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7810 ISO7810F Submit Documentation Feedback 13 ISO7810, ISO7810F SLLSEP1B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.18 Insulation Characteristics Curves 1.E+11 87.5% Safety Margin Zone: 2400 VRMS, 63 Years Operating Zone: 2000 VRMS, 34 Years TDDB Line (
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