User's Guide
SLLU240 – March 2016
ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated
Dual-LVDS Buffer Evaluation Module
This user’s guide describes the reinforced, isolated dual-LVDS buffer evaluation module (EVM) for the
ISO7821LL, ISO7821LLS, and ISO7820LL devices. This EVM allows designers to evaluate device
performance for fast development and analysis of isolated systems. The EVM supports evaluation of any
of the Texas Instrument's isolated dual-LVDS buffers in a 16-pin DW package.
CAUTION
This evaluation module is made available for evaluation of isolator parameter
performance only and is not intended for isolation voltage testing. To prevent
damage to the EVM, any voltage applied as a supply or digital input/output
must be maintained within the 0-V to 5.5-V recommended operating range.
1
2
3
4
5
6
7
Contents
Introduction ...................................................................................................................
Overview ......................................................................................................................
Pin Configurations of the ISO7821LL, ISO7821LLS, ISO7820LL Isolated Dual-LVDS Buffers ...................
ISO782xLLx – EVM Board Block Diagram and Image .................................................................
EVM Setup and Operation ..................................................................................................
Bill of Materials ...............................................................................................................
EVM Schematics and Layout ..............................................................................................
2
2
2
3
5
7
7
List of Figures
1
ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated Dual-LVDS Buffer Pin Configurations .............. 2
2
ISO7821LL EVM Configuration ............................................................................................ 3
3
ISO7821LL EVM Photograph .............................................................................................. 4
4
EVM Setup for Operation ................................................................................................... 5
5
Typical Input and Output Waveforms—Differential Probes ............................................................ 6
6
Typical Output Waveforms—Single-Ended Probes ..................................................................... 6
7
Eye Diagram at 100-Mbps Data Rate ..................................................................................... 6
8
Eye Diagram at 150-Mbps Data Rate ..................................................................................... 6
9
ISO7821LL, ISO7820LL, and ISO7821LLS EVM Schematic .......................................................... 8
10
ISO7821LL, ISO7820LL, and ISO7821LLS EVM PCB Layout ........................................................ 9
List of Tables
1
Bill of Materials ............................................................................................................... 7
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1
Introduction
1
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Introduction
This user’s guide describes EVM operation with respect to the ISO7821LL, ISO7821LLS, and ISO7820LL
reinforced, isolated dual-LVDS buffers. However, the EVM can be reconfigured for evaluation of any of
TI’s isolated dual-LVDS buffers in a 16-pin DW package. This guide also describes the available channel
configurations of the ISO7821LL, ISO7821LLS, and ISO7820LL devices, the EVM schematic, and typical
test setup. A typical input and output waveform is also presented.
2
Overview
The ISO7821LL, ISO7821LLS, and ISO7820LL devices are TI’s new digital isolator family capable of
galvanic isolations up to 8000 VPK. These isolators provide high electromagnetic immunity and low
emissions at low-power consumption, while isolating the LVDS bus signal. Each isolation channel has an
LVDS receiver and transmitter separated by a silicon-oxide (SiO2) insulation barrier. Used with isolated
power supplies, these devices block high voltages, isolate grounds, and prevent noise currents on a data
bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.
3
Pin Configurations of the ISO7821LL, ISO7821LLS, ISO7820LL Isolated Dual-LVDS
Buffers
Figure 1 shows the pin configurations for the ISO7821LL, ISO7821LLS, and ISO7820LL isolated dualLVDS buffers.
ISO7821LL
ISO7821LLS
ISO7820LL
16 VCC2
VCC1
1
16 VCC2
GND1
2
15 GND2
GND1 2
15 GND2
INA +
3
14 OUTA +
INA +
3
14 OUTA +
INA ±
4
13 OUTA ±
INA ±
4
12 INB ±
INB ±
5
11 INB +
INB +
6
11 OUTB +
NC
7
10
OUTB ± 5
OUTB + 6
EN1
7
GND1
8
10
EN2
9 GND2
GND1 8
ISOLATION
1
ISOLATION
VCC1
13 OUTA ±
12 OUTB ±
EN2
9 GND2
Figure 1. ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated Dual-LVDS Buffer Pin Configurations
2
ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated Dual-LVDS Buffer
Evaluation Module
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ISO782xLLx – EVM Board Block Diagram and Image
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4
ISO782xLLx – EVM Board Block Diagram and Image
Figure 2 shows the typical board configuration for evaluation of the ISO7821LL isolated dual-LVDS buffer.
VCC1
1
3
Input INA+
R1
100 Ω
Input INA–
4
5
Output OUTB–
R2
100 Ω
Output OUTB+
6
7
2
8
VCC1
VCC2
VCC1
VCC2
INAP
OUTAP
INAM
OUTAM
OUTBM
INBM
OUTBP
INBP
EN1
GND1
GND1
EN2
GND2
GND2
16
14
Output OUTA+
R3
100 Ω
13
Output OUTA–
12
Input INB–
R4
11
100 Ω
Input INB+
10
9
15
VCC2
U1
GND1
GND2
C1
10 µF
C2
1 µF
C6
0.1 µF
C3
0.1 µF
C5
1 µF
C4
10 µF
GND2
GND1
Copyright © 2016, Texas Instruments Incorporated
Figure 2. ISO7821LL EVM Configuration
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ISO782xLLx – EVM Board Block Diagram and Image
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Figure 3 shows a photograph of the EVM.
Figure 3. ISO7821LL EVM Photograph
4
ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated Dual-LVDS Buffer
Evaluation Module
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EVM Setup and Operation
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5
EVM Setup and Operation
This section describes the setup and operation of the EVM for parameter performance evaluation.
Figure 4 shows the configuration for operating the ISO7821LL, ISO7821LLS, and ISO7820LL isolated
dual-LVDS buffer EVM using two power supplies.
R5
0
INA_C_P
TP8
TP2
TP1
VCC1
C8 5pF
J5
1
2
3
4
R9
51.1
C9 5pF
J6
GND1
J7
644695-4
GND1
R10
51.1
C7 5pF
R1
GND1 R6
100
GND1
R7
R8
R2
0
0
VCC1: 3V-5.5V
FnG
GND1
0
INA_C_N
OUTB_C_N
C10
5pF
100
VCC2
R11
51.1
OSC
C11
5pF
C12
5pF
J2
OSC
J10
TP3
1
2
3
4
J9
R12
51.1
TP5
FnG
C6
C5
C4
0.1µF
1µF
10µF
TP6
VCC2
GND2
644695-4
J16
GND1
GND1
GND1
GND2
OUTB_C_P
GND2
J1
VCC2: 3V-5.5V
R13
C13
0
OUTA_C_P
5pF
J13
1
2
3
4
VCC2
R17
51.1
VCC1
C14
1
INA_P
3
INA_N
4
OUTB_N
5
OUTB_P
6
7
TP7
2
8
VCC1
VCC1
VCC2
INAP
OUTAP
INAM
OUTAM
OUTBM
INBM
OUTBP
INBP
EN1
GND1
GND1
EN2
GND2
GND2
5pF
J12
644695-4
16
14
13
C15 5pF
OUTA_P
R3
100
OUTA_N
GND2
R14
R18
51.1
GND2
0
GND2
12
11
INB_N
R4
INB_P
R15
R16
100
INB_C_N
C16
10
OUTA_C_N
0
0
FnG
5pF
J15
TP4
R19
51.1
9
15
C17 5pF
1
2
3
4
J14
J3
U1
C18 5pF
GND2
J8
C1
C2
C3
10µF
1µF
0.1µF
644695-4
R20
51.1
GND1
J11
GND2
J4
GND2
GND2
INB_C_P
OSC
GND2
GND1
GND1
OSC
Copyright © 2016, Texas Instruments Incorporated
OSC = oscilloscope
FnG = function generator
Figure 4. EVM Setup for Operation
To setup the EVM, use the following steps:
Step 1. Connect the VCC1 power supply to J7 and the VCC2 power supply to J16.
Step 2. Set the supply voltages, VCC1 and VCC2, to 5 V and 200-mA compliance.
Step 3. Connect the function generator for the ISO7821LL and ISO7821LLS EVMs to J5 and J15 and
for the ISO7820LL EVM to J5 and J10 on differential inputs (connect the FnG + signal to pin
2 (INx+), the FnG – signal to pin 3 (INx–), and the FnG ground to pin 1 and pin 4).
Step 4. Set the output square wave of the function generator to 50 MHz for the ISO7821LL and
ISO7820LL EVMs and 75 MHz for the ISO7821LLS EVM with a 1.2-V DC bias (unbalanced)
± 400 mVPP. Connect the positive output of the function generator to one differential line and
the negative output to another differential line.
Step 5. Enable both the positive and negative differential outputs of the function generator.
Step 6. Probe (preferably using differential probes) the signals at J1, J2, J3 and J4.
For the ISO7821LL and ISO7821LLS EVM, the differential output is at J2 and J3. For the ISO7820LL
EVM, the differential output is at J3 and J4. The differential output is a 1.2-V DC bias with ±400 mVPP
when measured with single ended probes and is a 0-V DC bias with ±800 mVPP when measured with
differential probes.
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EVM Setup and Operation
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Figure 5 shows the typical waveforms for the channel 1 and channel 2 outputs for the ISO7821LL device
using differential probes. Figure 6 shows the typical waveforms for the channel 1 and channel 2 outputs
for the ISO7821LL device using single-ended probes. Figure 7 shows the typical eye diagram for the
ISO7821LL device at a 100-Mbps data rate. Figure 8 shows the typical eye diagram for the ISO7821LLS
device at a 150-Mbps data rate.
To check the common mode voltage of the 1.2-V DC bias, use the following steps:
• For the ISO7821LL and ISO7821LLS EVMs:
Step 1. Depopulate R2 and R3
Step 2. Populate C10, C11, C12, C13, C14, C15, R7, R8, R11, R12, R13, R14, R17, and R18
Step 3. Probe J9 and J12
• For the ISO7820LL EVM:
Step 1. Depopulate R3 and R4
Step 2. Populate C13, C14, C15, C16, C17, C18, R13, R14, R15, R16, R17, R18, R19, and R20
Step 3. Probe J12 and J14
6
Figure 5. Typical Input and Output
Waveforms—Differential Probes
Figure 6. Typical Output Waveforms—Single-Ended
Probes
Figure 7. Eye Diagram at 100-Mbps Data Rate
Figure 8. Eye Diagram at 150-Mbps Data Rate
ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated Dual-LVDS Buffer
Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
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Bill of Materials
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6
Bill of Materials
Table 1 lists the bill of materials (BOM) for this EVM.
Table 1. Bill of Materials
Designator
Quantity
Description
Value
Package
Reference
Manufacturer
INT009-001 (for
ISO7821LLDWR)
INT009-002 (for
ISO7820LLDWR)
INT009-003 (for
ISO7821LLSDWR)
Any
PCB
1
Printed Circuit Board
H1, H2, H3, H4
4
Bumpon, Hemisphere, 0.44 X 0.20, Clear
440x200 mil
SJ-5303 (CLEAR)
#M
High-Performance, 8000 VPK Reinforced Isolated
Dual LVDS Buffer, DW0016B
DW0016B
ISO7821LLDWR
Texas
Instruments
High-Performance, 8000 VPK Reinforced Isolated
Dual LVDS Buffer, DW0016B
DW0016B
ISO7820LLDWR
Texas
Instruments
High-Performance, 8000 VPK Reinforced Isolated
Dual LVDS Buffer, DW0016B
DW0016B
ISO7821LLSDWR
Texas
Instruments
Header, 100mil,
2x1, Gold, TH
HTSW-102-07-G-S
Samtec
U1
1
J1, J2, J3, J4, J6, J7,
J8, J9, J11, J12, J14,
J16
12
CONN HEADER 2POS .100" T/H GOLD
C7, C8, C9, C10,
C11, C12, C13, C14,
C15, C16, C17, C18
DNP
CAP, CERM, 5 pF, 50 V, ± 5%, C0G/NP0, 0402
5 pF
0402
GRM1555C1H5R0CA01D
MuRata
C2, C5
2
CAP, CERM, 1 µF, 50 V, ± 10%, X5R, 0603
1 µF
0603
GRM188R61H105KAALD
MuRata
C1, C4
2
CAP, CERM, 10 µF, 35 V, ± 10%, X5R, 0805
10 µF
0805
GRM21BR6YA106KE43L
MuRata
FID1, FID2, FID3
0
Fiducial mark. There is nothing to buy or mount.
Fiducial
N/A
N/A
R5, R6
2
RES, 0, 5%, 0.063 W, 0402
0Ω
0402
ERJ-2GE0R00X
Panasonic
R13, R14
0
RES, 0, 5%, 0.063 W, 0402
0Ω
0402
ERJ-2GE0R00X
Panasonic
Panasonic
DNP
RES, 0, 5%, 0.063 W, 0402
0Ω
0402
ERJ-2GE0R00X (for
ISO7821LLDWR and
ISO7821LLSDWR)
2
RES, 0, 5%, 0.063 W, 0402
0Ω
0402
ERJ-2GE0R00X (for
ISO7820LLDWR)
Panasonic
2
RES, 0, 5%, 0.063 W, 0402
0Ω
0402
ERJ-2GE0R00X (for
ISO7821LLDWR and
ISO7821LLSDWR)
Panasonic
DNP
RES, 0, 5%, 0.063 W, 0402
0Ω
0402
ERJ-2GE0R00X (for
ISO7820LLDWR)
Panasonic
R1, R2, R3, R4
4
RES, 100, 1%, 0.063 W, 0402
100 Ω
0402
CRCW0402100RFKED
Vishay-Dale
R9, R10, R11, R12,
R17, R18, R19, R20
DNP
RES, 51.1, 1%, 0.063 W, 0402
51.1 Ω
0402
CRCW040251R1FKED
Vishay-Dale
Header, 100mil,
4x1, Tin, TH
644695-4
TE
Connectivity
0603
06033C104JAT2A
AVX
Test Point,
Miniature, SMT
5019
Keystone
R7, R8
R15, R16
J5, J10, J13, J15
4
CONN HEADER VERT 4POS .100 TIN
C3, C6
2
CAP, CERM, 0.1 µF, 25 V, ± 5%, X7R, 0603
TP1, TP2, TP3, TP4,
TP5, TP6, TP7, TP8
7
PartNumber
8
Test Point, Miniature, SMT
0.1 µF
EVM Schematics and Layout
Separate orderable EVMs are available for each isolated dual-LVDS buffer (ISO7821LL, ISO7821LLS,
and ISO7820LL). The EVMs must be modified only in the placement of the 100-Ω termination resistors at
the input and output (only if needed) of each channel. Figure 9 shows the ISO7821LL, ISO7821LLS, and
ISO7820LL EVM schematic and Figure 10 shows the printed-circuit board (PCB) layout.
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EVM Schematics and Layout
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R5
0
INA_C_P
TP8
TP2
TP1
VCC1
C8 5pF
J5
1
2
3
4
R9
51.1
C9 5pF
J6
GND1
J7
644695-4
GND1
R10
51.1
C7 5pF
R1
GND1 R6
100
VCC1: 3V-5.5V
GND1
0
GND1
R7
R8
R2
0
0
INA_C_N
OUTB_C_N
C10
5pF
100
VCC2
R11
51.1
C11
5pF
C12
5pF
J2
J10
TP3
1
2
3
4
J9
R12
51.1
TP5
C6
C5
C4
0.1µF
1µF
10µF
TP6
VCC2
GND2
644695-4
J16
GND1
GND1
GND1
GND2
OUTB_C_P
GND2
J1
VCC2: 3V-5.5V
R13
C13
0
OUTA_C_P
5pF
J13
1
2
3
4
VCC2
R17
51.1
VCC1
C14
1
INA_P
3
INA_N
4
OUTB_N
5
OUTB_P
6
7
TP7
2
8
VCC1
VCC1
VCC2
INAP
OUTAP
INAM
OUTAM
OUTBM
INBM
OUTBP
INBP
EN1
GND1
GND1
EN2
GND2
GND2
5pF
J12
644695-4
16
14
13
OUTA_P
R3
100
OUTA_N
C15 5pF
GND2
R14
R18
51.1
GND2
0
GND2
11
INB_N
R4
INB_P
10
TP4
12
100
R15
R16
OUTA_C_N
0
0
INB_C_N
C16
5pF
J15
R19
51.1
9
15
C17 5pF
1
2
3
4
J14
J3
U1
C18 5pF
GND2
J8
C1
C2
C3
10µF
1µF
0.1µF
644695-4
R20
51.1
GND1
J11
GND2
J4
GND2
GND2
INB_C_P
GND2
GND1
GND1
Copyright © 2016, Texas Instruments Incorporated
Figure 9. ISO7821LL, ISO7820LL, and ISO7821LLS EVM Schematic
8
ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated Dual-LVDS Buffer
Evaluation Module
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EVM Schematics and Layout
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Figure 10. ISO7821LL, ISO7820LL, and ISO7821LLS EVM PCB Layout
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ISO7821LL, ISO7821LLS, ISO7820LL Reinforced Isolated Dual-LVDS Buffer
Evaluation Module
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9
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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