ISO7831FDWR

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 ISO7831x High-Performance, 8000-VPK Reinforced Triple Digital Isolators 1 Features • • • • • 1 • • • • • • • • Signaling Rate: Up to 100 Mbps Wide Supply Range: 2.25 V to 5.5 V 2.25 V to 5.5 V Level Translation Wide Temperature Range: –55°C to 125°C Low Power Consumption, Typical 1.7 mA per Channel at 1 Mbps Low Propagation Delay: 11 ns Typical (5-V Supplies) Industry leading CMTI (min): ±100 kV/μs Robust Electromagnetic Compatibility (EMC) System-Level ESD, EFT, and Surge Immunity Low Emissions Isolation Barrier Life: > 40 Years SOIC-16 Wide Body (DW) and Extra-Wide Body (DWW) Package Options Safety-Related Certifications: – 8000 VPK Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 – 5.7 kVRMS Isolation for 1 Minute per UL 1577 – CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 End Equipment Standards – CQC Certification per GB4943.1-2011 – TUV Certification per EN 61010-1 and EN 60950-1 – All DW Package Certifications Complete; DWW Package Certifications Complete per UL, VDE, TUV and Planned for CSA and CQC Each isolation channel has a logic input and output buffer separated by silicon dioxide (SiO2) insulation barrier. This device comes with enable pins which can be used to put the respective outputs in high impedance for multi-master driving applications and to reduce power consumption. The ISO7831x device has two forward and one reverse-direction channels. If the input power or signal is lost, the default output is high for the ISO7831 device and low for the ISO7831F device. See Device Functional Modes for further details. Used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through innovative chip design and layout techniques, electromagnetic compatibility of ISO7831x has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance. ISO7831x is available in a 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages. Device Information(1) PART NUMBER PACKAGE ISO7831 ISO7831F BODY SIZE (NOM) DW (16) 10.30 mm × 7.50 mm DWW (16) 10.30 mm × 14.0 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic VCCI Isolation Capacitor VCCO INx OUTx 2 Applications • • • • • • Industrial Automation Motor Control Power Supplies Solar Inverters Medical Equipment Hybrid Electric Vehicles ENx GNDI GNDO Copyright © 2016, Texas Instruments Incorporated VCCI and GNDI are supply and ground connections respectively for the input channels. VCCO and GNDO are supply and ground connections respectively for the output channels. 3 Description The ISO7831x device is a high-performance, 3channel digital isolator with 8000-VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, TUV and CQC. The isolator provides high electromagnetic immunity and low emissions at low power consumption, while isolating CMOS or LVCMOS digital I/Os. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 6.12 6.13 6.14 6.15 6.16 6.17 6.18 1 1 1 2 4 5 Absolute Maximum Ratings ...................................... 5 ESD Ratings.............................................................. 5 Recommended Operating Conditions....................... 5 Thermal Information .................................................. 6 Power Rating............................................................. 6 Insulation Characteristics .......................................... 7 Regulatory Information.............................................. 8 Safety Limiting Values .............................................. 8 Electrical Characteristics—5-V Supply ..................... 9 Supply Current Characteristics—5-V Supply .......... 9 Electrical Characteristics—3.3-V Supply .............. 10 Supply Current Characteristics—3.3-V Supply ..... 10 Electrical Characteristics—2.5-V Supply .............. 11 Supply Current Characteristics—2.5-V Supply ..... 11 Switching Characteristics—5-V Supply................. 12 Switching Characteristics—3.3-V Supply.............. 12 Switching Characteristics—2.5-V Supply.............. 13 Insulation Characteristics Curves ......................... 14 6.19 Typical Characteristics .......................................... 15 7 8 Parameter Measurement Information ................ 16 Detailed Description ............................................ 18 8.1 8.2 8.3 8.4 9 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 18 18 19 20 Application and Implementation ........................ 21 9.1 Application Information............................................ 21 9.2 Typical Application .................................................. 21 10 Power Supply Recommendations ..................... 23 11 Layout................................................................... 24 11.1 Layout Guidelines ................................................. 24 11.2 Layout Example .................................................... 24 12 Device and Documentation Support ................. 25 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 25 25 25 25 25 25 25 13 Mechanical, Packaging, and Orderable Information ........................................................... 26 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (September 2015) to Revision B Page • Changed Features From: Low Power Consumption, Typical 2.5 mA per Channel at 1 Mbps To: Low Power Consumption, Typical 1.7 mA per Channel at 1 Mbps .......................................................................................................... 1 • Changed the isolation barrier life from > 25 years to > 40 years in the Features section ..................................................... 1 • Changed Features From: Safety and Regulatory Approvals To: Safety-Related Certifications ........................................... 1 • Updated the status of the certifications throughout the document ........................................................................................ 1 • Added the extra-wide body package (16 pin SOIC [DWW]) option........................................................................................ 1 • Changed the values for the DW package in the Thermal Information table ......................................................................... 6 • Moved Insulation Characteristics to the Specifications section.............................................................................................. 7 • Changed CIO Specification From: 2 pF To: ~1 pF ................................................................................................................. 7 • Added the climatic category parameter to the Insulation Characteristics table .................................................................... 7 • Moved Regulatory Information to the Specifications section.................................................................................................. 8 • Moved Safety Limiting Values to the Specifications section .................................................................................................. 8 • Changed the test conditions and values for the DW package in the Safety Limiting Values table........................................ 8 • Changed VCCO to VCCI in the minimum value for the input threshold voltage hysteresis parameter in the electrical characteristics tables .............................................................................................................................................................. 9 • Added the VCM test condition to the CMTI parameter in the electrical characteristics tables. Also updated the minimum value from 70 to 100 and deleted the maximum value of 100................................................................................ 9 • Changed tfs To: tDO in Switching Characteristics—5-V Supply............................................................................................. 12 • Changed tfs To: tDO in Switching Characteristics—3.3-V Supply.......................................................................................... 12 • Changed tfs To: tDO in Switching Characteristics—2.5-V Supply.......................................................................................... 13 • Added the lifetime projection graphs for DW and DWW packages to the Insulation Characteristics Curves section ........ 14 2 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F ISO7831, ISO7831F www.ti.com SLLSEP8B – JULY 2015 – REVISED JUNE 2016 Revision History (continued) • Changed the thermal derating curves in the Safety Limiting Values section ....................................................................... 14 • Changed 2.7 V To: 1.7 V, fs high To: default high, and fs low To: default low in Figure 15 ............................................... 17 Changes from Original (July 2015) to Revision A • Page Changed From: 1-page Product Preview To: Production datasheet...................................................................................... 1 Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F Submit Documentation Feedback 3 ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 www.ti.com 5 Pin Configuration and Functions DW and DWW Packages 16-Pin SOIC Top View 1 16 VCC2 GND1 2 15 GND2 INA 3 INB 4 14 OUTA ISOLATION VCC1 OUTC 5 13 OUTB 12 INC NC 6 11 NC EN1 7 10 EN2 GND1 8 9 GND2 Pin Functions PIN NAME NO. I/O DESCRIPTION EN1 7 I Output enable 1. Output pin on side 1 is enabled when EN1 is high or open and in highimpedance state when EN1 is low. EN2 10 I Output enable 2. Output pins on side 2 are enabled when EN2 is high or open and in highimpedance state when EN2 is low. GND1 2, 8 — Ground connection for VCC1 GND2 9, 15 — Ground connection for VCC2 INA 3 I Input, channel A INB 4 I Input, channel B INC 12 I Input, channel C OUTA 14 O Output, channel A OUTB 13 O Output, channel B OUTC 5 O Output, channel C 6, 11 — Not connected VCC1 1 — Power supply, side 1 VCC2 16 — Power supply, side 2 NC 4 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F ISO7831, ISO7831F www.ti.com SLLSEP8B – JULY 2015 – REVISED JUNE 2016 6 Specifications 6.1 Absolute Maximum Ratings See (1) VCC1 VCC2 Supply voltage (2) MIN MAX –0.5 6 UNIT V V Voltage at INx, OUTx, or ENx –0.5 IO Output current –15 15 mA TJ Junction temperature –55 150 °C Tstg Storage temperature –65 150 °C (1) (2) (3) VCCx + 0.5 (3) V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak voltage values. Maximum voltage must not exceed 6 V 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) UNIT ±6000 Charged device model (CDM), per JEDEC specification JESD22-C101 (2) V ±1500 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions MIN VCC1, VCC2 IOH IOL Supply voltage High-level output current Low-level output current NOM 2.25 VCCO (1) =5V –4 VCCO (1) = 3.3 V –2 VCCO (1) = 2.5 V –1 MAX 5.5 4 VCCO (1) = 3.3 V 2 VCCO V mA VCCO (1) = 5 V (1) UNIT = 2.5 V mA 1 VIH High-level input voltage 0.7 × VCCI (1) VCCI (1) V VIL Low-level input voltage 0 0.3 × VCCI (1) V DR Signaling rate TA Ambient temperature (1) 0 –55 25 100 Mbps 125 °C VCCI = Input-side VCC; VCCO = Output-side VCC. Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F Submit Documentation Feedback 5 ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.4 Thermal Information ISO7831 THERMAL METRIC (1) DW (SOIC) DWW (SOIC) 16 PINS 16 PINS UNIT RθJA Junction-to-ambient thermal resistance 81.1 83.4 °C/W RθJC(top) Junction-to-case(top) thermal resistance 43.8 45.2 °C/W RθJB Junction-to-board thermal resistance 45.7 54.1 °C/W ψJT Junction-to-top characterization parameter 17.0 17.6 °C/W ψJB Junction-to-board characterization parameter 45.2 53.3 °C/W RθJC(bottom) Junction-to-case(bottom) thermal resistance — — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Power Rating PARAMETER PD Maximum power dissipation PD1 Maximum power dissipation by side-1 PD2 Maximum power dissipation by side-2 6 Submit Documentation Feedback TEST CONDITIONS MIN VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, input a 50 MHz 50% duty cycle square wave TYP MAX UNIT 150 mW 50 mW 100 mW Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F ISO7831, ISO7831F www.ti.com SLLSEP8B – JULY 2015 – REVISED JUNE 2016 6.6 Insulation Characteristics PARAMETER TEST CONDITIONS SPECIFICATION DW DWW UNIT External clearance (1) Shortest terminal-to-terminal distance through air >8 >14.5 mm CPG External creepage (1) Shortest terminal-to-terminal distance across the package surface >8 >14.5 mm DTI Distance through the insulation Minimum internal gap (internal clearance) >21 >21 μm CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112; UL 746A >600 >600 V I I Rated mains voltage ≤ 600 VRMS I–IV I–IV Rated mains voltage ≤ 1000 VRMS I–III I–IV Maximum isolation working voltage Time dependent dielectric breakdown (TDDB) Test; see Figure 1 and Figure 2 1500 2000 VRMS 2121 2828 VDC VIOTM Maximum transient isolation voltage VTEST = VIOTM t = 60 s (qualification) t= 1 s (100% production) 8000 8000 VPK VIOSM Maximum surge isolation voltage for reinforced insulation (3) Test method per IEC 60065, 1.2/50 µs waveform, VTEST = 1.6 × VIOSM = 12800 VPK (qualification) 8000 8000 VPK VIORM Maximum repetitive peak isolation voltage 2121 2828 VPK Method a, After Input/Output safety test subgroup 2/3, VPR = VIORM × 1.2, t = 10 s, Partial discharge < 5 pC 2545 3394 Method a, After environmental tests subgroup 1, VPR = VIORM × 1.6, t = 10 s, Partial Discharge < 5 pC 3394 4525 Method b1, VPR = VIORM × 1.875, t = 1 s (100% Production test) Partial discharge < 5 pC 3977 5303 ~1 ~1 CLR Material group Overvoltage category per IEC 60664-1 DIN V VDE V 0884–10 (VDE V 0884–10):2006-12 (2) VIOWM VPR Input-to-output test voltage Barrier capacitance, input to output (4) CIO RIO Isolation resistance, input to output (4) RS Isolation resistance VIO = 0.4 × sin (2πft), f = 1 MHz VIO = 500 V, TA = 25°C 12 >10 11 VPK pF 12 Ω 11 >10 VIO = 500 V, 100°C ≤ TA ≤ max >10 >10 Ω VIO = 500 V at TS >109 >109 Ω Pollution degree 2 2 Climatic category 55/125/21 55/125/21 5700 5700 UL 1577 VISO (1) (2) (3) (4) Withstanding isolation voltage VTEST = VISO = 5700 VRMS, t = 60 s (qualification), VTEST = 1.2 × VISO = 6840 VRMS, t = 1 s (100% production) VRMS Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. All pins on each side of the barrier tied together creating a two-terminal device. Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F Submit Documentation Feedback 7 ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.7 Regulatory Information All DW package certifications are complete. DWW package certifications are complete for UL, VDE and TUV and planned for CSA and CQC. VDE Certified according to DIN V VDE V 0884–10 (VDE V 0884–10):2006-12 and DIN EN 60950-1 (VDE 0805 Teil 1):2011-01 Reinforced insulation Maximum transient isolation voltage, 8000 VPK; Maximum repetitive peak isolation voltage, 2121 VPK (DW), 2828 VPK (DWW); Maximum surge isolation voltage, 8000 VPK Certificate number: 40040142 CSA UL Approved under CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 Reinforced insulation per CSA 60950-1-07+A1+A2 and IEC 60950-1 2nd Ed., 800 VRMS (DW) and 1450 VRMS (DWW) maximum working voltage (pollution degree 2, material group I); Certified according to UL 1577 Component Recognition Program Certified according to GB 4943.1-2011 Single protection, 5700 VRMS Reinforced Insulation, Altitude ≤ 5000 m, Tropical Climate, 250 VRMS maximum working voltage File number: E181974 Certificate number: CQC15001121716 2 MOPP (Means of Patient Protection) per CSA 606011:14 and IEC 60601-1 Ed. 3.1, 250 VRMS (354 VPK) maximum working voltage Master contract number: 220991 CQC TUV Certified according to EN 61010-1:2010 (3rd Ed) and EN 609501:2006/A11:2009/A1:2010/ A12:2011/A2:2013 5700 VRMS Reinforced insulation per EN 61010-1:2010 (3rd Ed) up to working voltage of 600 VRMS (DW package) and 1000 VRMS (DWW package) 5700 VRMS Reinforced insulation per EN 609501:2006/A11:2009/A1:2010/ A12:2011/A2:2013 up to working voltage of 800 VRMS (DW package) and 1450 VRMS (DWW package) Client ID number: 77311 6.8 Safety Limiting Values Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DW PACKAGE IS Safety input, output, or supply current RθJA = 81.1°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C, see Figure 3 280 RθJA = 81.1°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C, see Figure 3 428 RθJA = 81.1°C/W, VI = 2.75 V, TJ = 150°C, TA = 25°C, see Figure 3 560 PS Safety input, output, or total RθJA = 81.1°C/W, TJ = 150°C, TA = 25°C, see Figure 5 power TS Maximum safety temperature mA 1541 mW 150 °C DWW PACKAGE IS Safety input, output, or supply current RθJA = 83.4°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C, see Figure 4 273 RθJA = 83.4°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C, see Figure 4 416 RθJA = 83.4°C/W, VI = 2.75 V, TJ = 150°C, TA = 25°C, see Figure 4 545 PS Safety input, output, or total RθJA = 83.4°C/W, TJ = 150°C, TA = 25°C, see Figure 6 power TS Maximum safety temperature mA 1499 mW 150 °C The maximum safety temperature is the maximum junction temperature specified for the device. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information is that of a device installed on a high-K test board for leaded surface mount packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. 8 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F ISO7831, ISO7831F www.ti.com SLLSEP8B – JULY 2015 – REVISED JUNE 2016 6.9 Electrical Characteristics—5-V Supply VCC1 = VCC2 = 5 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP – 0.4 VCCO – 0.2 MAX UNIT VOH High-level output voltage IOH = –4 mA; see Figure 13 VOL Low-level output voltage IOL = 4 mA; see Figure 13 VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCCI at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx –10 μA CMTI Common-mode transient immunity VI = VCCI or 0 V, VCM = 1500 V; see Figure 16 100 kV/μs CI Input capacitance (1) (2) (2) VCCO (1) 0.2 0.1 × VCCI V 0.4 V (1) V 10 VI = VCC / 2 + 0.4 × sin (2πft), f = 1 MHz, VCC =5V μA 2 pF VCCI = Input-side VCC; VCCO = Output-side VCC. Measured from input pin to ground. 6.10 Supply Current Characteristics—5-V Supply VCC1 = VCC2 = 5 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER Supply current - disable Supply current - DC signal SUPPLY CURRENT TEST CONDITIONS TYP MAX EN1 = EN2 = 0 V, VI = 0 V (Devices with suffix F), VI = VCCI (Devices without suffix F) ICC1 1 1.6 ICC2 0.8 1.3 EN2 = 0 V, VI = VCCI (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 3.3 4.8 ICC2 2 2.9 VI = 0 V (Devices with suffix F), VI = VCCI (Devices without suffix F) ICC1 1.4 2.3 ICC2 1.7 2.6 VI = VCCI (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 3.8 5.6 ICC2 3 4.3 ICC1 2.6 4 ICC2 2.4 3.6 ICC1 3.2 4.5 ICC2 3.4 4.6 ICC1 8.7 10.5 ICC2 13.2 15.8 1 Mbps Supply current - AC signal MIN All channels switching with square wave clock input; CL = 15 pF 10 Mbps 100 Mbps Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F UNIT Submit Documentation Feedback mA 9 ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.11 Electrical Characteristics—3.3-V Supply VCC1 = VCC2 = 3.3 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP – 0.4 VCCO – 0.2 MAX UNIT VOH High-level output voltage IOH = –2 mA; see Figure 13 VOL Low-level output voltage IOL = 2 mA; see Figure 13 VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCCI at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx –10 μA CMTI Common-mode transient immunity VI = VCCI or 0 V, VCM = 1500 V; see Figure 16 100 kV/μs (1) VCCO (1) 0.2 0.1 × VCCI V 0.4 (1) V V 10 μA VCCI = Input-side VCC; VCCO = Output-side VCC. 6.12 Supply Current Characteristics—3.3-V Supply VCC1 = VCC2 = 3.3 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER Supply current - disable Supply current - DC signal SUPPLY CURRENT TEST CONDITIONS MAX ICC1 1 1.6 ICC2 0.8 1.3 EN1 = EN2 = 0 V, VI = VCCI (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 3.3 4.8 ICC2 1.9 2.9 VI = 0 V (Devices with suffix F), VI = VCCI (Devices without suffix F) ICC1 1.4 2.3 ICC2 1.7 2.6 VI = VCCI (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 3.8 5.6 ICC2 2.9 4.3 ICC1 2.6 4 ICC2 2.4 3.5 ICC1 3 4.3 ICC2 3.1 4.3 ICC1 6.9 8.3 ICC2 10.1 12.2 All channels switching with square wave clock input; CL = 15 pF 10 Mbps 100 Mbps 10 TYP EN1 = EN2 = 0 V, VI = 0 V (Devices with suffix F), VI = VCCI (Devices without suffix F) 1 Mbps Supply current - AC signal MIN Submit Documentation Feedback UNIT mA Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F ISO7831, ISO7831F www.ti.com SLLSEP8B – JULY 2015 – REVISED JUNE 2016 6.13 Electrical Characteristics—2.5-V Supply VCC1 = VCC2 = 2.5 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP – 0.4 VCCO – 0.2 MAX UNIT VOH High-level output voltage IOH = –1 mA; see Figure 13 VOL Low-level output voltage IOL = 1 mA; see Figure 13 VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCCI at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx –10 μA CMTI Common-mode transient immunity VI = VCCI or 0 V, VCM = 1500 V; see Figure 16 100 kV/μs (1) VCCO (1) 0.2 0.1 × VCCI V 0.4 V (1) V 10 μA VCCI = Input-side VCC; VCCO = Output-side VCC. 6.14 Supply Current Characteristics—2.5-V Supply VCC1 = VCC2 = 2.5 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER SUPPLY CURRENT TEST CONDITIONS MAX ICC1 0.9 1.6 ICC2 0.8 1.3 EN1 = EN2 = 0 V, VI = VCCI (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 3.3 4.8 ICC2 1.9 2.9 VI = 0 V (Devices with suffix F), VI = VCCI (Devices without suffix F) ICC1 1.4 2.3 ICC2 1.7 2.6 VI = VCCI (Devices with suffix F), VI = 0 V (Devices without suffix F) ICC1 3.8 5.6 ICC2 2.9 4.3 ICC1 2.6 4 ICC2 2.3 3.5 ICC1 2.9 4.3 ICC2 2.9 4.1 ICC1 5.8 7.2 ICC2 8.2 10 1 Mbps Supply current - AC signal TYP EN1 = EN2 = 0 V, VI = 0 V (Devices with suffix F), VI = VCCI (Devices without suffix F) Supply current - disable Supply current - DC signal MIN All channels switching with square wave clock input; CL = 15 pF 10 Mbps 100 Mbps Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F UNIT Submit Documentation Feedback mA 11 ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.15 Switching Characteristics—5-V Supply VCC1 = VCC2 = 5 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP MAX 6 11 16 ns 0.55 4.1 ns 2.5 ns 4.5 ns 1.7 3.9 ns 1.9 3.9 ns tPHZ Disable propagation delay, high-to-high impedance output 12 20 ns tPLZ Disable propagation delay, low-to-high impedance output 12 20 ns 10 20 ns 2 2.5 μs Enable propagation delay, high impedance-to-low output for ISO7831 2 2.5 μs Enable propagation delay, high impedance-to-low output for ISO7831F 10 20 ns 0.2 9 μs tPLH, tPHL Propagation delay time PWD Pulse width distortion (1) |tPHL – tPLH| tsk(o) Channel-to-channel output skew time (2) tsk(pp) Part-to-part skew time (3) tr Output signal rise time tf Output signal fall time Same-direction channels See Figure 13 Enable propagation delay, high impedance-to-high output for ISO7831F tPZL tDO Default output delay time from input power loss tie (3) See Figure 13 Enable propagation delay, high impedance-to-high output for ISO7831 tPZH (1) (2) TEST CONDITIONS See Figure 14 Measured from the time VCC goes below 1.7 V. See Figure 15 16 Time interval error UNIT 2 0.90 – 1 PRBS data at 100 Mbps ns Also known as pulse skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. 6.16 Switching Characteristics—3.3-V Supply VCC1 = VCC2 = 3.3 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP MAX 6 10.8 16 ns 0.7 4.2 ns 2.2 ns 4.5 ns 0.8 3 ns 0.8 3 ns tPHZ Disable propagation delay, high-to-high impedance output 17 32 ns tPLZ Disable propagation delay, low-to-high impedance output 17 32 ns 17 32 ns 2 2.5 μs Enable propagation delay, high impedance-to-low output for ISO7831 2 2.5 μs Enable propagation delay, high impedance-to-low output for ISO7831F 17 32 ns 0.2 9 μs tPLH, tPHL Propagation delay time PWD Pulse width distortion (1) |tPHL – tPLH| tsk(o) Channel-to-channel output skew time (2) tsk(pp) Part-to-part skew time (3) tr Output signal rise time tf Output signal fall time tPZH tPZL tDO tie (1) (2) (3) 12 TEST CONDITIONS See Figure 13 Same-direction channels See Figure 13 Enable propagation delay, high impedance-to-high output for ISO7831 Enable propagation delay, high impedance-to-high output for ISO7831F Default output delay time from input power loss Time interval error UNIT See Figure 14 Measured from the time VCC goes below 1.7 V. See Figure 15 16 2 – 1 PRBS data at 100 Mbps 0.91 ns Also known as pulse skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F ISO7831, ISO7831F www.ti.com SLLSEP8B – JULY 2015 – REVISED JUNE 2016 6.17 Switching Characteristics—2.5-V Supply VCC1 = VCC2 = 2.5 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP MAX UNIT 7.5 11.7 17.5 ns 0.66 4.2 ns 2.2 ns 4.5 ns 1 3.5 ns 1.2 3.5 ns tPHZ Disable propagation delay, high-to-high impedance output 22 45 ns tPLZ Disable propagation delay, low-to-high impedance output 22 45 ns 18 45 ns 2 2.5 μs Enable propagation delay, high impedance-to-low output for ISO7831 2 2.5 μs Enable propagation delay, high impedance-to-low output for ISO7831F 18 45 ns 0.2 9 μs tPLH, tPHL Propagation delay time PWD Pulse width distortion (1) |tPHL – tPLH| tsk(o) Channel-to-channel output skew time (2) tsk(pp) Part-to-part skew time (3) tr Output signal rise time tf Output signal fall time tPZH tPZL tDO tie (1) (2) (3) TEST CONDITIONS See Figure 13 Same-direction Channels See Figure 13 Enable propagation delay, high impedance-to-high output for ISO7831 Enable propagation delay, high impedance-to-high output for ISO7831F Default output delay time from input power loss See Figure 14 Measured from the time VCC goes below 1.7 V. See Figure 15 16 Time interval error 2 – 1 PRBS data at 100 Mbps 0.91 ns Also known as pulse skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: ISO7831 ISO7831F Submit Documentation Feedback 13 ISO7831, ISO7831F SLLSEP8B – JULY 2015 – REVISED JUNE 2016 www.ti.com 6.18 Insulation Characteristics Curves 1.E+11 87.5% Safety Margin Zone: 2400 VRMS, 63 Years Operating Zone: 2000 VRMS, 34 Years TDDB Line (