ISOW1044
SLLSFF7A – MAY 2021 – REVISED DECEMBER 2021
ISOW1044 Isolated CAN FD Transceiver with Integrated Low-Emissions, Low-Noise,
High-Efficiency DC-DC Converter
– UL 1577 component recognition program
– IEC 62368-1, IEC 61010-1, IEC 60601-1 and
GB 4943.1-2011 certifications
1 Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Meets the requirements of ISO 11898-2:2016
physical layer standards
– Support of Classical CAN: 1 Mbps
– Optimized for CAN FD: 2 and 5 Mbps
Integrated DC-DC converter with low-emissions,
low-noise
– Meets CISPR 32 and EN 55032 Class B with
greater than 6 dB margin on a two-layer PCB
– Low frequency power converter at 25 MHz
enabling low noise performance
Additional 10 Mbps GPIO channel
High efficiency output power
– Typical efficiency: 47%
– Isolated output voltage accuracy: ± 5%
– Additional output current: 20 mA
Independent power supply for CAN & DC-DC
– Logic supply (VIO): 1.71 V to 5.5 V
– Power converter supply ( VDD): 4.5 V to 5.5 V
Fault-Protected CAN FD Transceiver
– DC Bus fault protection voltage: ± 58V
– Receiver common mode input voltage: ±12 V
– Remote wakeup via BUS wake-up pattern
Typical loop delay: 167 ns
Reinforced and Basic isolation options
High CMTI: 100-kV/µs (typical)
High ESD bus protection w.r.t GND2
– HBM ESD: ±12 kV
– IEC 61000-4-2 contact discharge: ±8 kV
Operating temperature range: -40°C to 125°C
Current limit and thermal shutdown
20-pin wide SOIC package
2 Applications
•
•
•
•
•
Factory Automation
Building Automation
Industrial Transport
Solar Inverters, Protection Relay
Motor Drives
3 Description
The ISOW1044 device is a galvanically-isolated
controller area network (CAN) transceiver with a
built-in isolated DC-DC converter that eliminates the
need for a separate isolated power supply in spaceconstrained isolated designs. The low-emissions,
isolated DC-DC meets CISPR 32 radiated emissions
Class B standard with just two ferrite beads on
a simple two-layer PCB. Additional 20 mA output
current can be used to power other circuits on the
board. An integrated 10 Mbps GPIO channel is
available and can help remove an additional digital
isolator or optocoupler for diagnotstics, LED indication
or supply monitoring.
Device Information
Safety-Related Certifications planned:
– VDE Reinforced and Basic insulation per DIN
VDE V 0884-11:2017-01
FEATURE
ISOW1044
ISOW1044B
Protection Level
Reinforced
Basic
Surge Test Voltage
10 kVPK
7.8 kVPK
Isolation Rating
5000 VRMS
5000 VRMS
Working Voltage
1000 VRMS/1500
VPK
1000 VRMS/1500 VPK
Package
DFM (20)
DFM (20)
Body Size (Nom)
12.83mm × 7.5 mm
12.83mm × 7.5 mm
VCC
VIO
MCU
TXD
STB
RXD
IN
VISOIN
CANH
Sign al
Isol atio n
Sign al
Isol atio n
CAN
GNDIO
CANL
Must be connected on PCB,
not connected internally
CAN
BUS
OUT
GISOIN
VDD
VISOOU T
DC-DC
Primary
DC-DC
Second ary
GND2
GND1
Gal van ic Isola tion
Bar rier
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
ISOW1044
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SLLSFF7A – MAY 2021 – REVISED DECEMBER 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Description Continued.................................................... 2
6 Device Comparison Table ..............................................2
7 Pin Configuration and Functions...................................3
8 Specifications.................................................................. 5
8.1 Absolute Maximum Ratings........................................ 5
8.2 ESD Ratings............................................................... 5
8.3 Recommended Operating Conditions.........................5
8.4 ThermalInformation.....................................................6
8.5 Power Ratings.............................................................6
8.6 Insulation Specifications............................................. 7
8.7 Safety-Related Certifications...................................... 8
8.8 Safety Limiting Values.................................................8
8.9 Electrical Characteristics.............................................9
8.10 Supply Current Characteristics............................... 12
8.11 Switching Characteristics........................................ 13
8.12 Insulation Characteristics Curves........................... 14
8.13 Typical Characteristics............................................ 15
9 Parameter Measurement Information.......................... 18
10 Detailed Description....................................................22
10.1 Overview................................................................. 22
10.2 Power Isolation....................................................... 22
10.3 Signal Isolation........................................................22
10.4 CAN Transceiver.....................................................22
10.5 Functional Block Diagram....................................... 24
10.6 Feature Description.................................................24
10.7 Device Functional Modes........................................28
10.8 Device I/O Schematics............................................30
11 Application and Implementation................................ 31
11.1 Application Information............................................31
11.2 Typical Application.................................................. 31
12 Power Supply Recommendations..............................35
13 Layout...........................................................................36
13.1 Layout Guidelines................................................... 36
13.2 Layout Example...................................................... 36
14 Device and Documentation Support..........................37
14.1 Documentation Support.......................................... 37
14.2 Receiving Notification of Documentation Updates..37
14.3 Support Resources................................................. 37
14.4 Trademarks............................................................. 37
14.5 Electrostatic Discharge Caution..............................37
14.6 Glossary..................................................................37
15 Mechanical, Packaging, and Orderable
Information.................................................................... 37
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (March 2021) to Revision A (December 2021)
Page
• Updated device status to Production status....................................................................................................... 1
5 Description Continued
The device supports both classical CAN and CAN FD networks up to 5 Megabits per second (Mbps) data rate. It
offers ±58-V DC bus fault protection and ±12-V common-mode voltage range. Both signal and power paths are
5-kVRMS isolated per UL1577 and are qualified for reinforced and basic isolation per VDE, CSA, TUV and CQC.
The bus pins of these devices can endure up to 8 kV of IEC 61000-4-2 electrostatic discharge (ESD),.
The ISOW1044 device can operate from a single supply voltage of 4.5 V to 5.5 V by connecting VIO and VDD
together on PCB. If lower logic levels are required, these devices support 1.71 V to 5.5 V logic supply (VIO)
that can be independent from the power converter supply (VDD) of 4.5 V to 5.5 V. This device supports a wide
operating ambient temperature range from –40°C to +125°C and are available in 20-pin DFM (SOIC-20 footprint
compatible package) offering a minimum of 8-mm creepage and clearance.
The ISOW1044 supports a standby mode and wake over CAN compliant to the ISO 11898-2:2016 defined wakeup pattern (WUP). The device also includes protection and diagnostic features supporting thermal-shutdown
(TSD), TXD dominant time-out (DTO) and supply undervoltage detection.
6 Device Comparison Table
2
PART NUMBER
ISOLATION
PACKAGE
BODY SIZE (NOM)
ISOW1044
Reinforced
20-DFM (SOIC)
12.83 mm x 7.5 mm
ISOW1044B
Basic
20-DFM (SOIC)
12.83 mm x 7.5 mm
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7 Pin Configuration and Functions
1
20
VIS OIN
IN
2
19
CANH
TXD
3
18
CANL
STB
4
17
GISOIN
RXD
5
16
GISOIN
GNDIO
6
15
GISOIN
NC
7
14
OUT
EN/FLT
8
13
VSIN
VDD
9
12
VIS OOUT
10
11
GND2
GND1
IS O L AT IO N
VIO
Figure 7-1. ISOW1044 20-pin DFM Top View
Table 7-1. Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
VIO
1
--
Side 1 Logic supply
IN
2
I
General purpose logic (GPIO) input (internal pull-down)
TXD
3
I
Driver enable. If this pin is floating, the driver is disabled (internal pull-down)
STB
4
I
Standby enable. Connect this pin to GNDIO in normal mode. If this pin is floating or logic high,
driver is in standby mode.
RXD
5
O
Receiver data output
GNDIO
6
--
Ground connection on side 1 for VIO. GNDIO and GND1 are not internally connected and need
be shorted on PCB.
NC
7
--
Not connected internally
Multi-function power converter enable input pin or fault output pin. Can only be used as either an
input pin or an output pin.
•
EN/FLT
8
I/O
•
If it's used as Power converter enable input pin, it enables and disables the integrated
DC-DC power converter. Connect directly to microcontroller or through a series current
limiting resistor to use as an enable input pin. DC-DC power converted is enabled when EN
is high (connected to VIO) and disabled when low (connected to GND1). If EN is floating,
DC-DC converter is enabled (internal pull-up resistor)
If it's used as Fault output pin, it gives an alert signal if power converter is not operating
properly. This pin is active low. Connect to microcontroller through a 5 kΩ or greater pull-up
resistor in order to use as a fault outpin pin.
VDD
9
--
Side 1 DC-DC converter power supply
GND1
10
--
Ground connections on side for VDD . GNDIO and GND1 are not internally connected and need
be shorted on PCB.
GND2
11
--
Ground connections on side for VISOOUT . GND2 and GISOIN are not internally connected and
need be shorted direclty on PCB, or connected through a ferrite bead.
VISOOUT
12
--
Isolated power converter output voltage. VISOOUT and VISOIN need be shorted directly on PCB, or
connected through a ferrite bead.
VSIN
13
I
Power converter input . Pin 12 and pin 13 need be shorted directly on PCB.
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Table 7-1. Pin Functions (continued)
PIN
NAME
OUT
I/O
DESCRIPTION
14
O
General purpose logic (GPIO) output (default output is low)
15, 16, 17
--
Ground connections for VISOIN. GND2 and GISOIN need be shorted direclty on PCB, or
connected through a ferrite bead.
CANL
18
I/O
Low-level CAN bus line
CANH
19
I/O
High-level CAN bus line
VISOIN
20
--
GISOIN
4
NO.
Power supply input for CAN tranceiver. VISOIN and VISOOUT need be shorted direclty on PCB, or
connected through a ferrite bead.
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8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
MAX
UNIT
VDD
Power converter supply voltage
–0.5
6
V
VISOIN
Isolated supply voltage, input supply for CAN transceiver
–0.5
6
V
VISOOUT
Isolated supply voltage, Power converter output
–0.5
6
V
VIO
Logic supply voltage
–0.5
6
V
VBUS
Voltage on bus pins (CANH, CANL with respect to GND2)
-58
58
V
VBUS_DIFF
Max Differential voltage on bus pins (CANH-CANL)
-45
45
V
Logic I/O voltage level ( RXD, TXD, STB, EN, IN)
–0.5
0.5(3)
V
OUT
-0.5
VISOIN + 0.5
V
IO
Output current on RXD, OUT pins
–15
15
mA
TJ
Junction temperature
–40
150
°C
Tstg
Storage temperature
–65
150
°C
Vlogic_IO
(1)
(2)
(3)
VIO +
Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the deviceat these or any other conditions beyond those indicated under
Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
All voltage values except differential I/O bus voltages are with respect to the local ground pin (GND1 or GND2). All voltage values
except differential I/O bus voltages are peak voltage values.
The maximum voltage must not be greater than 6 V.
8.2 ESD Ratings
VALUE
All pins except bus pins
±2000
CANH, CANL Bus pins w.r.t
GND2(pin15/16/17)
±12000
UNIT
V(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/
ESDA/JEDEC JS-001(1)
V(ESD)
Electrostatic
discharge
Charged device model (CDM), per JEDEC specification JESD22-C101(2)
±1500
V
V(ESD)
Electrostatic
discharge
per IEC61000-4-2 contact discharge,
CANH and CANL w.r.t. GND2
±8000
V
V(ESD)
Electrostatic
discharge
per IEC61000-4-2 contact discharge,
CANH and CANL w.r.t. GND1 (across
Isolation barrier)
±8000
V
(1)
(2)
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD controlprocess.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD controlprocess.
8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.5-V, 3.3-V, and 5.5-V operation
2.25
5.5
4.5
5.5
V
2.95
V
VDD
Power converter supply voltage
VDD(UVLO+)
Supply threshold when Power converter supply is rising
VDD(UVLO-)
Supply threshold when Power converter supply is falling
VHYS1(UVLO) Power converter supply voltage hysteresis
VIO(UVLO-)
Falling threshold of Logic supply voltage
UNIT
1.89
Logic supply voltage
Rising threshold of Logic supply voltage
MAX
1.71
VIO
VIO(UVLO+)
NOM
1.8-V operation
VHYS2(UVLO) Logic supply voltage hysteresis
2.7
2.40
2.55
0.15
0.24
V
V
1.7
1
75
V
V
V
125
mV
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over operating free-air temperature range (unless otherwise noted)
MIN
VIH
High-level input voltage (TXD, STB, EN, and IN inputs)
VIL
Low-level input voltage (TXD, STB, EN, and IN inputs)
IOH
High-level output current RXD
IOL
Low-level output current RXD
NOM
MAX
0.7 × VIO
VIO
0
0.3 × VIO
UNIT
V
V
VIO = 5V
-4
mA
VIO = 3.3V
-2
mA
VIO = 1.8 or 2.5V
-1
mA
VIO = 5V
4
mA
VIO = 3.3V
2
mA
VIO = 1.8 or 2.5V
1
mA
IOH
High-level output current OUT
VDD=4.5 to 5.5V
IOL
Low-level output current OUT
VDD=4.5 to 5.5V
1/tUI
Signaling rate
DR
Data rate for extra GPIO channel
Tpwrup
Power up time after applying input supply(Isolated output supply reaches 90%
of setpoint and data transmission can start after this)
TA
Ambient operating temperature
-4
mA
4
mA
CAN
5
Mbps
GPIO
10
Mbps
≤ 50% of bits are dominant
5
ms
–40
125
°C
–40
105
°C
8.4 ThermalInformation
ISOW1044
THERMAL METRIC(1)
DFM
UNIT
20 PINS
RθJA
Junction-to-ambient thermal resistance
68.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
20.9
°C/W
RθJB
Junction-to-board thermal resistance
44.8
°C/W
ΨJT
Junction-to-top characterization parameter
13
°C/W
ΨJB
Junction-to-board characterization parameter
44
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
--
°C/W
(1)
For more informationabout traditional and new thermal metrics, see theSemiconductor andIC Package Thermal Metrics application
report.
8.5 Power Ratings
PARAMETER
6
PD
Maximum power dissipation (both sides)
PD1
Maximum power dissipation (side-1)
PD2
Maximum power dissipation by (side-2)
TEST CONDITIONS
VIO = VDD = 5.5 V, STB= GND1, CAN Bus load
RL= 60 Ω, TXD=repetitive pattern of 1 ms time
period with 990 µs LOW time, 10 µs HIGH time,
Extra load on VISOOUT= 20 mA
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MIN
TYP
MAX
UNIT
1060
mW
490
mW
570
mW
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8.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
VALUE
UNIT
GENERAL
CLR
External clearance(1)
Shortest terminal-to-terminal distance through air
>8
mm
CPG
External creepage(1)
Shortest terminal-to-terminal distance across the package
surface
>8
mm
DTI
Distance through the insulation
Minimum internal gap (internal clearance – capacitive
signal isolation)
>17
um
DTI
Distance through the insulation
Minimum internal gap (internal clearance- transformer
power isolation)
>120
um
CTI
Comparative tracking index
IEC 60112; UL 746A
>600
V
Material group
According to IEC 60664-1
Overvoltage Category
I
Rated mains voltage ≤ 600 VRMS
I-IV
Rated mains voltage ≤ 1000 VRMS
I-III
DIN VDE V 0884-11:2017-01(2)
VIORM
VIOWM
Maximum repetitive peak isolation voltage
AC voltage (bipolar)
1500
Maximum working isolation voltage
AC voltage (sine wave) Time dependent dielectric
breakdown (TDDB) test
1000
DC voltage
1500
VPK
VRMS
VIOTM
Maximum transient isolation voltage
VTEST = VIOTM, t = 60s (qualification);
VTEST = 1.2 × VIOTM, t = 1s (100% production)
7071
VPK
VIOSM
Maximum surge isolation voltage ISOW1044(3)
Test method per IEC 62368-1, 1.2/50 µs waveform,
VTEST = 1.6 × VIOSM = 10000 VPK (qualification)
6250
VPK
VIOSM
Maximum surge isolation voltage ISOW1044B(3)
Test method per IEC 62368-1, 1.2/50 µs waveform,
VTEST = 1.3 × VIOSM = 7800 VPK (qualification)
6000
VPK
qpd
Apparent
charge(4)
Barrier capacitance, input to output(5)
CIO
Isolation resistance, input to output(5)
RIO
Method a: After I/O safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 × VIORM , tm = 10 s
≤5
Method a: After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
ISOW1044: Vpd(m) = 1.6 × VIORM, tm = 10 s. ISOW1044B:
Vpd(m) = 1.2 × VIORM, tm = 10 s
≤5
Method b1: At routine test (100% production) and
preconditioning (type test)
Vini = 1.2 × VIOTM, tini = 1 s;
ISOW1044: Vpd(m) = 1.875 × VIORM, tm = 1
s.
ISOW1044B: Vpd(m) = 1.5 × VIORM, tm = 1
s
≤5
VIO = 0.4 sin (2πft), f = 1 MHz
pC
~3.5
pF
VIO = 500 V, TA = 25°C
>
1012
Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C
> 1011
Ω
VIO = 500 V at TS = 150°C
> 109
Ω
Pollution degree
2
Climatic category
40/125/21
UL 1577
VISO
(1)
(2)
(3)
(4)
(5)
Withstand isolation voltage
VTEST = VISO, t = 60 s (qualification); VTEST = 1.2 × VISO , t
= 1 s (100% production)
5000
VRMS
Creepage and clearance requirements should be applied accordingto the specific equipment isolation standards of an application.
Care should be taken to maintainthe creepage and clearance distance of a board design to ensure that the mounting pads of
theisolator on the printed-circuit board do not reduce this distance. Creepage and clearance on aprinted-circuit board become
equal in certain cases. Techniques such as inserting grooves and/orribs on a printed circuit board are used to help increase these
specifications.
This coupler is suitable for safe electrical insulation (ISOW1044) and basic electrical insulation (ISOW1044B) only within the maximum
operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
Testing is carried out in air or oil to determine the intrinsicsurge immunity of the isolation barrier.
Apparent charge is electrical discharge caused by a partialdischarge (pd).
All pins on each side of the barrier tied together creating atwo-terminal device
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8.7 Safety-Related Certifications
VDE
CSA
Plan to certifiy according
to DIN VDE V
0884-11 :2017-01
UL
Plan to certifiy according to
IEC 62368-1, IEC 61010-1
and IEC 60601-1
TUV
CQC
Plan to certifiy according to
GB4943.1-2011
Plan to certifiy ccording to EN
61010-1:2010/ A1:2019 and EN
62368-1:2014
Per CSA62368-1:19,
IEC 62368-1:2018 Ed.
3, CSA 61010-1-12+A1
and IEC 61010-1 3rd Ed.,
Maximum transient isolation ISOW1044 (Reinforced):
voltage 7071 VPK; Maximum 600 VRMS, ISOW1044B
repetitive peak isolation
(Basic): 1000 VRMS
voltage, 1500 VPK;
maximum working voltage
Single protection, 5000
Maximum surge isolation
(pollution degree 2,
VRMS
voltage, ISOW1044:
material group I, ambient
6250 VPK (Reinforced),
temperature 90 ℃),
1 MOPP (Means of
ISOW1044B:
6000 VPK (Basic)
Patient Protection) per CSA
60601- 1:14 . IEC 60601-1
(ISOW1044 only) Ed.3+A1,
250 VRMS maximum
working voltage
Reinforced insulation, Altitude
≤ 5000 m, Tropical Climate,
700 VRMS maximum working
voltage.
ISOW1044 (Reinforced): 5000
VRMS reinforced insulation per
EN 61010-1:2010/A1:2019 and EN
62368-1:2014 up to working voltage
of 600 VRMS . ISOW1044B (Basic):
1000 VRMS
Certification planned
Certification planned
Certification planned
Certification planned
Plan to certifiy under
UL 1577 Component
Recognition Program
Certification planned
8.8 Safety Limiting Values
Safety limiting intends to minimize potential damage to the isolation barrier uponfailure of input or output circuitry.
PARAMETER
IS
PS
Safety input, output, or total power(1)
TS
Safety temperature(1)
(1)
8
Safety input, output, or supply current(1)
TEST CONDITIONS
MIN
TYP
MAX
RθJA = 68.5 °C/W, VI = 5.5 V, TJ = 150 °C, TA = 25 °C,
See Figure 8-1
332
RθJA = 68.5 °C/W, VI = 3.6 V, TJ = 150 °C, TA = 25 °C,
See Figure 8-1
507
RθJA = 68.5 °C/W, TJ = 150 °C, TA = 25 °C, See Figure 8-2
UNIT
mA
1826
mA
150
℃
The maximum safety temperature,TS, has the same value as the maximum junction temperature,TJ, specified for the device. The
IS andPS parameters represent the safety current and safety power respectively.The maximum limits of IS and PS should not
beexceeded. These limits vary with the ambient temperature, TA.
The junction-to-air thermal resistance, RθJA, in the table is that of a device installed on a high-K test board forleaded surface-mount
packages. Use these equations to calculate the value for each parameter:
TJ = TA + RθJA × P,where P is the power dissipated in the device.
TJ(max) = TS = TA +RθJA × PS, where TJ(max) isthe maximum allowed junction temperature.
PS = IS × VI, whereVI is the maximum input voltage.
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8.9 Electrical Characteristics
over recommended operating conditions, typical values are at VDD = 5V, GND1 = GNDIO, GND2 = GISOIN, VIO = 3.3 V and
TA =25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4.75
5
5.25
V
Device
VISOOUT
Isolated Output supply voltage EN=VDD, STB, TXD, IN floating
Iout
Extra current available on
Visoout
VDD = 4.5 to 5.5 V, CAN full loaded 60 Ω,
TXD toggling 5 Mbps, IN toggling 10 Mbps
VOH
Output high voltage on OUT
pin
VDD = 5 V ± 10%, IOH = –4 mA, IN = VIO
VOL
Output low voltage on OUT
pin
VDD = 5 V ± 10%, IOL = 4 mA, IN = GND2
II
Input current, IN
IN at GND1 or VIO
II
Input current, EN
EN at GND1 or VIO
20
mA
VISOIN – 0.4
V
0.4
V
–25
25
µA
–25
25
µA
–25
25
uA
TXD TERMINAL
II
Input leakage current
TXD = VIO or GND1
CI
Input capacitance
VIN = 0.4 x sin(2 x π x 1E+6 x t) + 1.65 V,
VIO = 3.3 V
2
pF
RXD TERMINAL
VOH
VOL
High level output voltage
Low level output voltage
IO = -4 mA for 4.5 V ≤ VIO ≤ 5.5 V,
See Figure 9-4
VIO – 0.4
VIO – 0.2
V
IO = -2 mA for 3.0 V ≤ VIO ≤ 3.6 V,
See Figure 9-4
VIO – 0.2
VIO – 0.06
V
IO = -1 mA for 2.25 V ≤ VIO ≤ 2.75 V,
See Figure 9-4
VIO – 0.1
VIO – 0.04
V
IO = -1 mA for 1.71 V ≤ VIO ≤ 1.89 V,
See Figure 9-4
VIO – 0.1
VIO – 0.04
V
IO = 4 mA for 4.5 V ≤ VIO ≤ 5.5 V, See Figure
9-4
0.2
0.4
V
IO = 2 mA for 3.0 V ≤ VIO ≤ 3.6 V, See Figure
9-4
0.07
0.2
V
IO = 1 mA for 2.25 V ≤ VIO ≤ 2.75 V,
See Figure 9-4
0.035
0.1
V
IO = 1 mA for 1.71 V ≤ VIO ≤ 1.89 V,
See Figure 9-4
0.04
0.1
V
25
uA
STB Terminal
II
CI
Input leakage current
STB = VIO or GND1
Input capacitance
VIN = 0.4 x sin(2 x π x 1E+6 x t) + 1.65 V,
VIO = 3.3 V
-25
2
pF
DRIVER ELECTRICAL CHARACTERISTICS
VO(DOM)
VO(REC)
STB=GND1, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω,
Bus output voltage(Dominant),
and CL = open, See Figure 9-1 and Figure
CANH
9-2
2.75
4.5
V
STB=GND1, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω,
Bus output voltage(Dominant),
and CL = open, See Figure 9-1 and Figure
CANL
9-2
0.5
2.25
V
Bus output voltage(recessive), STB=GND1, TXD = VIO and RL =
CANH and CANL
open, See Figure 9-1 and Figure 9-2
2.0 0.5 x VISOIN
3.0
V
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over recommended operating conditions, typical values are at VDD = 5V, GND1 = GNDIO, GND2 = GISOIN, VIO = 3.3 V and
TA =25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Differential output
voltage(dominant)
STB=GND1, TXD = 0 V, 45 Ω ≤ RL ≤ 70 Ω,
and CL = open, See Figure 9-1 and Figure
9-2
1.4
3.3
V
Differential output
voltage(dominant)
STB=GND1, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω,
and CL = open, See Figure 9-1 and Figure
9-2
1.5
3.0
V
Differential output
voltage(dominant)
STB=GND1, TXD = 0 V, RL = 2240 Ω, and
CL = open, See Figure 9-1 and Figure 9-2
1.5
5.0
V
Differential output
voltage(recessive)
TXD = VIO, RL = 60 Ω, and CL =
open, See Figure 9-1 and Figure 9-2
–120.0
12.0
mV
Differential output
voltage(recessive)
TXD = VIO, RL = open, and CL =
open, See Figure 9-1 and Figure 9-2
–50.0
50.0
mV
VO(STB)
Bus Output Voltage, CANH,
Standby mode
STB = VIO, RL = open, See Figure
9-1 and Figure 9-2
–100
100
mV
VO(STB)
Bus Output Voltage, CANL,
Standby mode
STB = VIO, RL = open, See Figure
9-1 and Figure 9-2
–100
100
mV
VOD(STB)
Bus Output Voltage, CANHCANL, Standby mode
STB=VIO, RL = open, See Figure
9-1 and Figure 9-2
-200
200
mV
VSYM_DC
Output symmetry (VISOIN VO(CANH) - VO(CANL))
RL = 60 Ω and CL = open, TXD = VIO or
GND1, See Figure 9-1 and Figure 9-2
–400.0
400.0
mV
IOS(SS_DOM)
-15 V < CANH < 40 V, CANL = open, and
TXD = 0 V, See Figure 9-8
Short circuit current steady
state output current, dominant -15 V < CANL < 40 V, CANH = open, and
TXD = 0 V, See Figure 9-8
VOD(DOM)
VOD(REC)
IOS(SS_REC)
Short circuit current steady
-27 V < VBUS < 32 V, VBUS = CANH =
state output current, recessive CANL, and TXD = VIO , See Figure 9-8
–115.0
mA
115.0
mA
–5.0
5.0
mA
–12
12
V
500.0
900.0
mV
400
1150
mV
RECEIVER ELECTRICAL CHARACTERISTICS
VCM
Input common mode range
See Figure 9-4 and Table 9-1
VIT
Differential input threshold
voltage, normal mode
-12 V ≤ VCM ≤ 12 V, STB =
GND1, See Figure 9-4 and Table 9-1
VIT(STB)
Differential input threshold
voltage, standby mode
-12 V ≤ VCM ≤ 12 V, STB = VIO
VHYS
Hysteresis voltage for
differential input threshold,
normal mode
-12 V ≤ VCM ≤ 12 V, STB = GND1
VDIFF(DOM)
Dominant state differential
input voltage range, normal
mode
-12 V ≤ VCM ≤ 12 V, STB =
GND1, See Figure 9-4 and Table 9-1
VDIFF(DOM)
Dominant state differential
input voltage range, standby
mode
-12 V ≤ VCM ≤ 12 V, STB = VIO, See Figure
9-4 and Table 9-1
VDIFF(REC)
Recessive state differential
input voltage range, normal
mode
VDIFF(REC)
100
mV
0.9
9
V
1.15
9
V
-12 V ≤ VCM ≤ 12 V, STB =
GND1, See Figure 9-4 and Table 9-1
–4
0.5
V
Recessive state differential
input voltage range, standby
mode
-12 V ≤ VCM ≤ 12 V, STB = VIO, See Figure
9-4 and Table 9-1
–4
0.4
V
IOFF(LKG)
power-off bus input leakage
current
CANH = CANL = 5 V, VDD = VIO = GND1
5
uA
CI
Input capacitance to ground
(CANH or CANL)
TXD = VIO
20
pF
CID
Differential input capacitance
TXD = VIO
10
pF
RID
Differential input resistance
TXD = VIO ; -12 V ≤ VCM ≤ +12 V
90
kΩ
10
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over recommended operating conditions, typical values are at VDD = 5V, GND1 = GNDIO, GND2 = GISOIN, VIO = 3.3 V and
TA =25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
RIN
Input resistance (CANH or
CANL)
RIN(M)
Input resistance matching: (1 VCANH = VCANL = 5 V
RIN(CANH)/RIN(CANL)) x 100%
TXD = VIO ; -12 V ≤ VCM ≤ +12 V
MIN
TYP
MAX
UNIT
20
45
kΩ
–1
1
%
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8.10 Supply Current Characteristics
Typical values are at VDD=5V, VIO=3.3V, Min/Max over recommended operating conditions, GND1 = GNDIO, GND2 =
GISOIN, VDD = 4.5 V to 5.5 V(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Power converter disabled
IDD
Power converter supply
current
EN = GND1, STB, TXD, IN floating
0.23
0.27
mA
IIO
Logic supply current
EN = GND1, STB, TXD, IN floating
0.34
0.70
mA
124
211
mA
Supply current: Normal Mode
IDD
Power converter supply
current
TXD = GND1, Bus dominant, RL= 60 Ω
IDD
Power converter supply
current
TXD = VIO, Bus recessive, RL = 60 Ω
26
46
mA
IDD
Power converter supply
current
TXD = 1Mbps 50% duty square wave, RL = 60 Ω
76
123
mA
IDD
Power converter supply
current
TXD = 5 Mbps 50% duty square wave, RL= 60 Ω
78
136
mA
IIO
Logic supply current
TXD = GND1, Bus dominant, VIO = 1.71 to 1.89 V
4.3
5.5
mA
IIO
Logic supply current
TXD = GND1, Bus dominant, VIO = 2.25 to 5.5 V
4.9
6.0
mA
IIO
Logic supply current
TXD = VIO, Bus recessive, VIO = 1.71 to 1.89 V
3.3
5.4
mA
IIO
Logic supply current
TXD = VIO, Bus recessive, VIO = 2.25 to 5.5 V
3.8
5.5
mA
IIO
Logic supply current
TXD = 1 Mbps square wave 50% duty, VIO = 3 to 3.6V
4.4
5.3
mA
IIO
Logic supply current
TXD = 5 Mbps square wave 50% duty, VIO = 3 to 3.6V
4.5
6.2
mA
Supply current: Standby mode
IDD
Power converter supply
current
STB = VIO , RL = 60 Ω
16
23
mA
IIO
Logic supply current
STB = VIO , VIO = 3 to 3.6 V
2.7
3.5
mA
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8.11 Switching Characteristics
Typical specifications are at VIO = 3.3V, VDD = 5V, GND1 = GNDIO, GND2 = GISOIN, Min/Max are over recommended
operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DEVICE SWITCHING CHARACTERISTICS
tPROP(LOO Total loop delay, driver input TXD to
receiver RXD, recessive to dominant
P1)
RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF;
input rise/fall time (10% to 90%) on TXD
= 1 ns; 1.71 V < VIO < 5.5 V, See Figure
9-3
140
205
ns
tPROP(LOO Total loop delay, driver input TXD to
receiver RXD, dominant to recessive
P2)
RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF;
input rise/fall time (10% to 90%) on TXD
=1 ns; 1.71 V < VIO 7 V, VDD < 2.5
V, or if the junction temperature >170°C. When a fault is detected, this pin will go low, disabling the DC-DC
converter to prevent any damage.
MCU OUTPUT
5 kΩ
EN/FLT
Powers Down CAN Transceiver
and DC-DC Converter.
IQ < 1 mA Typical
MCU INPUT
Fault Reported If
VDD < 2.5 V
VDD > 7 V
Junction Temp > 170° C
•
•
•
•
Figure 10-7. EN Fault Pin Diagram
An over-voltage clamp feature is present on VISOOUT which will clamp the voltage at 6 V if there is an increase
in voltage seen. For device reliability, it is recommended that VISOOUT stays lower than the over-clamp voltage
for device reliability.
Over-Voltage Lock Out (OVLO) on VDD will occur when a voltage higher than 7 V on VDD is seen. At OVLO,
the device will go into a low power state and the EN/FLT pin will go low.
In cases of overload or short on power converter output VISOOUT, maximum duty cycle of power converter is
limited. In cases of driver bus short circuit due to the external power supply cable shorting to the bus cable,
short circuit current protection on CAN chip restricts the bus current to ±115 mA maximum.
Thermal protection is also integrated to help prevent the device from getting damaged under such scenarios.
An increase in the die temperature is monitored and the device is disabled when the die temperature
becomes 165 ℃ (typical), thus disabling the short condition. The device is re-enabled when the junction
temperature becomes 155 ℃ (typical). If an overload or output short-circuit condition prevails, this protection
cycle is repeated. Care should be taken in the system design to prevent repeated or prolonged exposure to
bus shorts as this exposes the device to high junction temperatures for extreme amounts of time affecting
device reliability.
10.6.6 Floating Pins, Unpowered Device
The ISOW1044 is designed to be ideal passive or no load to the CAN bus if it is unpowered. The bus pins
(CANH, CANL) have extremely low leakage currents when the device is unpowered to avoid loading down the
bus which is critical if some nodes of the network are unpowered while the rest of the of network remains in
operation.
The device has internal pull-ups on critical pins (TXD and STB) which places the device into known states if the
pin floats. This internal bias should not be relied upon by design though, especially in noisy environments, but
instead should be considered a failsafe protection feature. When a CAN controller supporting open drain outputs
is used, an adequate external pull-up resistor must be used to ensure that the TXD output of the CAN controller
maintains adequate bit timing to the input of the CAN transceiver. See Table 10-3 for more details.
10.6.7 Glitch-Free Power Up and Power Down
Communication on the bus that already exist between a master node and slave node in a CAN network must not
be disturbed when a new node is swapped in or out of the network. No glitches on the bus should occur when
the device is:
•
•
•
Hot plugged into the network in an unpowered state
Hot plugged into the network in a powered state and recessive state
Powered up or powered down in a recessive state when already connected to the bus
The ISOW1044 device meets above criteria and does not cause any false data toggling on the bus when
powered up or powered down in a recessive state with supply ramp rates >= 50 us.
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10.7 Device Functional Modes
Table 10-1 lists the supply configuration for these devices:
Table 10-1. Supply configuration Function Table
INPUTS
(1)
(2)
OUTPUTS
VDD
VIO
EN/FLT
BUS OUTPUT (CANH/
CANL)
< VDD(UVLO+)
>VIO(UVLO+)
X
High-Z
Recessive
(Default High)
OFF
>VDD(UVLO+)
0.9 V
Dominant
L
0.5 V< VID < 0.9 V
Undefined
Undefined
H
VID < 0.5 V
Recessive
VID > 1.15 V
Dominant
0.4 V< VID < 1.15 V
Undefined
VID < 0.4 V
Recessive
H or Open
PU
H or Open
RXD (3)
BUS STATE
H (L if a remote wake
event occurred)
X
Open (VID = 0 V)
Open
H
L
X
X
X
Hi-Z
PD
PU
X
X
X
X
Hi-Z
PU
PD(2)
X
X
X
X
Invalid Operation
PU=Powered up, PD=Powered down; H=high level; L=Low level; X=Irrelevant; Hi-Z=High impedance state
A strongly driven input signal on TXD can weakly power the floating VIO through an internal protection diode and cause an
undetermined output.
VISOOUT shorted to VISOIN on PCB. GND2 and GISOIN pins are shorted together and EN/FLT = High
At Normal mode (STB = L), the receiver output, RXD, goes low when the differential input voltage defined by
Equation 3 is greater than the positive input threshold, VIT+. The receiver output, RXD, goes high when the
differential input voltage defined by Equation 3 is less than the negative input threshold, VIT– . If the VID voltage
is between the VIT+ and VIT– thresholds, the output is indeterminate.
VID = VCANH – VCANL
(3)
At Standby mode (STB = H or Open), RXD output goes high and if a remote wake-up event occurs, it goes low.
Other device feature functional states are shown inTable 10-4 and Table 10-5 below:
Table 10-4. DC-DC Converter Enable/Disable
INPUTS
OUTPUT
VDD
VIO
EN/FLT
VISOOUT
PU
PU
H or Open
5V
PU
PU
L
OFF
Table 10-5. General Purpose Logic Input/Output
INPUTS
VDD (1) (2)
PU
(1)
(2)
VIO
PU
OUTPUT
EN/FLT
H or Open
CommentsComments
IN
OUT
H
H
L
L
Output channel assumes
logic state governed by IN
Default state
Open
L
L
X
Hi-Z
PD
PU
X
X
Hi-Z
PU
PD
X
X
Invalid Operation
Device is in disabled state
when either of VDD or VIO is
missing
PU = Powered Up; PD = Powered Down; H = Logic High; L= Logic Low; X = Irrelevant, Hi-Z = High Impedance (OFF) state
VISOOUT shorted to VISOIN on PCB. GND2 and GISOIN pins are shorted together and EN=High
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10.8 Device I/O Schematics
TXD, STB
VIO
IN
VIO
VIO
VIO
VIO
VIO
VIO
500 k
IN
TXD, STB
500 k
GNDIO
EN/FLT
VIO
GNDIO
GNDIO
GNDIO
GNDIO
GNDIO
RXD
VIO
VIO
VIO
VIO
550 k
EN/FLT
a
RXD
1mA
GND1
GND1
GND1
GND1
GNDIO
OUT
VISOIN
a
OUT
GISOIN
Figure 10-8. Device I/O schematics
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11 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
11.1 Application Information
The ISOW1044 device can be used with other components from Texas Instruments such as a microcontroller
and a linear voltage regulator to form a fully isolated CAN interface. Typically two power supplies isolated from
each other are needed to power up both sides of Isolated CAN device. Due to the integrated DC-DC converter in
the device, the isolated supply is generated inside the device that can be used to power isolated side of the CAN
device and peripherals on isolated side, thus saving board space.
11.2 Typical Application
The ISOW1044 device is suitable for applications that have limited board space and desire more integration.
It is also suitable for very high voltage applications, where power transformers meeting the required isolation
specifications are bulky and expensive. The device can be used in applications with a host micro-controller
or FPGA that includes the link layer portion of the CAN protocol. Figure 11-1 shows a typical application
configuration for 5 V controller applications. The bus termination is shown for illustrative purposes. The
ISOW1044 device meets 8 kV contact ESD (Electrostatic discharge) per IEC 61000-4-2 standalone with no
external components on bus. If the application requires the usage of Common mode choke (CMC) , then use of
Transient voltage suppressor (TVS) is a must to achieve 8kV IEC ESD.
4.7k
8
FB
1
0.1μF
6
VIO
4
GPIO1
MCU
TXD
5
PE
2
GPIO2
5V
GND
FB
FB
GISOIN
GISOIN
R
20
0.1μF 10μF
Extra current
~20mA
Other field
circuitry
15
16
NC 17
GISOIN
ISOW1044
RE
TXD
RXD
DE
B 19
CANH
Optional
Termination
CAN
BUS
CANL 18
IN
GND1
10µF 1µF
VISOIN
GNDIO
GND1
D
7 NC
NC
9 VDD
10 GND1
DGND
N PSU
V
VIOCC1
STB
3
RXD
L1
EN/FLT
OUT
14
13
VSIN
VISOOUT 12
FB
GND2
FB
GND2 11
10nF
10nF 1µF 10µF
Galvanic
Isolation Barrier
Optional bus protection
Notes:
1. Keep 10 nF bypass capacitors close to VDD and VISOOUT pins (< 1 mm) for op mum Radiated emissions performance
2. GND1 and GNDIO need be shorted directcly. GND2 and GISOIN need be shorted directly, or through ferrite beads.
3. All GISOIN pins (pin 15, 16, 17) need be shorted on PCB for op mum IEC-ESD performance.
4. VSIN and VISOOUT must be shorted on PCB.
Figure 11-1. Application circuit for ISOW1044
11.2.1 Design Requirements
Unlike an optocoupler-based solution, which requires several external components to improve performance,
provide bias, or limit current, the ISOW1044 device only requires external bypass capacitors to operate as
shown in above application diagram.
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Because of very-high current flowing through the device VDD and VISOOUT supplies, higher decoupling capacitors
typically provide better noise and ripple performance. Although a 10-µF capacitor is adequate, higher decoupling
capacitors (such as 47 µF) on both the VDD and VISOOUT pins to the respective grounds are strongly
recommended to achieve the best performance.
11.2.2 Detailed Design Procedure
11.2.2.1 Bus Loading, Length and Number of Nodes
The ISO 11898-2 Standard specifies a maximum bus length of 40 m and maximum stub length of 0.3 m.
However, with careful design, users can have longer cables, longer stub lengths, and many more nodes to
a bus. A large number of nodes requires transceivers with high input impedance such as the ISOW1044
transceiver.
Many CAN organizations and standards have scaled the use of CAN for applications outside the original ISO
11898-2 Standard. These organizations and standards have made system-level trade-offs for data rate, cable
length, and parasitic loading of the bus. Examples of some of these specifications are ARINC825, CANopen,
DeviceNet, and NMEA2000.
The ISOW1044 device is specified to meet the 1.5-V requirement with a 50-Ω load, incorporating the worst
case including parallel transceivers. The differential input resistance of the device is a minimum of 30 kΩ. If 100
ISOW1044 transceivers are in parallel on a bus, this requirement is equivalent to a 300-Ω differential load worst
case. That transceiver load of 300 Ω in parallel with the 60 Ω gives an equivalent loading of 50 Ω. Therefore,
the ISOW1044 device theoretically supports up to 100 transceivers on a single bus segment. However, for CAN
network design margin must be given for signal loss across the system and cabling, parasitic loadings, network
imbalances, ground offsets and signal integrity, therefore a practical maximum number of nodes is typically much
lower. Bus length may also be extended beyond the original ISO 11898 standard of 40 m by careful system
design and data-rate tradeoffs. For example, CAN open network design guidelines allow the network to be up to
1 km with changes in the termination resistance, cabling, less than 64 nodes, and a significantly lowered data
rate.
This flexibility in CAN network design is one of the key strengths of the various extensions and additional
standards that have been built on the original ISO 11898-2 CAN standard. Using this flexibility requires the
responsibility of good network design and balancing these tradeoffs.
11.2.2.2 CAN Termination
The ISO11898 standard specifies the interconnect to be a single twisted pair cable (shielded or unshielded) with
120-Ω characteristic impedance (ZO). Resistors equal to the characteristic impedance of the line should be used
to terminate both ends of the cable to prevent signal reflections. Unterminated drop-lines (stubs) connecting
nodes to the bus should be kept as short as possible to minimize signal reflections. The termination may be in a
node, but if nodes are removed from the bus, the termination must be carefully placed so that it is not removed
from the bus.
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Node 1
Node 2
Node 3
Node n
(with termination)
MCU or DSP
MCU or DSP
MCU or DSP
MCU or DSP
CAN
Controller
CAN
Controller
CAN
Controller
CAN
Controller
CAN
Transceiver
CAN
Transceiver
CAN
Transceiver
CAN
Transceiver
RTERM
RTERM
Figure 11-2. Typical CAN Bus
Termination may be a single 120-Ω resistor at the end of the bus, either on the cable or in a terminating
node. If filtering and stabilization of the common-mode voltage of the bus is desired, then split termination can
be used as below termination concepts. Split termination improves the electromagnetic emissions behavior of
the network by eliminating fluctuations in the bus common-mode voltages at the start and end of message
transmissions.
Standard Termination
Split Termination
CANH
CANH
RTERM / 2
CAN
Transceiver
RTERM
CAN
Transceiver
CSPLIT
RTERM / 2
CANL
CANL
Figure 11-3. CAN Bus Termination Concepts
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11.2.3 Application Curve
Red: Peak vertical scan. Green: Peak horizontal scan
VDD = 5 V
VISOOUT = 5 V
Data rate = 1 Mbps
Figure 11-4. ISOW1044 Radiated Emissions versus CISPR32B line
11.2.4 Insulation Lifetime
Insulation lifetime projection data is collected by using industry-standard Time Dependent Dielectric Breakdown
(TDDB) test method. In this test, all pins on each side of the barrier are tied together creating a two-terminal
device and high voltage applied between the two sides; See Figure 11-5 for TDDB test setup. The insulation
breakdown data is collected at various high voltages switching at 60 Hz over temperature. For reinforced
insulation, VDE standard requires the use of TDDB projection line with failure rate of less than 1 part per million
(ppm). Even though the expected minimum insulation lifetime is 20 years at the specified working isolation
voltage, VDE reinforced certification requires additional safety margin of 20% for working voltage and 87.5% for
lifetime which translates into minimum required insulation lifetime of 37.5 years at a working voltage that's 20%
higher than the specified value. Figure 11-6 shows the intrinsic capability of the isolation barrier to withstand high
voltage stress over its lifetime. Based on the TDDB data, the intrinsic capability of the insulation is 1000 VRMS
with a lifetime of 1184 years.
A
Vcc 1
Vcc 2
Time Counter
> 1 mA
DUT
GND 1
GND 2
VS
Oven at 150 °C
Figure 11-5. Test Setup for Insulation Lifetime Measurement
34
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ISOW1044
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SLLSFF7A – MAY 2021 – REVISED DECEMBER 2021
Figure 11-6. Insulation Lifetime Projection Data
12 Power Supply Recommendations
To make sure that operation is reliable at all data rates and supply voltages, adequate decoupling capacitors
must be located as close to supply pins as possible. Power converter input VDD and output VISOOUT supply pins
should have high frequency ceramic capacitors 10 nF and bulk capacitors 10 μF atleast close to the pins. Signal
path supply pins, VIO and VISOIN , should have 100 nF or higher value ceramic bypass capacitors close to device
pins. ISOW10144 can consume typical peak pulse currents of upto 250mA under fully loaded conditions for short
durations (10s of µs) from the power source that is powering VDD of ISOW1044. Please make sure the current
limit of upstream power device is atleast 300mA typical.
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35
ISOW1044
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SLLSFF7A – MAY 2021 – REVISED DECEMBER 2021
13 Layout
13.1 Layout Guidelines
Figure 11-1 shows the recommended placement and routing of device bypass capacitors. Below guidelines must
be followed to achieve low emissions design:
1. High frequency bypass capacitors 10 nF must be placed close to VDD and VISOOUT pins, within 1 mm
distance away from device pins. This is very essential for optimised radiated emissions performance. Ensure
that these capacitors are 0402 size so that they offer least inductance (ESL).
2. Bulk capacitors of atleast 10 μF must be placed on power converter input (VDD) and output (VISOOUT) supply
pins after the 10 nF capacitor with a distance of 2 - 4 mm, as shown in Layout Example.
3. Traces on VDD and GND1 must be symmetric till bypass capacitors. Similarly traces on VISOOUT and GND2
must be symmetric.
4. Place two 0402 size Ferrite beads (Part number: BLM15EX331SN1) on power supply pins, one between
VISOOUT and VISOIN and the other between GND2 (pin 11) and GND2(pin 15), as shown in example PCB
layout, so that any high frequency noise from power converter output sees a high impedance before it goes
to other components on PCB.
5. Do not have any metal traces or ground pour within 4 mm of power converter output terminals VISOOUT
(pin12) and GND2 (pin11).
6. Place the CAN BUS protection and filtering circuitry close to the bus connector to prevent transients,
ESD, and noise from propagating onto the board. This layout example shows an optional transient voltage
suppression (TVS) diode, D1, which may be implemented if the system-level requirements exceed the
specified rating of the transceiver. This example also shows two optional 68pF bus filter capacitors
7. Common mode choke or ferrite beads on bus terminals (CANH/CANL) can minimise any high frequency
noise that can couple of CAN bus cable which can act as antenna and amplify that noise. This will improve
Radiated emissions performance on a system level.
8. Following the layout guidelines of EVM as much as possible is highly recommended for a low radiated
emissions design. EVM Link is available in Related Documentation.
13.2 Layout Example
ISOW1044
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