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LDC1000
SNOSCX2C – SEPTEMBER 2013 – REVISED SEPTEMBER 2015
LDC1000 Inductance-to-Digital Converter
1 Features
3 Description
•
•
•
•
•
Inductive Sensing is a contact-less, short-range
sensing technology that enables low-cost, highresolution sensing of conductive targets in the
presence of dust, dirt, oil, and moisture, making it
extremely reliable in hostile environments. Using a
coil which can be created on a PCB as a sensing
element, the LDC1000 enables ultra-low cost system
solutions.
1
•
•
•
•
•
•
•
•
Magnet-Free Operation
Sub-Micron Precision
Adjustable Sensing Range (Through Coil Design)
Lower System Cost
Remote Sensor Placement (Decoupling the LDC
From Harsh Environments)
High Durability (by Virtue of Contact-Less
Operation)
Insensitivity to Environmental Interference (Such
as Dirt, Dust, Water, Oil)
Supply Voltage, Analog: 4.75 V to 5.25 V
Supply Voltage, I/O: 1.8 V to 5.25 V
Supply Current (Without LC Tank): 1.7 mA
RP Resolution: 16-Bit
L Resolution: 24-Bit
LC Frequency Range: 5 kHz to 5 MHz
2 Applications
•
•
•
•
•
•
•
•
Position Sensing
Motion Sensing
Gear-Tooth Counting
Flow Meters
Push-Button Switches
Multi-Function Printers
Digital Cameras
Medical Devices
Inductive sensing technology enables precise
measurement of linear and angular position,
displacement, motion, compression, vibration, metal
composition, and several other applications in
markets including automotive, consumer, computer,
industrial, medical, and communications. Inductive
sensing offers better performance and reliability at
lower cost than other competitive solutions.
The LDC1000 is the world’s first inductance-to-digital
converter, offering the benefits of inductive sensing in
a low-power, small-footprint solution. The product is
available in a SON-16 package and offers several
modes of operation. A serial peripheral interface (SPI)
simplifies connection to an MCU.
Device Information(1)
PART NUMBER
LDC1000
PACKAGE
WSON (16)
BODY SIZE (NOM)
5.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Axial Distance Sensing Application
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LDC1000
SNOSCX2C – SEPTEMBER 2013 – REVISED SEPTEMBER 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
5
6.1
6.2
6.3
6.4
6.5
6.6
6.7
5
5
5
5
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Condition.........................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ...............................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 13
7.5 Programming .......................................................... 16
7.6 Register Maps ......................................................... 18
8
Application and Implementation ........................ 24
8.1 Application Information............................................ 24
8.2 Typical Application .................................................. 25
9 Power Supply Recommendations...................... 28
10 Layout................................................................... 28
10.1 Layout Guidelines ................................................. 28
10.2 Layout Example .................................................... 29
11 Device and Documentation Support ................. 30
11.1
11.2
11.3
11.4
11.5
Documentation Support (if applicable)..................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
30
30
30
30
30
12 Mechanical, Packaging, and Orderable
Information ........................................................... 30
4 Revision History
Changes from Revision B (March 2015) to Revision C
Page
•
Changed XOUT pin description to clarify proper crystal connection...................................................................................... 4
•
Added instructions on proper DAP connection....................................................................................................................... 4
•
Added conditions for L measurement resolution .................................................................................................................... 6
•
Changed TYP to NOM............................................................................................................................................................ 7
•
Changed Some descriptions of device functionality for better clarity and consistency ......................................................... 9
•
Changed RP Conversion equation for clarity ...................................................................................................................... 12
•
Added extended SPI transaction figure for clarity ............................................................................................................... 17
•
Changed Register maps to include Clock Configuration and Threshold Registers ............................................................ 18
•
Changed description of Min Sensor frequency for clarity .................................................................................................... 21
•
Added documentation of registers 0x05, 0x06, and 0x08 ................................................................................................... 21
•
Changed description of OSC Status to include possible causes. ....................................................................................... 23
•
Changed some details on Application Information for improved clarity and consistency. .................................................. 24
•
Deleted lateral and rotation images from example applications, as example application details axial sensing
configuration ......................................................................................................................................................................... 25
•
Changed details of example design for improved clarity...................................................................................................... 26
Changes from Revision A (December 2013) to Revision B
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Changed SCLK Pin type from DO to DI ................................................................................................................................. 4
•
Added L Res value to Electrical Characteristics..................................................................................................................... 6
•
Added Measuring Inductance With LDC1000 subsection to Feature Description ............................................................... 12
•
Changed Frequency Counter Data values in Register Description table............................................................................. 18
2
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Changes from Original (September 2013) to Revision A
•
Page
Changed SCLK to CSB .......................................................................................................................................................... 7
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5 Pin Configuration and Functions
NHR Package
16-Pin WSON
Top View
SCLK
1
16
INTB
CSB
2
15
XOUT
SDI
3
14
TBCLK/XIN
VIO
4
13
CLDO
SDO
5
12
VDD
DGND
6
11
GND
CFB
7
10
INB
CFA
8
9
INA
DAP
(GND)
Pin Functions
PIN
DESCRIPTION
NO.
SCLK
1
DI
SPI clock input. SCLK is used to clock-out/clock-in the data from/into the chip
CSB
2
DI
SPI CSB. Multiple devices can be connected on the same SPI bus with each device having a
dedicated CSB connection to the MCU so that each device can be uniquely selected.
SDI
3
DI
SPI Slave Data In (Master Out Slave In). This should be connected to the Master Out Slave In of the
master
VIO
4
P
Digital IO Supply
DGND
6
P
Digital ground
SDO
5
DO
CFB
7
A
LDC filter capacitor
CFA
8
A
LDC filter capacitor
INA
9
A
External LC Tank. Connected to external LC tank
INB
10
A
External LC Tank. Connected to external LC tank
GND
11
P
Analog ground
VDD
12
P
Analog supply
CLDO
13
A
LDO bypass capacitor. A 56 nF capacitor should be connected from this pin to GND
TBCLK/XI
N
14
DI/A
External time-base clock/XTAL. Either an external clock or crystal can be connected.
XOUT
15
A
INTB
16
DO
DAP
17
P
(1)
(2)
4
TYPE (1)
NAME
SPI Slave Data Out (Master In Slave Out).It is Hi-Z when CSB is high
XTAL. Crystal out. When using a crystal, a crystal should be connected across XIN and XOUT. When
not using a crystal, this pin should be left floating.
Configurable interrupt output.
Connect to GND for improved thermal performance.
(2)
DO: Digital Output, DI: Digital Input, P: Power, A: Analog
There is an internal electrical connection between the exposed Die Attach Pad (DAP) and the GND pin of the device. Although the DAP
can be left floating, for best performance the DAP should be connected to the same potential as the devices's GND pin. Do no use the
DAP as the primary ground for the device. The device GND pin must always be connected to ground.
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6 Specifications
6.1 Absolute Maximum Ratings (1)
MAX
UNIT
Analog Supply Voltage (VDD – GND)
MIN
6
V
IO Supply Voltage (VIO – GND)
6
V
V
Voltage on any Analog Pin
–0.3
VDD + 0.3
Voltage on any Digital Pin
–0.3
VIO + 0.3
V
8
mA
150
°C
150
°C
Input Current on INA and INB
Junction Temperature, TJ (2)
Storage temperature, Tstg
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The maximum power dissipation is a function of TJ(MAX), RθJA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ RθJA. All numbers apply for packages soldered directly onto a PC
board. The package thermal impedance is calculated in accordance with JESD 51-7.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±1000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±250
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Condition (1)
MIN
NOM
MAX
UNIT
Analog Supply Voltage (VDD – GND)
4.75
5.25
V
IO Supply Voltage (VIO – GND)
1.8
5.25
V
VDD-VIO
≥0
Operating Temperature, TA
–40
(1)
V
125
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.4 Thermal Information
LDC1000
THERMAL METRIC
(1)
NHR (WSON)
UNIT
16-PINS
RθJA
(1)
(2)
Junction-to-ambient thermal resistance (2)
28
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The maximum power dissipation is a function of TJ(MAX), RθJA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ RθJA. All numbers apply for packages soldered directly onto a PC
board. The package thermal impedance is calculated in accordance with JESD 51-7.
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6.5 Electrical Characteristics
Unless otherwise specified, all limits ensured for TA = TJ = 25°C, VDD = 5.0 V, VIO = 3.3 V (1) (2)
PARAMETER
MIN (3)
TEST CONDITIONS
TYP (4)
MAX (3)
4.75
5
5.25
V
1.8
3.3
5.25
V
1.7
2.3
mA
14
µA
UNIT
POWER
VDD
Analog Supply Voltage
VIO
IO Supply Voltage
VIO≤VDD
IDD
Supply Current on VDD pin
PWR_MODE = 1, no sensor
connected
IVIO
IO Supply Current
Static current
IDD_LP
Standby Mode Supply Current PWR_MODE = 0, no sensor
on VDD pin
connected
tSTART
Start-Up Time
From POR to ready-to-convert. Crystal
not used for frequency counter
250
µA
2
ms
LDC
ƒSENSOR_MIN
Minimum sensor frequency
5
kHz
ƒSENSOR_MAX
Maximum sensor frequency
5
MHz
ASENSOR_MIN
Minimum sensor amplitude
1
VPP
ASENSOR_MAX
Maximum sensor amplitude
4
VPP
10
1/ƒsensor
Ω
tREC
Recovery time
RP_MIN
Minimum Sensor RP Range
798
RP_MAX
Maximum Sensor RP Range
3.93
MΩ
RP_RES
RP Measurement Resolution
16
Bits
L Res
Inductance Measurement
Resolution
RESPONSE_TIME = b111 (6144),
ƒEXT = 8 MHz, ƒSENSOR = 5 kHz
24
Bits
Minimum Response Time
Minimum programmable settling time
of digital filter
192/ƒSE
Maximum programmable settling time
of digital filter
6144/ƒS
tS_MIN
tS_MAX
Maximum Response Time
Oscillation start-up time after RP
under-range condition
s
NSOR
s
ENSOR
EXTERNAL CLOCK/CRYSTAL FOR FREQUENCY COUNTER
Crystal
Frequency
8
Startup time
External Clock
MHz
30
Frequency
ms
8
Clock Input High Voltage
VIO
MHz
V
DIGITAL I/O CHARACTERISTICS
VIH
Logic 1 Input Voltage
VIL
Logic 0 Input Voltage
VOH
Logic 1 Output Voltage
ISOURCE=400 µA
VOL
Logic 0 Output Voltage
ISINK=400 µA
IIOHL
Digital IO Leakage Current
(1)
(2)
(3)
(4)
6
0.8×VIO
V
0.2×VIO
VIO–0.3
–500
V
V
0.3
V
500
nA
Electrical Characteristics table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions
result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond
which the device may be permanently degraded, either mechanically or electrically.
The maximum power dissipation is a function of TJ(MAX), RθJA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ RθJA. All numbers apply for packages soldered directly onto a PC
board. The package thermal impedance is calculated in accordance with JESD 51-7.
Limits are specified by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are specified through
correlations using statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
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6.6 Timing Requirements
Unless otherwise noted, all limits specified at TA = 25°C, VDD=5.0, VIO=3.3, 10 pF capacitive load in parallel with a 10 kΩ
load on SDO. Specified by design; not production tested.
MIN
NOM
MAX
UNIT
4
MHz
ƒSCLK
Serial Clock Frequency
tPH
SCLK Pulse Width High
ƒSCLK = 4 MHz
0.4 / ƒSCLK
tPL
SCLK Pulse Width Low
ƒSCLK = 4 MHz
0.4 / ƒSCLK
s
tSU
SDI Setup Time
10
ns
tH
SDI Hold Time
10
ns
tODZ
SDO Driven-to-Tristate Time
Measured at 10% / 90% point
20
ns
tOZD
SDO Tristate-to-Driven Time
Measured at 10% / 90% point
20
ns
tOD
SDO Output Delay Time
20
ns
tCSS
CSB Setup Time
20
ns
tCSH
CSB Hold Time
20
ns
tIAG
Inter-Access Gap
100
ns
tDRDYB
Data ready pulse width
Data ready pulse at every 1 / ODR if no
data is read
s
1 / ƒsensor
s
SCLK
ttPLt
tSU
SDI
ttPHt
ttHt
Valid Data
Valid Data
Figure 1. Write Timing Diagram
1st Clock
8th Clock
16th Clock
SCLK
tCSH
ttCSHt
ttCSSt
ttIAGt
CSB
tOZD
SDO
D7
tOD
D1
tODZ
D0
Figure 2. Read Timing Diagram
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6.7 Typical Characteristics
14
60
12
50
Code (decimal)
Rp (kŸ
10
8
6
4
40
30
20
10
2
0
0
0
1
2
3
4
5
6
Distance (mm)
Sensor
Details:
Target
Material:
7
8
0
2
C002
Table 23
RP_MIN:
1.347 kΩ
Stainless
Steel
RP_MAX:
38.785 kΩ
3
4
5
6
7
Distance (mm)
Sensor
Details:
Target
Material:
Figure 3. RP vs Distance
8
1
8
C003
Table 23
RP_MIN:
1.347 kΩ
Stainless
Steel
RP_MAX:
38.785 kΩ
Figure 4. Proximity Data vs Distance
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7 Detailed Description
7.1 Overview
The LDC1000 is an Inductance-to-Digital Converter that measures the parallel impedance of an LC resonator. It
accomplishes this task by regulating the oscillation amplitude in a closed-loop configuration to a constant level,
while monitoring the energy dissipated by the resonator. By monitoring the amount of power injected into the
resonator, the LDC1000 can determine the value of RP; it returns this as a digital value which is inversely
proportional to RP.
The threshold detector block provides a comparator with hysteresis. With the threshold registers programed and
comparator enabled, proximity data register is compared with threshold registers and INTB pin indicates the
output.
The device has a simple 4-wire SPI interface. The INTB pin provides multiple functions which are programmable
with SPI.
The device has separate supplies for Analog and I/O, with analog operating at 5 V and I/O at 1.8-5 V. The
integrated LDO needs a 56 nF capacitor connected from CLDO pin to GND.
7.2 Functional Block Diagram
CFA
CFB
Threshold
Detector
L
INA
Proximity Data
Register
LDC
C
INB
SCLK
4-Wire
Serial
Interface
Frequency
Counter Data
Register
SDI
SDO
CS
INTB
Rs
Power
VDD
GND
VIO
Frequency Counter
DGND
CLDO
TBCLK/XIN
XOUT
7.3 Feature Description
7.3.1 Inductive Sensing
An AC current flowing through an inductor will generate an AC magnetic field. If a conductive material, such as a
metal target, is brought into the vicinity of the coil, this magnetic field will induce circulating currents (eddy
currents) on the surface of the target. These eddy currents are a function of the distance, size, and composition
of the target. The eddy currents then generate their own magnetic field, which opposes the original field
generated by the coil. This mechanism is best compared to a transformer, where the coil is the primary core and
the eddy current is the secondary core. The inductive coupling between both cores depends on distance and
shape. Hence the resistance and inductance of the secondary core (eddy current), shows up as a distant
dependent resistive and inductive component on the primary side (coil). The figures (Figure 5 to Figure 8) below
show a simplified circuit model.
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Feature Description (continued)
d
Metal
Target
Figure 5. Inductor With a Metal Target
Eddy currents generated on the surface of the target can be modeled as a transformer as shown in Figure 6. The
coupling between the primary and secondary coils is a function of the distance and the conductor’s
characteristics. In Figure 6, the inductance LS is the coil’s inductance, and RS is the coil’s parasitic series
resistance. The inductance L(d), which is a function of sensor to target distance, d, is the coupled inductance of
the metal target. Likewise, R(d) is the parasitic resistance of the eddy currents and is also a function of distance.
Eddy
Currents
LS + L(d)
Conductance
of Metal
Target Metal
Surface
Distance d
RS + R(d)
Figure 6. Metal Target Modeled as L and R With Circulating Eddy Currents
Generating an alternating magnetic field with just an inductor will consume a large amount of power. This power
consumption can be reduced by adding a parallel capacitor, turning it into a resonator as shown in Figure 7. In
this manner the power consumption is reduced to the eddy and inductor losses RS+R(d) only.
L(d)
C
Oscillator
RS(d)
Figure 7. LC Tank Connected to Oscillator
10
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Feature Description (continued)
The LDC1000 doesn’t measure the series resistance directly; instead it measures the equivalent parallel
resonance impedance RP (see Figure 8). This representation is equivalent to the one shown in Figure 8, where
the parallel resonance impedance RP(d) is given by:
LS L(d)
RP (d)
R
> S R(d)@ u C
(1)
L(d)
C
RP(d)
Oscillator
Figure 8. Equivalent Resistance of RS in Parallel With LC Tank
Figure 9 below shows the variation in RP as a function of distance for a 14 mm diameter PCB coil (refer to
Sensor Details: Table 23). The target in this example is a section of a 2 mm thick stainless steel disk.
14
12
Rp (kŸ
10
8
6
4
2
0
0
1
2
3
4
5
Distance (mm)
6
7
8
C002
Figure 9. Typical RP vs Distance With 14-mm PCB Coil
7.3.2 Measuring RP With LDC1000
The LDC1000 supports a wide range of LC combinations, with oscillation frequencies ranging from 5 kHz to 5
MHz and RP ranging from 798 Ω to 3.93 MΩ. This range of RP can be viewed as the maximum input range of an
ADC. As illustrated in Figure 9, the range of RP is typically much smaller than the maximum input range
supported by the LDC1000. To get better resolution in the desired sensing range, the LDC1000 offers a
programmable input range through the RP_MIN and RP_MAX registers. Refer to Calculation of Rp_MIN and
Rp_MAX for information on setting these registers.
When the resonance impedance RP of the sensor drops below the programed RP_MIN, the RP output of the LDC
will clip at its full scale output. This situation could, for example, happen when a target comes too close to the
coil.
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Feature Description (continued)
30000
Code (decimal)
25000
20000
15000
10000
5000
0
12
17
22
27
32
37
RP (kŸ
42
47
C002
Figure 10. Transfer Characteristics of LDC1000 With RP_MIN = 16.160 kΩ and RP_MAX = 48.481 kΩ
The resonance impedance can be calculated from the digital output code as follows:
RP _ MAX u RP _ MIN
RP
>RP _ MIN u (1 Y)@ (RP _ MAX u Y)
Where:
•
•
•
•
•
RP = Measured sensor parallel resistance in kΩ.
RP_MIN is the resistance (in kΩ) selected in register 0x02
RP_MAX is the resistance (in kΩ) selected in register 0x01
Y = Proximity Data÷215
Proximity data is the LDC RP output = (Contents of Register 0x22) × 28 + (Contents of register 0x21).
(2)
Example: If Proximity data (address 0x22:0x21) is 5000, RP_MIN is 2.394 kΩ, and RP_MAX is 38.785 kΩ ,the
resonance impedance is given by:
Y = 5000/215 = 0.1526
RP = (38785 × 2394) ÷ (2394 × (1 – 0.1526) + 38785 × 0.1526) = (92851290 ÷ (2028.675 + 5918.591))
RP = 11.683 kΩ
7.3.3 Measuring Inductance With LDC1000
LDC1000 measures the sensor’s frequency of oscillation using a frequency counter. The frequency counter
timing is set by an external clock applied on TBCLK pin. The sensor frequency can be calculated from the
frequency counter register value (see registers 0x23 through 0x25) as follows:
¦EXT u 5(63216(B7,0E
¦SENSOR
3 u FCOUNT
Where:
•
•
•
•
12
ƒSENSOR is the measured sensor frequency
ƒEXT is the frequency of the external clock.
FCOUNT is the value obtained from the Frequency Counter Data registers (address 0x23,0x24,0x25).
RESPONSE_TIME is the programmed response time (set in the LDC configuration register, address 0x04). (3)
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Feature Description (continued)
The sensor inductance can be determined by:
1
L
C u (2S u ¦SENSOR )2
where
•
•
C is the parallel sensor capacitance
ƒSENSOR is the sensor frequency calculated in Equation 3
(4)
Example: If ƒEXT = 6MHz, RESPONSE_TIME = 6144, C = 100 pF and measured Fcount = 3000 (dec) (address
0x23 through 0x25)
ƒsensor=(1/3) × (6000000/3000) × (6144)= 4.096 MHz
L
Now using,
1
C u (2S u ¦SENSOR )2
The sensor inductance L = 15.098 µH.
The accuracy of a measurement largely depends upon the frequency of the external time-base clock (TBCLK). A
higher frequency will provide better measurement accuracy. The maximum supported frequency is 8 MHz.
7.4 Device Functional Modes
7.4.1 Power Modes
The LDC1000 has two power modes:
•
•
Active Mode: In this mode the LDC1000 is performing conversions. Changing any device configuration
settings except PWR_MODE or INTB_MODE when the LDC1000 is in active mode is not recommended. This
mode is selected when PWR_MODE = 1.
Standby Mode: This is the default mode on device power-up. In the mode the LDC1000 power consumption
is lower than when in Active mode, however the LDC1000 is not performing conversions. The device's SPI is
enabled and the device should be configured in this mode. This mode is selected when PWR_MODE = 0.
7.4.2 INTB Pin Modes
The INTB pin is a configurable output pin which can be used to drive an interrupt on an MCU. This mode is
selected by setting INTB_MODE. The LDC1000 provides three different modes on INTB pin:
1. Comparator Mode
2. Wake-Up Mode
3. DRDY Mode
LDC1000 has a built-in High and Low trigger threshold which registers as a comparator with programmable
hysteresis or a special mode which can be used to wake up an MCU. These modes are explained in detail
below.
7.4.2.1 Comparator Mode
In the Comparator mode, the INTB pin is asserted or deasserted when the proximity register value increases
above Threshold High or decreases below Threshold Low registers respectively. In this mode, the LDC1000
essentially behaves as a proximity switch with programmable hysteresis.
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Device Functional Modes (continued)
Threshold High
RP Data
Threshold Low
INTB
t
Figure 11. Behavior of INTB Pin in Comparator Mode
14
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Device Functional Modes (continued)
7.4.2.2 Wake-Up Mode
In Wake-up mode, the INTB pin is asserted when proximity register value increases above Threshold High and
deasserted when wake-up mode is disabled in INTB pin mode register.
This mode can be used to wake up an MCU which is asleep, to conserve power.
Threshold High
RP Data
Threshold Low
INTB
CSB
SPI
SPI: INTB Pin Mode Changed to DRDYB
t
Figure 12. Behavior of INTB Pin in Wake-Up Mode
7.4.2.3 DRDY Mode
In DRDY mode, the INTB pin is asserted every time the conversion data is available and deasserted once the
read command on register 0x21 is registered internally; if the read is in progress, the pin is pulsed instead. It is
recommended to configure this setting after PWR_MODE has been set to 1 (the LDC1000 is in Active Mode).
t1/ODRt
INTB
New Data
available to Read
CSB
SPI
CMD:
Read 0x21
Data Read
CMD:
Read 0x21
t
Figure 13. Behavior of INTB pin in DRDY Mode With SPI Extending Beyond Subsequent Conversions
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Device Functional Modes (continued)
ODRt
t
INTB
CSB
CMD:
Read 0x21
SPI
Data
Read
t
Figure 14. Behavior of INTB Pin in DRDY Mode With SPI Reading the Data Within Subsequent
Conversion
7.5 Programming
The LDC1000 uses a 4-wire SPI to access control and data registers. The LDC1000 is a SPI slave device and
does not initiate any transactions.
7.5.1 SPI Description
A typical serial interface transaction begins with an 8-bit instruction, which is comprised of a read/write bit (MSB,
R=1) and a 7-bit address of the register, followed by a Data field which is typically 8 bits. However, the data field
can be extended to a multiple of 8 bits by providing sufficient SPI clocks. Refer to the Extended SPI Transactions
section below.
1
2
3
4
5
C7
C6
C5
C4
C3
R/Wb
A6
A5
A4
A3
6
7
8
C2
C1
C0
A2
A1
A0
9
10
11
D7
D6
(MSB)
D5
12
13
14
15
16
D2
D1
D0
(LSB)
D2
D1
D0
(LSB)
17
SCLK
CSB
tCOMMAND FIELDt
SDI
R/Wb = Read/Write
0: Write Data
1: Read Data
SDO
Address (7-bits)
tDATA FIELD t
D4
D3
Write DATA
D7
D6
(MSB)
D5
Hi-Z
D4
D3
Read DATA
Data (8-bits)
tSingle Access Cyclet
Figure 15. Serial Interface Protocol
16
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Programming (continued)
Each assertion of chip select bar (CSB) starts a new register access. The R/Wb bit in the command field
configures the direction of the access; a value of 0 indicates a write operation and a value of 1 indicates a read
operation. All output data is driven on the falling edge of the serial clock (SCLK), and all input data is sampled on
the rising edge of the serial clock (SCLK). Data is written into the register on the rising edge of the 16th clock. It
is required to deassert CSB after the 16th clock; if CSB is deasserted before the 16th clock, no data write will
occur.
The LDC1000 utilizes a 4-wire SPI interface to access control and data registers. The LDC1000 is an SPI slave
device and does not initiate any transactions.
7.5.1.1 Extended SPI Transactions
A SPI transaction may be extended to multiple registers by keeping the CSB asserted for more than 16 pulses
on SCLK. In this mode, the register addresses increment automatically. CSB must be remain asserted during
8*(1+N) clock cycles of SCLK, where N is the amount of bytes to write or read during the transaction.
During an extended read access, SDO outputs the register contents every 8 clock cycles after the initial 8 clocks
of the command field. During an extended write access, the data is written to the registers every 8 clock cycles
after the initial 8 clocks of the command field.
Extended transactions can be used to read 16 bits of Proximity data and 24 bits of frequency data all in one SPI
transaction by initiating a read from register 0x21.
CSB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
LSB
MSB
D0
D7
19
20
21
22
23
24
SCK
tCOMMAND FIELDt
tDATA FIELD for ADDRESS A+1t
tDATA FIELD for ADDRESS At
MSB
SDI
__
R/W
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
LSB
D6
MSB
SDO
D7
R/W = Instruction
1: Read
0: Write
D6
D5
D4
D3
D2
D4
D3
D2
D1
D0
Write Data to Address A+1 (8bits)
Write Data to Address A (8bits)
Address (7 bits)
D5
D1
LSB
MSB
D0
D7
Read Data from Address A
(8-bits)
LSB
D6
D5
D4
D3
D2
D1
D0
Read Data from Address A+1
(8-bits)
Figure 16. Extended SPI Transaction
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7.6 Register Maps
Table 1. Register Description (1) (2) (3)
Register
Name
Address
Direction Default
Device ID
0x00
RO
0x84
Device ID
RP_MAX
0x01
R/W
0x0E
RP Maximum
RP_MIN
0x02
R/W
0x14
RP Minimum
Watchdog
Timer
Frequency
0x03
R/W
0x45
Min Sensor Frequency
LDC
Configuration
0x04
R/W
0x1B
Clock
Configuration
0x05
R/W
0x01
Comparator
Threshold
High LSB
0x06
R/W
0xFF
Threshold High LSB
Comparator
Threshold
High MSB
0x07
R/W
0xFF
Threshold High MSB
Comparator
Threshold
Low LSB
0x08
R/W
0x00
Threshold Low LSB
Comparator
Threshold
Low MSB
0x09
R/W
0x00
Threshold Low MSB
INTB pin
Configuration
0x0A
R/W
0x00
Power
Configuration
0x0B
R/W
0x00
Status
0x20
RO
Proximity
0x21
RO
Proximity Data[ 7:0] Data LSB
Proximity
0x22
RO
Proximity Data [15:8] Data MSB
Frequency
Counter Data
LSB
0x23
RO
FCOUNT LSB
Frequency
Counter Data
Mid-Byte
0x24
RO
FCOUNT Mid Byte
Frequency
Counter Data
MSB
0x25
RO
FCOUNT MSB
(1)
(2)
(3)
Bit 7
Bit 6
Bit 5
Bit 4
Reserved (000)
Bit 3
Bit 2
Amplitude
Bit 1
RESPONSE_TIME
Reserved (00'0000)
CLK_SE
L
Reserved (0'0000)
DRDY
Wake-up
CLK_PD
INTB_MODE
Reserved (000'0000)
OSC
Dead
Bit 0
PWR_M
ODE
Compara
tor
Don't Care
Values of register fields which are unused should be set to default values only.
Registers 0x01 through 0x05 are Read Only when the part is awake (PWR_MODE bit is SET)
R/W: Read/Write. RO: Read Only. WO: Write Only.
Table 2. Revision ID
Address = 0x00, Default=0x80, Direction=RO
18
Bit Field
Field Name
Description
7:0
Revision ID
Revision ID of Silicon.
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Table 3. RP_MAX
Address = 0x01, Default=0x0E, Direction=R/W
Bit Field
Field Name
Description
7:0
RP Maximum
Maximum Sensor RP that LDC1000 needs to
measure. Configures the input dynamic
range of LDC1000. See Table 4 for register
settings.
Table 4. Register Settings for RP_MAX
Register setting
RP Maximum Sensor Drive (kΩ)
0x00
3926.991
0x01
3141.593
0x02
2243.995
0x03
1745.329
0x04
1308.997
0x05
981.748
0x06
747.998
0x07
581.776
0x08
436.332
0x09
349.066
0x0A
249.333
0x0B
193.926
0x0C
145.444
0x0D
109.083
0x0E
83.111
0x0F
64.642
0x10
48.481
0x11
38.785
0x12
27.704
0x13
21.547
0x14
16.160
0x15
12.120
0x16
9.235
0x17
7.182
0x18
5.387
0x19
4.309
0x1A
3.078
0x1B
2.394
0x1C
1.796
0x1D
1.347
0x1E
1.026
0x1F
0.798
Table 5. RP_MIN
Address = 0x02, Default=0x14, Direction=R/W
(1)
Bit Field
Field Name
Description
7:0
RP Minimum
Minimum Sensor RP that LDC1000 needs to measure. Configures the
input dynamic range of LDC1000. See Table 6 for register settings. (1)
This register needs a mandatory write as it defaults to 0x14.
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Table 6. Register Settings for RP_MIN
20
Register setting
RP Minimum Sensor Drive (kΩ)
0x20
3926.991
0x21
3141.593
0x22
2243.995
0x23
1745.329
0x24
1308.997
0x25
981.748
0x26
747.998
0x27
581.776
0x28
436.332
0x29
349.066
0x2A
249.333
0x2B
193.926
0x2C
145.444
0x2D
109.083
0x2E
83.111
0x2F
64.642
0x30
48.481
0x31
38.785
0x32
27.704
0x33
21.547
0x34
16.160
0x35
12.120
0x36
9.235
0x37
7.182
0x38
5.387
0x39
4.309
0x3A
3.078
0x3B
2.394
0x3C
1.796
0x3D
1.347
0x3E
1.026
0x3F
0.798
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Table 7. Watchdog Timer Frequency
Address = 0x03, Default=0x45, Direction=R/W
Bit Field
Field Name
Description
7:0
Min Sensor Frequency
Sets the watchdog timer. The Watchdog timer should be set based on the
lowest sensor frequency. If this field is set to too high a value, then the
LDC1000 may incorrectly determine a sensor oscillation timeout.
M
§¦
·
68.94 u log10 ¨ SENSOR ¸
2
5
00
©
¹
where:
•
•
ƒSENSOR is the sensor frequency
M is the register value to program for Min Sensor
Frequency.
(5)
Example:
With a Sensor frequency is 1 MHz
Min Sensor Frequency=68.94*log10(1×106/2500)=Round to nearest
integer(179.38) = 179
Table 8. LDC Configuration
Address = 0x04, Default=0x1B, Direction=R/W
Bit Field
Field Name
7:5
Reserved
Reserved to 000
Description
4:3
Amplitude
Sets the oscillation amplitude
00:1V
01:2V
10:4V
11:Reserved
2:0
RESPONSE_TIME
000: Reserved
001: Reserved
010: 192
011: 384
100: 768
101: 1536
110: 3072
111: 6144
Table 9. Clock Configuration
Address = 0x05, Default=0x01, Direction=R/W
Bit Field
Field Name
Description
7:2
Reserved
Reserved to 00'0000.
1
CLK_SEL
Select Clock input type for L measurements.
0: Clock input on XIN pin
1: Crystal connected across XIN/XOUT pins.
0
CLK_PD
Crystal Power Down.
0: Crystal drive enabled.
1: Crystal drive is disabled. Use this setting to reduce power
consumption with a crystal input when device is in Standby mode.
Use this setting for clock input.
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Table 10. Comparator Threshold High LSB
Address = 0x06, Default=0xFF, Direction=R/W
Bit Field
Field Name
7:0
Threshold High
Description
Threshold High Register LSB. Combine with contents of register 0x07 to
set upper threshold.
Table 11. Comparator Threshold High MSB
Address = 0x07, Default=0xFF, Direction=R/W
Bit Field
Field Name
7:0
Threshold High
Description
Threshold High Register MSB.
Table 12. Comparator Threshold Low LSB
Address = 0x08, Default=0x00, Direction=R/W
Bit Field
Field Name
Description
7:0
Threshold Low
Threshold Low Register LSB. Combine with contents of register 0x09 to set
lower threshold.
Table 13. Comparator Threshold Low MSB
Address = 0x09, Default=0x00, Direction=R/W
Bit Field
Field Name
Description
7:0
Threshold Low
Threshold Low Register MSB.
Table 14. INTB pin Configuration
Address = 0x0A, Default=0x00, Direction=R/W
Bit Field
Field Name
7:3
Reserved
2:0
INTB_MODE
Description
Reserved to 00'000
000: All modes disabled. No signal output on INTB pin.
001: Wake-up Enabled on INTB pin
010: INTB pin indicates the status of Comparator output
100: DRDY Enabled on INTB pin
All other combinations are Reserved
Table 15. Power Configuration
Address = 0x0B, Default=0x00, Direction=R/W
22
Bit Field
Field Name
7:1
Reserved
0
PWR_MODE
Description
Reserved to 000'0000.
0:Standby mode: LDC1000 is in a lower power mode but not actively
converting. It is recommended to configure the LDC1000 while in this
mode.
1:Active Mode. Conversion is Enabled
Refer to Power Modes for more details.
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Table 16. Status
Address = 0x20, Default=NA, Direction=RO
Bit Field
Field Name
Description
7
OSC Status
1:Indicates sensor oscillation timeout. This can be caused by a sensor with
an RP below RP_MIN or setting Min Sensor Frequency too high.
6
Data Ready
5
Wake-up
0:Sensor oscillation timeout not detected.
1:No new data available
0:Data is ready to be read
1:Wake-up disabled
0:Wake-up triggered. Proximity data is more than Threshold High value.
4
Comparator
3:0
Don't Care
1:Proximity data is less than Threshold Low value
0:Proximity data is more than Threshold High value
It is recommended to read register 0x21 immediately after any read of register 0x20.
Table 17. Proximity Data LSB
Address = 0x21, Default=NA, Direction=RO
Bit Field
Field Name
Description
7:0
Proximity Data[7:0]
Least Significant Byte of Proximity Data
Conversion data is updated to the proximity register only when a read is initiated on 0x21 register. If the read is
delayed between subsequent conversions, these registers are not updated until another read is initiated on 0x21.
Table 18. Proximity Data MSB
Address = 0x22, Default=NA, Direction=RO
Bit Field
Field Name
Description
7:0
Proximity data [15:8]
Most Significant Byte of Proximity data
Table 19. Frequency Counter LSB
Address = 0x23, Default=NA, Direction=RO
Bit Field
Field Name
7:0
FCOUNT LSB (FCOUNT[7:0])
Description
LSB of Frequency Counter. Sensor frequency can be calculated using the
output data rate. Please refer to the Measuring Inductance With LDC1000.
Table 20. Frequency Counter Mid-Byte
Address = 0x24, Default=NA, Direction=RO
Bit Field
Field Name
7:0
FCOUNT Mid byte (FCOUNT[15:8])
Description
Middle Byte of Output data rate
Table 21. Frequency Counter MSB
Address = 0x25, Default=NA, Direction=RO
Bit Field
Field Name
7:0
FCOUNT MSB (FCOUNT[23:16])
Description
MSB of Output data rate
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Calculation of RP_MIN and RP_MAX
Different sensing applications may have a different range of the resonance impedance RP to measure. The
LDC1000 measurement range of RP is controlled by setting 2 registers – RP_MIN and RP_MAX. For a given
application, RP must never be outside the range set by these register values, otherwise the measured value will
be clipped. For optimal sensor resolution, the range of RP_MIN to RP_MAX should not be unnecessarily large.
The following procedure is recommended to determine the RP_MIN and RP_MAX register values.
8.1.1.1 RP_MAX
RP_MAX sets the upper limit of the LDC1000 resonant impedance input range.
•
•
•
Configure the sensor such that the eddy current losses are minimized. As an example, for a proximity sensing
application, set the distance between the sensor and the target to the maximum sensing distance.
Measure the sensor impedance RP using an impedance analyzer.
Multiply RP by 2 and use the next higher value from Table 7.
Note that setting RP_MAX to a value not listed in Table 7 can result in indeterminate behavior.
8.1.1.2 RP_MIN
RP_MIN sets the lower limit of the LDC1000 resonant impedance input range.
•
•
•
Configure the sensor such that the eddy current losses are maximized. As an example, for a proximity
sensing application, set the distance between the sensor and the metal target to the minimum sensing
distance.
Measure the sensor impedance RP using an impedance analyzer.
Divide the RP value by 2 and then select the next lower RP value from Table 10.
Note that setting RP_MIN to a value not listed on Table 10 can result in indeterminate behavior. In addition,
RP_MIN powers on with a default value of 0x14 which must be changed to a value from Table 10 prior to
powering on the LDC.
8.1.2 Output Data Rate
The output data rate of (or the conversion time) LDC1000 depends on the sensor frequency, ƒsensor and
RESPONSE_TIME field in LDC Configuration register(Address:0x04). The maximum sample rate requires a
RESPONSE_TIME setting of 192 and a sensor frequency of 5MHz.
3 u ¦SENSOR
SR
RESPONSE_TIME
(6)
8.1.3 Choosing Filter Capacitor (CFA and CFB Pins)
The filter capacitor is critical to the operation of the LDC1000. The capacitor should be low leakage, temperature
stable, and it must not generate any piezoelectric noise (the dielectrics of many capacitors exhibit piezoelectric
characteristics and any such noise is coupled directly through RP into the converter). The optimal capacitance
values range from 20 pF to 100 nF. The value of the capacitor is based on the time constant and resonating
frequency of the sensor.
24
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Application Information (continued)
If a ceramic capacitor is used, then a C0G (or NP0) grade dielectric is recommended; the voltage rating should
be ≥10 V. The traces connecting CFA and CFB to the capacitor should be as short as possible to minimize any
parasitics.
For optimal performance, the chosen filter capacitor, connected between pins CFA and CFB, needs to be as
small as possible, but large enough such that the active filter does not saturate. The size of this capacitor
depends on the time constant of the sense coil, which is given by L/RS, (L=inductance, RS=series resistance of
the inductor at oscillation frequency). The larger this time constant, the larger filter capacitor is required. Hence,
this time constant reaches its maximum when there is no target present in front of the sensor.
The following procedure can be used to find the optimal filter capacitance:
1. Start with a large filter capacitor. For a ferrite core coil, 10 nF is usually large enough. For an air coil or PCB
coil, 100 pF is usually large enough.
2. Power on the LDC1000 and set the desired register values. Minimize the eddy currents losses, by minimizing
the amount of conductive target covering the sensor. For an axial sensing application, the target should be at
the farthest distance from coil. For a lateral or angular position sensing application, the target coverage of the
coil should be minimized.
3. Observe the signal on the CFB pin using a scope. Because this node is very sensitive to capacitive loading,
it is recommended to use an active probe. As an alternative, a passive probe with a 1 kΩ series resistance
between the tip and the CFB pin can be used. The time scale of the scope should be set so that 10-100
cycles of the sensor oscillation frequency are visible. For example, if the sensor frequency is 1 MHz, the
timescale per division of the oscilloscope should be set to 0.1ms.
4. Vary the values of the filter capacitor until that the signal observed on the CFB pin has an amplitude of
approximate 1 VPP. This signal scales linearly with the reciprocal of the filter capacitance. For example, if a
100 pF filter capacitor is applied and the signal observed on the CFB pin has a peak-to-peak value of 200
mV, the desired 1 VPP value is obtained using a 200 mV / 1 V * 100 pF = 20 pF filter capacitor.
8.2 Typical Application
8.2.1 Axial Distance Sensing Using a PCB Sensor With LDC1000
LDC10xx NHR
18uH
Figure 17. Typical Application Schematic, LDC1000
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Typical Application (continued)
8.2.1.1 Design Requirements
For this design example, use the following as the input parameters.
Table 22. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Minimum sensing distance
1 mm
Maximum sensing distance
7 mm
Sample rate
28 KSPS
Number of PCB layers for sensor
2 layers with 62 mil (1.8mm) PCB thickness
Sensor Diameter
551 mil (14 mm)
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 Sensor and Target
In this example, consider a PCB sensor with the below characteristics:
Table 23. Sensor Characteristics
PARAMETER
VALUE
Thickness of PCB copper
1 Oz-Cu (35µm)
Coil shape
Circular
Number of turns
23
Trace thickness
4 mil (0.102mm)
Trace spacing
4 mil (0.102mm)
PCB core material
FR4
RP @ 1 mm target-sensor distance
5 kΩ
RP @ 7 mm target-sensor distance
12.5 kΩ
Nominal sensor Inductance
18 µH
The target is a stainless steel disk of 15mm diameter and has a thickness of 1mm.
8.2.1.2.2 Calculating Sensor Capacitor
Sensor frequency depends on various factors in the application. For this example, one of the design parameters
is a sample rate of 28 KSPS, which requires the sensor frequency as calculated below:
3 u ¦SENSOR
SR
RESPONSE_TIME
(7)
With an LDC1000 RESPONSE_TIME setting of 384 and output data rate specification of 28 KSPS, the sensor
frequency would have to be 3.6 MHz.
Now, using the below formula, the sensor capacitor is calculated to be 108 pF with the sensor inductance of 18
µH. A 100 pF sensor capacitor will slightly increase the sensor frequency to 3.75 MHz, and provide a sample
rate of 29.3 KSPS.
1
L
C u (2S u ¦SENSOR )2
(8)
As the target interacts with the sensor inductance, the apparent inductance will decrease. When the target is at
the 1mm minimum distance for this application, the maximum interaction will occur, and the sensor frequency will
increase to 3.95 MHz.
26
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8.2.1.2.3 Choosing Filter Capacitor
Using the steps given in Choosing Filter Capacitor (CFA and CFB Pins), the filter capacitor for the example
sensor is 20 pF. The waveform below shows the pattern on CFB pin with 100 pF and 20 pF filter capacitor.
Notice that the timescale of scope traces is sufficient to vew the waveform over many cycles of the sensor
oscillation.
Figure 18. Waveform on CFB With 100 pF
Figure 19. Waveform on CFB With 20 pF
8.2.1.2.4 Setting RP_MIN and RP_MAX
Calculating value for RP_MAX Register : RP at 8 mm is 12.5 kΩ, 12500×2 = 25000. In Table 7, then 27.704 kΩ is
the nearest value larger than 25 kΩ; this corresponds to RP_MAX setting of 0x12.
Calculating value for RP_MIN Register : RP at 1mm is 5 kΩ, 5000/2 = 2500. In Table 6, 2.394 kΩ is the nearest
value lower than 2.5 kΩ; this corresponds to RP_MIN setting of 0x3B.
8.2.1.2.5 Calculating Minimum Sensor Frequency
Using
M
§¦
·
68.94 u log10 ¨ SENSOR ¸
© 2500 ¹
(9)
M is 218.96, which rounds to 219 decimal. This value should to be written into Watchdog Timer Register
(address 0x03).
The LDC1000 includes a watchdog which monitors the sensor oscillation and flags an error in the STATUS
register if no transitions occur on the sensor in a given time window. The time window is controlled by the Min
Frequency setting. If the Min Sensor Frequency is programmed for too high a frequency, the watchdog will
erroneously indicate that the sensor has stopped oscillating. If the Min Sensor Frequency is set too low, then the
LDC1000 will take a longer time to detect if the sensor oscillation has stopped.
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8.2.1.3 Application Curve
14
12
Rp (kŸ
10
8
6
4
2
0
0
1
2
3
4
5
6
Distance (mm)
7
8
C002
Figure 20. RP vs Distance
9 Power Supply Recommendations
The LDC1000 is designed to operate from an analog supply range of 4.75 V to 5.25 V and digital I/O supply
range of 1.8 V to 5.25 V. The analog supply voltage should be greater than or equal to the digital supply voltage
for proper operation of the device. The supply voltage should be well regulated. If the supply is located more than
a few centimeters from the LDC1000, additional bulk capacitance may be required in addition to the ceramic
bypass capacitors. A capacitor with a value of 10 uF is usually sufficient.
10 Layout
10.1 Layout Guidelines
•
•
•
•
•
•
•
28
The VDD and VIO pin should be bypassed to ground with a low ESR ceramic bypass capacitor. The typical
recommended bypass capacitance is 0.1 µF ceramic with a X5R or X7R dielectric. Some applications may
require additional supply bypassing for optimal LDC1000 operation; for these applications the smallest-valued
capacitor should be placed closest to the corresponding supply pin.
The optimum placement is closest to the VDD/VIO and GND/DGND pins of the device. Take care to minimize
the loop area formed by the bypass capacitor connection, the VDD/VIO pin, and the GND/DGND pin of the
IC. See Figure 21 for a PCB layout example.
The CLDO pin should be bypassed to digital ground (DGND) with a 56 nF ceramic bypass capacitor.
The filter capacitor selected for the application using the procedure described in section Choosing Filter
Capacitor (CFA and CFB Pins) is connected between CFA and CFB pins. Place the filter capacitor close to
the CFA and CFB pins. Do not use any ground or power plane below the capacitor and the trace connecting
the capacitor and the CFA /CFB pins.
Use of separate ground planes for GND and DGND is recommended with a star connection. See Figure 21
for a PCB layout example.
The sensor capacitor should be a C0G capacitor placed as close as possible to the sensor coil. Refer to
LDC Sensor Design App Note for more details.
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10.2 Layout Example
Figure 21. LDC1000 Board Layout
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11 Device and Documentation Support
11.1 Documentation Support (if applicable)
11.1.1 Related Documentation
IC Package Thermal Metrics application report, SPRA953
LDC Sensor Design Application NoteSNOA930
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
30
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PACKAGE OPTION ADDENDUM
www.ti.com
28-Jan-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LDC1000NHRJ
NRND
WSON
NHR
16
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LDC1000
LDC1000NHRR
NRND
WSON
NHR
16
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LDC1000
LDC1000NHRT
NRND
WSON
NHR
16
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LDC1000
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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