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Table of Contents
User’s Guide
LM10500 Step-Down Converter Evaluation Module User's
Guide
Table of Contents
1 LM10500 Overview..................................................................................................................................................................1
2 Adaptive Voltage Scaling Technology.................................................................................................................................. 1
3 Features...................................................................................................................................................................................2
4 Applications............................................................................................................................................................................ 2
5 Evaluation Kit Overview.........................................................................................................................................................2
6 Typical Application Circuit.....................................................................................................................................................4
7 Connection Guide...................................................................................................................................................................5
7.1 Default Setting and Operation Options.............................................................................................................................. 5
7.2 Terminal Descriptions.........................................................................................................................................................5
7.3 Jumper Settings................................................................................................................................................................. 6
8 Operation Guide......................................................................................................................................................................6
8.1 Standalone Operation........................................................................................................................................................ 6
8.2 PWI Communication Using USB2PWI Board.................................................................................................................... 6
8.3 PWI Communication Using 9-Pin Connector J1................................................................................................................ 7
9 User’s GUI for LM10500 Evaluation Board...........................................................................................................................7
9.1 Quick Start Guide...............................................................................................................................................................7
9.2 GUI Layout and Conventions............................................................................................................................................. 8
9.3 Register Read and Register Write......................................................................................................................................9
10 Typical Performance Characteristics................................................................................................................................ 11
11 Evaluation Board Schematic............................................................................................................................................. 13
12 Evaluation Board Bill of Materials.....................................................................................................................................14
13 Evaluation Board Layout....................................................................................................................................................15
14 Revision History................................................................................................................................................................. 17
Trademarks
PowerWise® is a registered trademark of Phybridge Inc..
All trademarks are the property of their respective owners.
1 LM10500 Overview
The LM10500 is a 5-A energy management unit (EMU) that actively reduces system level power consumption
by utilizing a continuous, real-time, closed-loop adaptive voltage scaling (AVS) scheme. The LM10500 operates
cooperatively with PowerWise® AVS-compatible ASICs, SoCs, and processors to optimize supply voltages
adaptively over process and temperature variations. The device is controlled through PWI 1.0 or PWI 2.0
high-speed serial interface.
A typical power saving of 40% can be achieved when LM10500 is used with AVS-compatible ASICs, SoCs, and
processors.
2 Adaptive Voltage Scaling Technology
PowerWise adaptive voltage scaling (AVS) technology is an advanced closed-loop technology for reducing
active and standby energy consumption of digital processing engines and ASICs. Hardware performance
monitor (HPM) is designed into the digital engine together with an advanced power controller (APC) to monitor
the performance of the silicon based on process and temperature variation. Information is fed back to an energy
management unit (EMU), which then sets the voltage precisely according to the needs of the processor. The
AVS technology enables optimum power delivery to the processors, ASICs, and SoCs, which maximizes overall
system energy savings. AVS technology is process and architecture independent.
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Features
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3 Features
•
•
•
•
•
•
•
•
•
•
•
Closed-loop adaptive voltage scaling
PWI 1.0-/PWI 2.0-compatible
Resistor-programmable switching frequency
Frequency synchronization
Precision enable
Internal soft start to reduce in-rush current
Power good (PWROK)
Undervoltage lockout (UVLO)
Overvoltage protection (OVP)
Cycle-by-cycle current limiting (OCP)
Thermal shutdown
4 Applications
•
•
•
•
•
Point-of-load regulation
Servers and networking cards
Storage devices
Set-top box processors
Medical and industrial processors
5 Evaluation Kit Overview
The LM10500 evaluation boards can operate standalone, communicate to a USB2PWI interface board, or to
an external AVS primary. The USB2PWI interface board and a graphic user interface (GUI) are included in the
evaluation kit to easily evaluate the LM10500 AVS functionality from a PC. The evaluation kit is consist of:
•
•
•
•
LM10500 evaluation board, as shown in Figure 5-1
USB2PWI interface board, as shown in Figure 5-2
5-pin mini USB cable
A CD, including:
– LM10500 evaluation GUI
– LM10500 data sheet
– LM10500 evaluation board user's guide (this document)
There are two versions of LM10500 evaluation board: LM10500SQ-0.8EV and LM10500-1.0EV. The differences
of the two versions are summarized in the following table.
2
Evaluation Board ID
LM10500SQ-0.8EV
LM10500SQ-1.0EV
Device ID
LM10500SQ-0.8
LM10500SQ-1.0
Board Default Output Voltage, VOUT
0.8 V
1.2 V
Feedback Node Default Voltage, VFB
0.8 V
1.0 V
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Evaluation Kit Overview
Figure 5-1. LM10500 Evaluation Board
Figure 5-2. USB2PWI Interface Board
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Typical Application Circuit
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6 Typical Application Circuit
I/O Voltage PS
I/O Voltage
Domain
CVPWI
VIN
+3.0 ~
+18.0V
VPWI
SPWI
SCLK
PVIN
CIN
RF
Advanced
Power
Controller
(APC)
AVIN
CF
LM10500
AVS
VDD2
CVDD2
CBOOT
CBOOT
VDD1
CVDD1
SW
Hardware
Performance
Monitor (HPM)
VOUT
L
RFB1
RADDR
FB
COUT
AVS range: 0.6~1.0V
ADDR
RFB2
RFRQ
SYNC
Start up to 0.8V or 1.0V
PGND
FREQ
CFRQ
RC
CC
Core AVS
Domain
5A max
COMP
EN
PWROK
EN
PWROK
AGND
DGND
ASIC / SoC
Figure 6-1. Typical Application Circuit
4
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Connection Guide
7 Connection Guide
7.1 Default Setting and Operation Options
The designed default condition and operating range for the LM10500 Evaluation Board are shown in the
following table.
Parameter
Default Setting
PVIN
J7 open
Connect to External Supply =
12V
AVIN
= PVIN
by JP2
Operation Range and Options
J7 open, connect PVIN to external supply. Voltage range is between 3 V
and 18 V.
J7 closed, PVIN is connected to VBAT = 3.6 V. VBAT is generated by the
USB2PWI board. To protect the USB2PWI board, do not connect PVIN to
an external power supply with J7 closed. Loading capability of VBAT is very
limited.
On JP2, connect AVIN to PVIN. AVIN follows PVIN voltage.
VOUT
1.2 V @LM10500SQ-1.0EV
0.8 V @LM10500SQ-0.8EV
On JP2, connect AVIN to AVIN_EXT. AVIN_EXT can be connected to an
external supply. Voltage range is between 3 V and 18 V, regardless of
PVIN voltage. Note that AVIN = 5 V provides optimal efficiency.
0.6 V to 5 V (with resistor divider and PWI programming)
On JP1, connect VPWI to 2.5 V. VPWI is powered by on-board LDO.
VPWI
2.5 V
On JP1, connect VPWI to VPWI_EXT. VPWI is powered by external supply
(1.8 V - 10% to 3.3 V + 10%).
J2 close, frequency range is from 300 kHz to 1.5 MHz, programmed by
R20.
Switching Frequency
300 kHz
IOUT
J2 open, switch node can be synchronized to an external clock. Note that
R20 should also be selected to provide the same frequency as the external
clock. Please refer to the LM10500 5A Step-Down Energy Management
Unit w/PowerWise Adaptive Voltage Scaling data sheet for more details.
0 A to 5 A
No. of PCB Layers
4
Max Temperature
85°C
7.2 Terminal Descriptions
Terminals
Description
PVIN
Connect the power supply between this terminal and the GND terminal beside it. The device is rated between 3
V to 18 V. The absolute maximum voltage rating is 22 V.
GND
The GND terminals are meant to provide close return paths to the power and signal terminals besides them.
They are all connected together on board.
SW
VOUT
FB
AVIN_EXT
SYNC
PWROK
VPWI_EXT
J4 J5 J6
J1
SW is connected to the switch node of the power stage. It can be used to monitor the switch node waveform by
a scope.
VOUT terminal is connected to the output capacitor on the board and should be connected to the load
FB terminal is connected to the FB pin of the LM10500. It can be used to monitor the AVS voltage command
programmed by PWI. Careful not to add any noise to the FB terminal or load it by any means.
External AVIN supply. Connect AVIN to AVIN_EXT on JP2 to power AVIN externally.
Synchronizing clock input. When J2 is Closed, switching frequency is controlled by the on board resistor R20.
When J2 is Open, the switch node waveform will be synchronized to the clock source connected to SYNC
terminal.
This terminal connects to the PWROK pin of the LM10500. PWROK is pulled up to 2.5V through a 10-kΩ
resistor.
External VPWI supply. Connect VPWI to VPWI_EXT on JP2 to power VPWI externally.
Connectors to the USB2PWI board shown in Section 8.2; see Section 8.2.
Connector to monitor AVS signal or to an external controller; see Section 8.3.
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Connection Guide
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7.3 Jumper Settings
Jumpers
JP1
JP2
J2
Description
VPWI selection, default VPWI = 2.5 V
AVIN selection, default AVIN = PVIN
Default Closed: switching frequency is controlled by R20 (300 kHz default)
When Open: switching frequency is synchronized to clock source connected to SYNC terminal
Default OPEN
J3
Should only be connected when AVIN ≤ 5 V. When AVIN ≤ 5 V, connecting J3 can improve efficiency.
Caution: if AVIN > 5.5 V, connecting J3 could damage the LM10500 device.
Default OPEN
J7
P1
Should only be connected when no voltage supply is connected to PVIN and AVIN. Intended for easy
demonstration of the board by powering PVIN and AVIN by VBAT = 3.6 V.
Caution: if PVIN is higher than 5.5 V, connecting J7 could damage the USB2PWI board. VBAT can not support
large load current.
PWI version and address selection. Note that the LM10500 supports PWI1, PWI2-0, PWI2-1, PWI2-2, and
PWI2-3. The USB2PWI board supports PWI1 and PWI2-0.
8 Operation Guide
8.1 Standalone Operation
The LM10500 evaluation board can operate standalone without PWI interface connected. It is a full-featured
high performance 5-A synchronous buck regulator optimized for solution size, flexibility, and high conversion
efficiency. It also features monolithic integration of the following:
•
•
•
•
•
•
•
•
•
•
High-side and low-side power MOSFETs
Resistor programmable switching frequency
Frequency synchronization
Internal soft start
Precision enable
Power-good (PWROK) indicator
Input undervoltage lockout
Overvoltage protection
Overcurrent protection
Thermal shutdown
8.2 PWI Communication Using USB2PWI Board
The unique feature of the LM10500 is close-loop adaptive voltage scaling (AVS) capability. The LM10500
operates cooperatively with PowerWise AVS-compatible ASICs, SoCs, and processors to optimize supply
voltages adaptively over process and temperature variations. To simplify the evaluation of the AVS functions
in the LM10500, the evaluation board is designed to operate with the USB2PWI interface board (included in the
evaluation kit). With the USB2PWI board, PWI registers and LM10500 operating states can be controlled by a
PC through a simple register-based graphical user interface (GUI). Connect the LM10500 evaluation board on
top of the USB2PWI board by J4, J5 and J6, as shown in Figure 8-1, then connect the USB2PWI board to a PC
with a 5-pin mini USB cable (included in the evaluation kit).
Figure 8-1. Connecting the LM10500 Evaluation Board to the USB2PWI Interface Board
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Operation Guide
The USB2PWI board is powered by the USB port. It generates a 3.6-V VBAT. VBAT is used on the evaluation
board to provide the on board 2.5 V, which can be used to power VPWI. VBAT can also be connected to PVIN
to power the LM10500 when no other power supply is available, but the loading capability is limited on VBAT. If
available, PVIN should be powered by a bench supply with sufficient voltage and current ranges.
8.3 PWI Communication Using 9-Pin Connector J1
The LM10500 evaluation board can also interface to an AVS-compatible primary controller using J1. All signals
related to the PWI signaling environment are available on this 1x9 header on the edge of the board. Although
primarily intended for signal inspection, this header also allows external control of the PWI communication.
This connector allows the LM10500 to be tested in a closed AVS loop with a primary controller, such as AVS
compatible ASICs, SoCs, and processors.
The pin list of J1 is shown in the following table.
Pin
Label
Type
Description
1
GND
GND
Ground
2
VBAT
Power
VBAT or sense
3
PWROK
Output
PWROK
4
RESETN
Input
1: Active
0: Reset
5
ENABLE
Input
1: Enabled
0: Disabled
6
SPWI
Input/Output
PWI data
7
SCLK
Input
PWI clock
8
VPWI
Power
VPWI-EXT or sense
9
GND
GND
Ground
The pins are spaced at 100-mil intervals. They can also be used as a sensing pin to determine the drive level
for the PWI interface pins: SCLK, SPWI, PWROK, ENABLE, and RESETN. VBAT and VPWI should be used as
the control voltage input when the USB2PWI board is not connected. SPWI and SCLK are PWI communication
data pin and clock pin, respectively. ENABLE is connected to the EN pin of the device. It is pulled up to AVIN
through a 10-kΩ resistor on the board. This pin also can be used to enable/disable the device externally. If driven
externally, a voltage typically greater than 1.2 V will enable the device. VPWI is for powering VPWI pin externally
or monitoring the VPWI pin. VPWI range is from (1.8 V– 10%) to (3.3 V + 10%).
9 User’s GUI for LM10500 Evaluation Board
A user’s GUI is provided to control LM10500 evaluation boards through USB connection. The GUI for LM10500
is shown in Figure 9-1. It is compatible with both PWI1.0 and PWI2.0. The GUI supports PWI1.0 and PWI2.0
address 0. The LM10500 device supports PWI1.0 and PWI2.0 address 0, 1, 2, and 3. The GUI can read and
write LM10500 registers to control and monitor the output voltage and operation mode. The GUI can also
enable, reset the LM10500, and control the operation states, such as sleep, wake up, shutdown and reset, by
generating PWI commands. All AVS functions of the LM10500 can be tested easily through the GUI.
9.1 Quick Start Guide
1. Connect the LM10500 evaluation board to the USB2PWI interface board (as in Figure 8-1) and plug the
USB2PWI board to a PC using a USB cable. Apply PVIN and AVIN power to the LM10500 evaluation board.
The part is enabled by default. Press the reset button on the SUB2PWI board. The reset button is the blue
button located right next to the USB connector.
2. Run the GUI by double clicking ‘Evaluation.exe’, with ‘Evaluation.ini’ and ‘usblptio.dll’ in the same folder,
from the PC. The default state of the GUI is shown in Figure 9-1.
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User’s GUI for LM10500 Evaluation Board
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Figure 9-1. User's GUI For The LM10500 Evaluation Board
3. (Optional) Check authentication by clicking the ‘Authenticate’ button on the bottom right of the GUI. Then
click ‘R’ on the right of the ‘Auth_OK’ button to read back the authentication result. If ‘PWROK’ and
“Auth_OK’ are both ‘1’ (in their depressed positions), then authentication is succeeded and the GUI is ready
to control the LM10500 evaluation board.
4. CTRL + R, or from the menu 'Operations', select 'Read all', the default register values will be read from the
LM10500 and shown in the GUI, as in Figure 9-2. If the default register setting does not show, press reset
button on the USB2PWI board and repeat this step.
Figure 9-2. The LM10500 GUI With Default Register Values And Status (LM10500SQ-0.8)
Note
Note that picture shows the default values for LM10500SQ-0.8 with PWI1.0. For LM10500SQ-1.0, R9
is 0H. For PWI2.0 protocol, R4 is 02H.
9.2 GUI Layout and Conventions
Buttons in their depressed position mean that the corresponding bits are equal to 1, logic high, and in the raised
position show the corresponding bits are equal to 0, logic low. '-0-' on a button means the bit is not used.
Reading from unused bits returns '0' and writing to unused bits are ignored.
The top four lines of the GUI are the PWI registers of the LM10500. R0 controls the core voltage, ranging from
00h to 7Fh. R4 shows the PWI version: 01h means PWI1.0 and 02h means PWI2.0. R9 is the core voltage
offset and the default value differs in LM10500SQ-0.8 and LM10500SQ-1.0. The default value of R9 is 00h in
LM10500SQ-1.0 and 40h in LM10500SQ-0.8. The actual core voltage code is determined by the resulting code
of (R0-R9) if (R0-R9) is above zero, otherwise, the core voltage code is zero. R10 enables and disables FPWM
and stepping controls. Please refer to the LM10500 5A Step-Down Energy Management Unit w/PowerWise
Adaptive Voltage Scaling data sheet for more details.
The ‘ENABLE’ button controls the hardware enable if it is connected to LM10500.
The PWROK and Auth_OK are read-only bits, indicating the LM10500 has proper output voltage and successful
authentication, respectively.
The PWI commands buttons send out commands to alter the operating state of the PWI secondary: the
LM10500, authenticate and synchronize. Please refer to PowerWise interface specification for the details of
PWI standard at pwistandard.com.
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User’s GUI for LM10500 Evaluation Board
A summary of the operation state is shown in Figure 9-3.
Figure 9-3. PWI Secondary Operation States Diagram
9.3 Register Read and Register Write
There are a few ways to read and write to the registers through the GUI.
Register Read
•
•
•
•
Click button ‘R’ at the right end of a register to read in the value of this register from the LM10500.
Click menu Operations, then select Read all (Ctrl + R), to read in all the register values.
Click menu Settings, select 'Register Polling', set ‘polling time’ to be non zero, as shown in Figure 9-4, then
all registers are read in once every ‘polling time’.
Click menu Operations, then select Direct access, to read in a register by providing its address, as shown in
Figure 9-5.
Figure 9-4. Register Polling Setting In The GUI
Figure 9-5. Direct Access Read / Write In The GUI
Register Write
•
•
•
Click button ‘W’ at the right end of a register to write this register to the LM10500.
Click menu Operations, then select Write all (Ctrl + W), to write the current values in the GUI to all registers in
the LM10500.
Click menu Settings, then select Update immediately, when checked, registers in LM10500 are written
whenever the buttons in the GUI are updated.
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User’s GUI for LM10500 Evaluation Board
•
10
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Click menu Operations, then select Direct access, to write to a register by providing its address and value, as
shown in Figure 9-5.
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Typical Performance Characteristics
10 Typical Performance Characteristics
100
100
95
95
90
90
EFFICIENCY (%)
EFFICIENCY (%)
Unless otherwise specified: PVIN = AVIN = 12 V, VOUT = 1.2 V, L = 2.2 µH, COUT = 220 μF, fs = 300 kHz.
85
80
75
70
65
60
80
75
70
65
60
55
55
PVIN = 12V AVIN = 5V
PVIN = AVIN = 12V
50
0
1
2
3
4
LOAD CURRENT (A)
0
95
90
90
EFFICIENCY (%)
100
95
80
75
70
65
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
VOUT = 0.8V
60
55
50
0
1
1
80
75
70
65
VOUT = 5V
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
VOUT = 0.8V
55
50
5
Figure 10-3. Efficiency
fS = 300 kHz, AVIN = PVIN = 5 V, FPWM = 0
5
85
60
2
3
4
LOAD CURRENT (A)
2
3
4
LOAD CURRENT (A)
Figure 10-2. Efficiency
fS = 300 kHz, VOUT = 3.3 V, FPWM = 0
100
85
PVIN = 12V AVIN = 5V
PVIN = AVIN = 12V
50
5
Figure 10-1. Efficiency
fS = 300 kHz, VOUT = 1.2 V, FPWM = 0
EFFICIENCY (%)
85
0
1
2
3
4
LOAD CURRENT (A)
5
Figure 10-4. Efficiency
fS = 300 kHz, AVIN = PVIN = 12V, FPWM = 0
0.10
0.20
LOAD REGULATION (%)
LINE REGULATION (%)
0.15
0.05
0.00
-0.05
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.10
-0.20
3
5
7
9 11 13 15
INPUT VOLTAGE, PVIN (V)
17
Figure 10-5. Line Regulation (%)
0
1
2
3
4
LOAD CURRENT (A)
5
Figure 10-6. Load Regulation (%)
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Typical Performance Characteristics
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1800
10
9
FREQUENCY (kHz)
QUIESCENT CURRENT (mA)
1600
8
7
1400
1200
1000
800
600
400
6
-40°C
25°C
85°C
5
3
5
-40°C
25°C
125°C
200
0
7
9
11 13 15
INPUT VOLTAGE (V)
0
17
Figure 10-7. IQ When EN = 1, IOUT = 0, FPWM = 0
20 40 60 80 100 120 140 160 180
RFRQ(k )
Figure 10-8. Switching Frequency (kHz)
vs.
RFRQ (kΩ)
EN 1V/DIV
EN 1V/DIV
1.2V
Output Voltage 0.2V/DIV
1.2V
0.5V
5A
Output Voltage 0.2V/DIV
Inductor Current 0.5A/DIV
Inductor Current 1A/DIV
PWROK 0.5V/DIV
PWROK 0.5V/DIV
1 ms/DIV
1 ms/DIV
Figure 10-9. Soft Start With 5 A Load,
Triggered By EN Rising Edge
Figure 10-10. Soft Start With 0.5V Pre-bias Voltage,
DCM Operation,
Triggered By PWI 'Wakeup' Command
EN 1V/DIV
1.2V
0.5V
Output Voltage 0.2V/DIV
Switch Node 2V/DIV
Inductor Current 1A/DIV
Inductor Current 0.5A/DIV
5A
Output Voltage 20 mV/DIV AC coupling
1.2V
PWROK 0.5V/DIV
1 ms/DIV
Figure 10-11. Soft Start With 0.5V Pre-bias Voltage,
CCM Operation,
Triggered By PWI 'Wakeup' Command
12
LM10500 Step-Down Converter Evaluation Module User's Guide
2 µs/DIV
Figure 10-12. Switching Waveform With 5 A Load
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Evaluation Board Schematic
11 Evaluation Board Schematic
Figure 11-1. LM10500 Evaluation Board Schematic (Part I)
Figure 11-2. LM10500 Evaluation Board Schematic (Part II)
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Evaluation Board Bill of Materials
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12 Evaluation Board Bill of Materials
Designator(s)
U1
U2
Part Description
Part Number
Footprint
Mfg
IC BUF NON-INV
NC7SZ125M5X
SOT23-5
FAIRCHILD
AVS compatible EMU
LM10500 *
28 WQFN
Texas Instruments
AVS compatible EMU
LM10500 **
28 WQFN
Texas Instruments
U3
IC REG LDO MICROPOWER
LP2985AIM5-2.5
SOT23-5
Texas Instruments
C1
CERAMIC 100 pF 100V
ECJ-1VC2A101J
603
PANASONIC
C2, C4, C8, C11, C14
CERAMIC 1.0 µF 35V X5R
GMK107BJ105KA
603
TAIYO YUDEN
C3, C6, C13
CERAMIC 0.1 µF 50V X7R
UMK107B7104KA-T
603
TAIYO YUDEN
C5, C12
CERAMIC 10000 pF 25V
C1608C0G1E103J
603
TDK
C7, C19
NL
NL
NL
NL
C9, C10
CER 10 µF 10V X7R 20% 1206
C3216X7R1A106M
C15
TANT 47 µF 25V
T495X476K025ATE150
C16, C17
CERAMIC 10 µF 50V
UMK325C7106MM-T
C18
CERAMIC 47 µF X5R
GRM32ER61A476KE20L
C20
220 µF POLYMER 6.3V
EEF-UE0J221LR
D1
NL
NL
NL
1.2 µH SMD INDUCTOR *
MLC1260-122ML
COILCRAFT
2.2 µH SMD INDUCTOR **
SER1052-222ML
COILCRAFT
LD1
LED GREEN 2.1V 0805
CMDA5CG7D1Z
805
CML
R1, R13
10.0 KΩ 0603 1%
RC0603FR-710KL
603
YAGEO
R2, R3, R4, R5, R6
33Ω 0603 1%
RC0603FR-0733RL
603
YAGEO
R7, R8
1.5 KΩ 0603 1%
RC0603FR-071K5L
603
YAGEO
R9, R34, R35, R38
1Ω 0603 1%
RC0603FR-071RL
603
YAGEO
R10, R11, R12, R15,
R16, R17, R18, R19,
R30, R31, R32, R33,
R37, R39
1KΩ 0603 1%
RC0603FR-071KL
603
YAGEO
R14
249Ω 0603 1%
RC0603FR-07249RL
603
YAGEO
R20
169 KΩ 0603 1%
RC0603FR-07169KL
603
YAGEO
R21
0.00Ω 0603 1%
CRCW06030000Z0EA
603
VISHAY/DALE
R22
40.2 KΩ 0603 1%
RC0603FR-0740K2L
603
YAGEO
R23
60.4 KΩ 0603 1%
RC0603FR-0760K4L
603
YAGEO
R24
80.6 KΩ 0603 1%
RC0603FR-0780K6L
603
YAGEO
R25
100 KΩ 0603 1%
RC0603FR-07100KL
603
YAGEO
R26
120 KΩ 0603 1%
RC0603FR-07120KL
603
YAGEO
R27
140 KΩ 0603 1%
RC0603FR-07140KL
603
YAGEO
R28
160 KΩ 0603 1%
RC0603FR-07160KL
603
YAGEO
R29
180 KΩ 0603 1%
RC0603FR-07180KL
603
YAGEO
1.74 KΩ 603 1% *
RC0603FR-071K74KL
603
YAGEO
2KΩ 0603 1% **
RC0603FR-072KL
603
YAGEO
0.00Ω 0603 1% *
CRCW06030000Z0EA
603
VISHAY/DALE
2KΩ 0603 1% **
RC0603FR-072KL
603
YAGEO
RC0603FR-710KL
603
YAGEO
L1
R36
R40
R41
14
1206
CASE D
TDK
KEMET
1210
TAIYO YUDEN
1210
MURATA
CASE D
PANASONIC
NL *
10 KΩ 0603 1% **
LM10500 Step-Down Converter Evaluation Module User's Guide
SNVA453B – AUGUST 2011 – REVISED JANUARY 2022
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Copyright © 2022 Texas Instruments Incorporated
www.ti.com
Evaluation Board Layout
13 Evaluation Board Layout
Figure 13-1. Top Layer
Figure 13-2. Middle Layer 1
Figure 13-3. Middle Layer 2
SNVA453B – AUGUST 2011 – REVISED JANUARY 2022
LM10500 Step-Down Converter Evaluation Module User's Guide
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Copyright © 2022 Texas Instruments Incorporated
15
Evaluation Board Layout
www.ti.com
Figure 13-4. Bottom Layer
Figure 13-5. Top Overlay
Figure 13-6. Bottom Overlay
16
LM10500 Step-Down Converter Evaluation Module User's Guide
SNVA453B – AUGUST 2011 – REVISED JANUARY 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
www.ti.com
Revision History
14 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (April 2013) to Revision B (January 2022)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................1
• Updated user's guide title................................................................................................................................... 1
• Edited user's guide for clarity..............................................................................................................................1
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