LM20333EVAL/NOPB

User's Guide SNVA325B – May 2008 – Revised May 2013 AN-1791 LM20333 Evaluation Board 1 Introduction This evaluation board provides a solution to examine the full featured LM20333 buck switching regulator that is capable of driving up to 3A of load current. This device features a clock synchronization input that allows the switching frequency to be synchronized to an external clock source. The flexibility to synchronize the switching frequency from 250 kHz to 1.5 MHz allows the size of the power stage components to be reduced while still allowing for high efficiency. The LM20333 is capable of down converting from an input voltage between 4.5V and 36V. Fault protection features include cycle-by-cycle current limit, output power good, and output over-voltage protection. The dual function soft-start/tracking pin can be used to control the startup response of the LM20333, and the precision enable pin can be used to easily sequence the LM20333 in applications with sequencing requirements. The LM20333 evaluation board has been optimized to work from 4.5V to 25V achieving a balance between overall solution size with the efficiency of the regulator. The evaluation board measures just under 2” x 2” on a four layer PCB, and exhibits a thermal characteristic of 27 °C/W with no air flow. The power stage and compensation components of the LM20333 evaluation board have been optimized for an input voltage of 12V, but for testing purposes, the input can be varied across the entire operating range. The output voltage of the evaluation board is nominally 3.3V, but this voltage can be easily changed by replacing one of the feedback resistors (R5 or R6). All trademarks are the property of their respective owners. SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback AN-1791 LM20333 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 1 Evaluation Board Schematic 2 www.ti.com Evaluation Board Schematic VIN = 4.5V ± 25V J1 C1 22 éF C3 C2 4.7 éF 4.7 éF U1 VPULLUP VOUT R2 Open 18 3 J6 PGOOD 19 20 1 4 2 J5 ENABLE R3 Open 12 J7 SS/TRK J10 SYNC C6 100 nF C8 1500 pF C7 10 pF VCC C5 1 éF R1 10 k: 5 VIN 6 VIN 15 VIN 16 VIN PGOOD BOOT EN SYNC SS COMP FB LM20333 J2 GND AGND 17 7 SW 8 SW 13 SW 14 SW J9 C4 0.1 éF D1 EP R7 15 k: C9 150 éF J3 J4 R4 348: R5 30.9 k: R6 10 k: J8 GND 3 IOUT = 3A TP1 L1 10 éH 9 GND 10 GND 11 GND VOUT = +3.3V Powering and Loading Considerations Read this entire page prior to attempting to power the evaluation board. 3.1 Quick Setup Procedure 1. Set the input source current limit to 3A. Turn off the input source. Connect the positive output of the input source to J1 and the negative output to J2. 2. Connect the load, with 3A capability, to J3 for the positive connection and J4 for the negative connection. 3. Leave the ENABLE pin, J5, open for normal operation. 4. Set the input source voltage to 12V and the load to 0.1A. The load voltage should be in regulation with a nominal 3.3V output. 5. Slowly increase the load while monitoring the load voltage at J3 and J4. It should remain in regulation with a nominal 3.3V output as the load is increased up to 3 Amp. 6. Slowly sweep the input source voltage from 4.5V to 25V. The load voltage should remain in regulation with a nominal 3.3V output. If desired the output of the device can be disabled by connecting the ENABLE pin (J5) to GND (J8). 7. Select the pull-up voltage for PGOOD by using the JP1 shunt to connect VPULLUP to VOUT or VCC. 8. The frequency of operation can be varied as desired by connecting a signal . 2 AN-1791 LM20333 Evaluation Board SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Powering and Loading Considerations www.ti.com 3.2 Powering Up It is suggested that the load power be kept low during the first power up. Set the current limit of the input source to provide about 1.5 times the anticipated wattage of the load. Once the device is powered up, immediately check for 3.3 volts at the output. A quick efficiency check is the best way to confirm that everything is operating properly. If something is amiss you can be reasonably sure that it will affect the efficiency adversely. Few parameters can be incorrect in a switching power supply without creating losses and potentially damaging heat. 3.3 Over Current Protection The evaluation board is configured with cycle-by-cycle over-current protection. This function is completely contained in the LM20333. The peak current is limited to approximately 5.2A. Table 1. Connection Descriptions Terminal Silkscreen Description VIN This terminal is the input voltage to the device. The evaluation board will operation over the input voltage range of 4.5V to 25V. This voltage is limited due to the voltage rating of the input capacitors. GND These terminals are the ground connections to the device. There are three different GND connections on the PCB. J2 should be used for the input supply, J4 should be used for the load, and J8 should be used for low power signal connections such as ENABLE. VOUT This terminal connects to the output voltage of the power supply and should be connected to the load. ENABLE This terminal connects to the enable pin of the device. This terminal can be left floating or driven externally. If driven externally, a voltage typically less than 1.2V will disable the device. The operating voltage for this pin should not exceed 5.5V. The absolute maximum voltage rating on this pin is 6V. SS/TRK This terminal provides access to the SS/TRK pin of the device. Connections to this terminal are not needed for most applications. The feedback pin of the device will track the voltage on the SS/TRK pin if it is driven with an external voltage source that is below the 0.8V reference. The voltage on this pin should not exceed 5.5V during normal operation. The absolute maximum voltage rating on this pin is 6V. PGOOD This terminal connects to the power good output of the device. There is an option to connect this pin to VOUT or VCC through a 10 kΩ pull-up resistor. The voltage on this pin should not exceed 5.5V during normal operation and has an absolute maximum voltage rating of 6V. JP1 This terminal block selects the pull-up voltage for the PGOOD pin to be either VCC or VOUT. An external voltage source for PGOOD may be supplied by connecting to the center terminal. The voltage applied to PGOOD should not exceed 5.5V during normal operation and has an absolute maximum voltage rating of 6V. SW This terminal allows easy probing of the switch node. Do not apply any external voltage source to this pin. TP1 (VOUT) This is a oscilloscope probe connector point used to measure the output ripple and transient response. It is design to work with most Tektronix oscilloscope probes and is the recommended measurement point for evaluating AC performance. SYNC This terminal connects to the SYNC pin of the device. If this pin is left open the switching frequency will default to approximately 200kHz. The voltage on this pin should not exceed 5.5V during normal operation and has an absolute maximum voltage rating of 6V. SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback AN-1791 LM20333 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 3 Performance Characteristics www.ti.com 4 Performance Characteristics 4.1 Efficiency Plots Figure 1 shows the conversion efficiency versus output current for a 5V and 12V input voltage. Figure 1. Conversion Efficiency Versus Output Current 4.2 Turn-On Waveform When applying power to the LM20333 evaluation board, a soft-start sequence occurs. Figure 2 shows the output voltage during a typical start-up sequence. Figure 2. Output Voltage During a Typical Start-Up Sequence 4 AN-1791 LM20333 Evaluation Board SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Performance Characteristics www.ti.com 4.3 Output Ripple Waveform Figure 3 shows the output voltage ripple. This measurement was taken with the scope probe tip placed on the J3 load terminal and the scope probe ground "barrel" pushed against the J4 load terminal. The scope bandwidth is set to 20 MHz. Bandwidth Limit = 20 MHz Figure 3. Output Voltage Ripple 4.4 Primary Switchnode Waveform Figure 4 shows the typical SW pin voltage while synchronizing to an external source. Figure 4. Typical SW Pin Voltage SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback AN-1791 LM20333 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 5 Bill of Materials (BOM) 4.5 www.ti.com Output Transient Response Figure 5 shows the output transient response during a 300mA to 3A transient. Figure 5. Output Transient Response 5 Bill of Materials (BOM) The Bill of Materials is shown Table 2, including the manufacturer and part number. Table 2. Bill of Materials (BOM) 6 DESIGNATOR QTY PART NUMBER DESCRIPTION VALUE C1 1 GRM32ER61E226KE15 CAPACITOR, 1210 X5R CER, MURATA 22 µF, 25V C2, C3 2 GRM21BR61E475KA12L CAPACITOR, 0805 X5R CER, MURATA 4.7 µF, 25V C5 1 GRM188R71A105KA61D CAPACITOR, 0603 X7R CER, MURATA 1 µF, 10V C4, C6 2 C1608X7R1H104K CAPACITOR, 0603 X7R CER, TDK 0.1 µF, 50V C7 1 C1608C0G1H100J CAPACITOR, 0603 COG CER, TDK 10 pF, 50V C8 1 C1608C0G1H152J CAPACITOR, 0603 COG CER, TDK 1500 pF, 50V C9 1 6TPB150MAZB CAPACITOR, POSCAP B, SANYO 150 µF, 6.3V D1 1 CMMSH1-40-NST DIODE, SCHOTTKY, CENTRAL SEMI 1A, 40V L1 1 IHLP4040DZER10R0M11 INDUCTOR, VISHAY 10 µH, 7.1A R1, R6 2 CRCW06031002F RESISTOR, 0603, VISHAY 10 kΩ R7 1 CRCW06031502F RESISTOR, 0603, VISHAY 15 kΩ R2, R3 0 OPEN - - R4 1 CRCW0603348RF RESISTOR, 0603, VISHAY 348Ω R5 1 CRCW06033092F RESISTOR, 0603, VISHAY 30.9 kΩ U1 1 LM20333 SWITCHING REGULATOR, Texas Instruments J1 - J4 4 160-1026-02-01-00 TURRET TERMINAL, CAMBION TERMINAL, TURRET J6, J7, J9, J10 4 5002 TERMINAL, SINGLE PIN, KEYSTONE TESTPOINT, LOOP J5 1 5000 TERMINAL, SINGLE PIN, KEYSTONE TESTPOINT, LOOP J8 1 5001 TERMINAL, SINGLE PIN, KEYSTONE TESTPOINT, LOOP TP1 1 131503100 TEKTRONIX SCOPE PROBE TESTPOINT PROBE TESTPOINT AN-1791 LM20333 Evaluation Board SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Component Selection www.ti.com 6 Component Selection This section provides a walk-through of the design process of the LM20333 evaluation board. Unless otherwise indicated all equations assume units of amps (A) for current, farads (F) for capacitance, henries (H) for inductance, and volts (V) for voltages. 6.1 Input Capacitors: C1, C2, C3 The required RMS current rating of the input capacitor for a buck regulator can be estimated by the following equation: ICIN(RMS) = IOUT D(1 - D) (1) The variable D refers to the duty cycle, and can be approximated by: D= VOUT VIN (2) From this equation, it follows that the maximum ICIN(RMS) requirement will occur at a full 3A load current with the system operating at 50% duty cycle. Under this condition, the maximum ICIN(RMS) is given by: ICIN(RMS) = 3A 0.5 x 0.5 = 1.5A (3) Ceramic capacitors feature a very large IRMS rating in a small footprint, making a ceramic capacitor ideal for this application. A two 4.7 µF, X5R, 25V ceramic capacitor(C2, C3) from Murata are used to provide the necessary input capacitance for the evaluation board. An additional 22uF, X5R, 25V capacitor is used to provide additional input capacitance to counter cabling inductance to the input. 6.2 Inductor: L1 The value of the inductor was selected to allow the device to achieve a 12V to 3.3V conversion at 250kHz to provide a peak to peak ripple current 957mA, which is about 32% of the maximum output current. To have an optimized design, generally the peak to peak inductor ripple current should be kept to within 20% to 40% of the rated output current for a given input voltage, output voltage and operating frequency. The peak to peak inductor ripple current can be calculated by the equation: 'IP-P = (VIN - VOUT) x D L x fSW (4) Once an inductance value is calculated, an actual inductor needs to be selected based on a trade-off between physical size, efficiency, and current carrying capability. For the LM20333 evaluation board, a Vishay IHLP4040DZER10R0M11 inductor offers a good balance between efficiency (28 mΩ DCR), size, and saturation current rating (7.1A ISAT rating). 6.3 Output Capacitor: C9 The value of the output capacitor in a buck regulator influences the voltage ripple that will be present on the output voltage, as well as the large signal output voltage response to a load transient. Given the peakto-peak inductor current ripple (ΔIP-P) the output voltage ripple can be approximated by the equation: 'VOUT = 'IP-P x RESR + 1 8 x fSW x COUT (5) The variable RESR above refers to the ESR of the output capacitor. As can be seen in the above equation, the ripple voltage on the output can be divided into two parts, one of which is attributed to the AC ripple current flowing through the ESR of the output capacitor and another due to the AC ripple current actually charging and discharging the output capacitor. The output capacitor also has an effect on the amount of droop that is seen on the output voltage in response to a load transient event. For the evaluation board, a Sanyo 150 µF POSCAP output capacitor was selected to provide good transient and DC performance in a relatively small package. From the technical specifications of this capacitor, the ESR is roughly 35 mΩ, and RMS ripple current rating is 1.4A. With these values, the worst case peak to peak voltage ripple on the output when operating from a 12V input can be calculated to be 37 mV. SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback AN-1791 LM20333 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 7 Component Selection 6.4 www.ti.com Soft-Start Capacitor: C6 A soft-start capacitor can be used to control the startup time of the LM20333 voltage regulator. The startup time of the regulator when using a soft-start capacitor can be estimated by the following equation: tSS = 0.8V x C6 ISS (6) For the LM20333, ISS is nominally 5 µA. For the evaluation board, the soft-start time has been designed to be roughly 15 ms, resulting in a CSS capacitor value of 100 nF. 6.5 VCC Bypass: C5 The capacitor C5 is used to bypass the internal 4.5V sub-regulator. A value of 1 µF is sufficient for most applications. 6.6 Boot Capacitor: C4 C4 is the boot capacitor which is used to provide the charge needed to drive the high-side FET. An optimal value for this capacitor is 0.1 µF. 6.7 Compensation Capacitor: C8 The capacitor C8 is used to set the crossover frequency of the LM20333 control loop. Since this board was optimized to be stable over the full input and output voltage range, the value of C8 was selected to be 1.5 nF. Once the operating conditions for the device are known, the transient response can be optimized by reducing the value of C8 and calculating the value for R7 as outlined in the next section. 6.8 Compensation Resistor: R7 Once the value of C8 is known, resistor R7 is used to place a zero in the control loop to cancel the output filter pole. This resistor can be sized according to the equation: R7 = C8 IOUT 2xD x + VOUT fSW x L1 C9 -1 (7) For stability purposes the device should be compensated for the maximum output current expected in the application. 6.9 Optional Compensation Capacitor: C7 A second compensation capacitor C7 can be used in some designs to improve noise immunity for low duty cycle conversions, as well as, provide a high frequency pole, useful for cancelling a possible zero introduced by the ESR of the output capacitor. For the LM20333 evaluation board, a 10pF capacitor is populated for C7. Higher value capacitors can be used to improve low duty cycle performance at the expense of phase margin. 6.10 Feedback resistors: R4, R5, and R6 The resistors labeled R5 and R6 create a voltage divider from VOUT to the feedback pin that is used to set the output of the voltage regulator. Nominally, the output of the LM20333 evaluation board is set to 3.3V, giving resistor values of R5 = 30.9 kΩ and R6 = 10 kΩ. If a different output voltage is required, the value of R5 can be adjusted according to the equation: R5 = VOUT 0.8 - 1 x R6 (8) R6 does not need to be changed from its value of 10 kΩ. Resistor R4 has a value of 348Ω and is provided as an injection point for loop stability measurements, as well as, a way to further tweak the output voltage accuracy to account for resistor tolerance values differing from ideal calculated values. 8 AN-1791 LM20333 Evaluation Board SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated PCB Layout www.ti.com 6.11 Programmable UVLO: R2 and R3 The resistors labeled R2 and R3 create a voltage divider from VIN to the enable pin that can be used to set the turn-on threshold or UVLO of the voltage regulator. To allow evaluation of the device down to 4.5V these components are not installed. To change the turn-on threshold of the device a 10 kΩ resistor is recommended for R3 and the value of R2 can be calculated using the equation: R2 = 7 VTO 1.25 - 1 x R3 (9) PCB Layout Figure 6. Top Layer Figure 7. Mid Layer1 SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback AN-1791 LM20333 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 9 PCB Layout www.ti.com Figure 8. Mid Layer2 Figure 9. Bottom Layer 10 AN-1791 LM20333 Evaluation Board SNVA325B – May 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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