LM218D

The LM118 and LM218 are obsolete and are no longer supplied.


  
  

  SLOS063B – JUNE 1976 – REVISED DECEMBER 2002 D Small Signal Bandwidth . . . 15 MHz Typ D Slew Rate . . . 50 V/µs Min D Bias Current . . . 250 nA Max (LM118, D D D D LM118 . . . JG PACKAGE LM218 . . . D OR P PACKAGE LM318 . . . D, P, OR PS PACKAGE (TOP VIEW) LM218) Supply Voltage Range . . . ±5 V to ±20 V Internal Frequency Compensation Input and Output Overload Protection Same Pin Assignments as General-Purpose Operational Amplifiers BAL/COMP1 IN– IN+ VCC– 1 8 2 7 3 6 4 5 COMP2 VCC+ OUT BAL/COMP3 LM118 . . . FK PACKAGE (TOP VIEW) NC BAL/COMP1 NC COMP2 NC description/ordering information The LM118, LM218, and LM318 are precision, fast operational amplifiers designed for applications requiring wide bandwidth and high slew rate. They feature a factor-of-ten increase in speed over general-purpose devices without sacrificing dc performance. NC IN– NC IN+ NC 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC VCC+ NC OUT NC NC VCC– NC BAL/COMP3 NC These operational amplifiers have internal unity-gain frequency compensation. This considerably simplifies their application because no external components are necessary for operation. However, unlike most internally compensated amplifiers, external frequency compensation may be added for optimum performance. For inverting applications, feed-forward compensation boosts the slew rate to over 150 V/µs and almost double the bandwidth. Overcompensation can be used with the amplifier for greater stability when maximum bandwidth is not needed. Further, a single capacitor can be added to reduce the settling time for 0.1% error band to under 1 µs. 4 NC – No internal connection The high speed and fast settling time of these operational amplifiers make them useful in A/D converters, oscillators, active filters, sample-and-hold circuits, and general-purpose amplifiers. ORDERING INFORMATION TA VIOmax AT 25°C PACKAGE† PDIP (P) 0°C to 70°C 10 mV SOIC (D) ORDERABLE PART NUMBER Tube of 50 LM318P Tube of 75 LM318D Reel of 2500 LM318DR TOP-SIDE MARKING LM318P LM318 SOP (PS) Reel of 2000 LM318PSR LM18 † Package drawings, standard packing quantities, thermal data, symboliztion, and PCB design guidelines are available at www.ti.com/sc/package. Copyright  2002, Texas Instruments Incorporated      !"#   $"%&! '#( '"! !  $#!! $# )# #  #*  "# '' +,( '"! $!# - '#  #!# &, !&"'# # -  && $## (  $'"! !$&  
 .. && $## # # #' "&# )#+ # #'(  && )# $'"!  $'"! $!# - '#  #!# &, !&"'# # -  && $## ( POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 


  
  

  The LM118 and LM218 are obsolete and are no longer supplied. SLOS063B – JUNE 1976 – REVISED DECEMBER 2002 symbol BAL/COMP1 COMP2 BAL/COMP3 IN+ IN– 1 8 5 3 + 2 6 OUT – Pin numbers shown are for the D, JG, P, and PS packages. schematic BAL/COMP3 COMP2 BAL/COMP1 VCC+ 2 kΩ 150 kΩ 2 kΩ 5 kΩ 100 pF 20 kΩ 5 kΩ 13 Ω 20 kΩ 25 Ω 3.5 kΩ 6 pF IN– 1 kΩ OUT 33 Ω 1 kΩ 28 pF 5 kΩ 50 Ω 1.7 kΩ 4 kΩ IN+ 30 Ω 500 Ω 1.2 kΩ 5.6 kΩ 20 kΩ 110 Ω 1.2 kΩ 30 Ω VCC– Component values shown are nominal. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 The LM118 and LM218 are obsolete and are no longer supplied.


  
  

  SLOS063B – JUNE 1976 – REVISED DECEMBER 2002 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage: VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V VCC– (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 V Input voltage, VI (either input, see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V Differential input current, VID (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 V Duration of output short circuit (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Package thermal impedance, θJA (see Notes 5 and 6): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W Package thermal impedance, θJC (see Notes 7 and 8): FK package . . . . . . . . . . . . . . . . . . . . . . . . . 5.61°C/W JG package . . . . . . . . . . . . . . . . . . . . . . . . . 14.5°C/W Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: D, P, PS, or PW package . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC–. 2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 3. The inputs are shunted with two opposite-facing base-emitter diodes for overvoltage protection. Therefore, excessive current flows if a different input voltage in excess of approximately 1 V is applied between the inputs unless some limiting resistance is used. 4. The output can be shorted to ground or either power supply. For the LM118 and LM218 only, the unlimited duration of the short circuit applies at (or below) 85°C case temperature or 75°C free-air temperature. 5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperautre is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 6. The package thermal impedance is calculated in accordance with JESD 51-7. 7. Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable ambient temperautre is PD = (TJ(max) – TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability. 8. The package thermal impedance is calculated in accordance with MIL-STD-883. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 


  
  

  The LM118 and LM218 are obsolete and are no longer supplied. SLOS063B – JUNE 1976 – REVISED DECEMBER 2002 electrical characteristics at specified free-air temperature (see Note 5) TEST CONDITIONS† PARAMETER LM118, LM218 TA‡ MIN LM318 TYP MAX 2 4 25°C MIN TYP MAX 4 10 VIO Inp t offset voltage Input oltage VO = 0 Full range IIO Inp t offset ccurrent Input rrent VO = 0 Full range IIB Input bias current VO = 0 VICR Common-mode input voltage range ±11.5 VOM VCC± = ±15 V VCC± = ±15 V, RL = 2 kΩ Full range Maximum peak output voltage swing Full range ±12 ±13 ±12 ±13 Large signal differential Large-signal voltage amplification VCC± = ±15 V, VO = ±10 V V, RL ≥ 2 kΩ 25°C 50 200 25 200 AVD Full range 25 B1 ri Unity-gain bandwidth VCC± = ±15 V 25°C 25°C 1* 3 CMRR Common-mode rejection ratio VIC = VICRmin Full range 80 100 kSVR Supply-voltage rejection ratio (∆VCC/∆VIO) Full range 70 80 6 25°C 6 15 50 30 120 300 250 Full range mV 200 100 25°C UNIT 150 nA 500 500 750 ±11.5 nA V V V/mV Input resistance 20 15 15 MHz 0.5 3 MΩ 70 100 dB 65 80 dB ICC Supply current VO = 0, No load 25°C 5 8 5 * On products compliant to MIL-STD-883, Class B, this parameter is not production tested. † All characteristics are measured under open-loop conditions with common-mode input voltage, unless otherwise specified. ‡ Full range for LM118 is –55°C to 125°C, full range for LM218 is –25°C to 85°C, and full range for LM318 is 0°C to 70°C. NOTE 9: Unless otherwise noted, VCC = ±5 V to ±20 V. All typical values are at VCC± = ±15 V and TA = 25°C. 10 mA operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER SR TEST CONDITIONS ∆VI = 10 V, Slew rate at unity gain CL = 100 pF, See Figure 1 MIN TYP 50* 70 MAX V/µs * On products compliant to MIL-STD-883, Class B, this parameter is not production tested. PARAMETER MEASUREMENT INFORMATION 10 V 2 kΩ Input 0V 2 kΩ Input – Output + 1 kΩ 100 pF 10 V 90% Output ∆VO 10% 0V tt SR + TEST CIRCUIT VOLTAGE WAVEFORMS Figure 1. Slew Rate 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT DV O tt PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) JM38510/10107BPA LM118FKB Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) Package Type Package Drawing OBSOLETE CDIP JG 8 TBD Call TI Call TI OBSOLETE LCCC FK 20 TBD Call TI Call TI LM118JG OBSOLETE CDIP JG 8 TBD Call TI Call TI LM118JGB OBSOLETE CDIP JG 8 TBD Call TI Call TI LM218D OBSOLETE SOIC D 8 TBD Call TI Call TI LM218DR OBSOLETE SOIC D 8 TBD Call TI Call TI LM218P OBSOLETE PDIP P 8 TBD Call TI Call TI LM318D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LM318DE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LM318DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LM318DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LM318P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type LM318PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type LM318PSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LM318PSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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