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LM22670INVEVAL

LM22670INVEVAL

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    -

  • 描述:

    BOARD EVALUATION FOR LM22670INV

  • 数据手册
  • 价格&库存
LM22670INVEVAL 数据手册
User's Guide SNVA363E – September 2008 – Revised April 2013 AN-1888 LM22670 Evaluation Board Inverting Topology 1 Introduction The LM22670 inverting evaluation board is designed to demonstrate the capabilities of the LM22670 switching regulator in a polarity-inverting topology. The LM22670 inverting evaluation board schematic shown in Figure 1 is configured to provide an output of minus 5 V (-5 V) up to 1.5A load current with an input voltage range of 6 V to 35 V. The typical operating frequency is 500 kHz. The evaluation board is designed to operate at ambient temperatures up to 50°C. Typical evaluation board performance and characteristics curves are shown in Figure 5 through Figure 7. Figure 8 shows the PCB layout. To aid in the design and evaluation of DC/DC polarity-inverting converter solutions based on the LM22670 switching regulator, the evaluation board can be re-configured for different output voltages. The evaluation board is designed to highlight applications with a small solution size. This implies that there will be a trade-off between size and the area of heat dissipation available. If this evaluation board is operated continuously at a full 1.5A load, it will get hot. For more negative output voltages than the preadjusted -5 V, the total output power as well as the total power conversion losses will increase. Test points are provided to enable easy connection and monitoring of critical signals. For more information about device function and electrical characteristics, see the LM22670/LM22670Q 42V, 3A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Features Data Sheet (SNVS584). The evaluation board can be reconfigured for a different load current and output voltage. For design limitations, see Section 7. The performance of the evaluation board is as follows: • Input Range: 6 V to 35 V, 12 V nominal • Output Voltage: -5 V • Output Current Range: 0A to 1.5A • Frequency of Operation: 500 kHz • Board Size: 1.5 X 1.65 inches • Package: PSOP-8 2 Evaluation Board Startup Before applying power to the LM22670 polarity-inverting evaluation board, all external connections should be verified. The external power supply input must be turned off and connected with proper polarity to the VIN and GND posts. A load resistor or electronic load should be connected between the VOUT and GND posts as desired. Both the VIN and VOUT connections should use the closest GND posts respective to VIN or VOUT. The output voltage can be monitored with a multi-meter or oscilloscope at the VOUT post. Once all connections to the evaluation board have been verified, input power can be applied. A load resistor or electronic load does not need to be connected during startup. If the EN test point is left floating, the output voltage will ramp up when an input voltage is applied. Make sure that the external power supply (input voltage power source) is capable of providing enough current so that the adjusted output voltage can be obtained. Keep in mind that the startup current will be greater than the steady state current. SIMPLE SWITCHER is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback AN-1888 LM22670 Evaluation Board Inverting Topology Copyright © 2008–2013, Texas Instruments Incorporated 1 Principle of Operation 3 www.ti.com Principle of Operation The polarity-inverting converter, shown in Figure 1, uses the basic principle of energy storage in the inductor, L1, during on-time and transfers the energy through the diode, D1, to the output during off-time. When the switch turns on, the diode is reverse biased and the inductor current will ramp up linearly. When the switch turns off, the inductor will reverse its polarity in order to maintain the peak switch current. At that time, the diode, D1, will be forward biased and the energy stored in the inductor will be transferred to the load as well as the output capacitor, C4. Since the switch node is negative with respect to ground, the output voltage across the output capacitors (C4 and C5) will become negative. This type of polarity-inverting converter can step-up and step-down the magnitude of the input voltage, which makes this circuit a buck-boost converter. However, the output voltage is always negative in reference to ground. R1 2.55 kÖ VIN 6V to 35V FB VIN LM22670-ADJ C2 22 éF + C1 2.2 éF EN C8 2.2 éF C6 4.7 éF BOOT RT/SYNC C7 4.7 éF VOUT C3 10 nF R2 7.32 kÖ L1 10 éH SW GND C4 120 éF D1 60V 5A + C5* VOUT -5V * component not populated on LM22670INVEVAL evaluation board Figure 1. Evaluation Board Schematic Inverting Topology 4 Design Considerations Figure 1 shows the typical configuration of a polarity-inverting converter using the LM22670 switching regulator. This inverting topology design can be implemented with any member of the LM2267X SIMPLE SWITCHER® family. Note that the ground pin (GND) of the LM22670 is connected to the negative output, VOUT, and the feedback resistor divider is referred to GND. No extra level shift and inversion of the feedback signal is required to regulate the negative output voltage. This buck-boost application is also possible with the fixed voltage version of the LM22670 by connecting the feedback pin directly to ground of the system. A polarity-inverting topology is particularly difficult to stabilize as it has a right-half plane zero in its control to output transfer function. Two compensation capacitor, C6 and C7, are connected from the input to the negative output in order to provide more phase margin and stabilize the loop. For output currents less than 100 mA, the converter can be operated in discontinuous current conduction mode (DCM) and capacitors C6 and C7 are not required. When capacitors C6 and C7 are used and voltage is first applied to the application, the initial capacitor charge current causes a positive voltage spike on the output. This positive voltage spike is typically too small to cause any damage on the output capacitor. The initial input capacitor charge current will cause a voltage drop across the capacitor ESR. Since the ESR from capacitors C6 and C7 and output capacitors C4 and C5 form a voltage divider, the magnitude of the initial voltage spike will be dependent upon the ESR values of these capacitors. Since the overall output capacitor ESR value is typically larger than the compensation capacitor ESR value, the initial voltage spike will be typically below 500 mV. The faster the input voltage slew rate applied to the circuit, the larger the positive voltage spike. If the inductor DC resistance is 2Ω or greater and the initial start-up current is high, the positive voltage spike may be higher than 500 mV. An additional clamping diode, D2, can be used in parallel to the output capacitor C4 to clamp this positive voltage spike to typically 300 mV if a small Schottky diode is used. Shown in Figure 2. In most cases this clamp is not required. 2 AN-1888 LM22670 Evaluation Board Inverting Topology SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Component Selection www.ti.com L1 C4 D2 VOUT (negative voltage) Figure 2. Optional Protection Diode D2 5 Component Selection This section details the component calculation and selection for polarity-inverting converter applications. The calculations are for continuous current conduction mode (CCM) operation. 6 Inductor Selection Duty-cycle is calculated as: D= lVOUTl + VD , VIN + lVOUTl + VD - VQ (1) where, VD is the D1 diode voltage drop and VQ is the voltage drop across the LM22670 internal power NFET. The RDS(ON) of the FET is specified in the LM22670/LM22670Q 42V, 3A SIMPLE SWITCHER®, StepDown Voltage Regulator with Features Data Sheet (SNVS584) to calculate VQ according to the FET current. VQ = IPEAK x RDS(ON), (2) where, IPEAK is the peak switch current of the application. The average inductor current, IL, in reference to the application load current, IOUT, is defined as: IL = IOUT 1-D (3) There are multiple ways to calculate the required inductance for a switching application. The recommended calculation is to choose the inductor ripple current, ΔIL, of approximately 30% of the average inductor current IL. This makes the regulator operate in continuous current conduction mode (CCM) and the application circuit has a small load transient response with an acceptable output voltage ripple. Therefore the peak-to-peak inductor ripple current, ΔIL, is selected as: ΔIL ≊ 0.3 x IL (4) This makes the required inductance: L= VIN x D F x 'IL (5) where, F is the switching frequency of the application. The LM22670 switches at 500 kHz typical if the RT/SYNC pin is floating. The inductor should have a RMS current rating equal to or greater than the maximum current limit, ICL, in order to avoid inductor saturation. The values for maximum current limit, ICL, can be found in the Electrical Characteristics section of the LM22670/LM22670Q 42V, 3A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Features Data Sheet (SNVS584). SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback AN-1888 LM22670 Evaluation Board Inverting Topology Copyright © 2008–2013, Texas Instruments Incorporated 3 IC Device Ratings 7 www.ti.com IC Device Ratings The DC/DC polarity-inverting converter needs to be rated for the peak switch current, IPEAK, and maximum input voltage, VINMAX, as described in Equation 6. Peak switch current is: IPEAK = IL + 'IL 2 (6) Since the ground pin, GND, of the LM22670 is connected to the output voltage, the maximum input voltage rating has to be able to withstand the application input voltage, VIN, plus the absolute value of output voltage, VOUT. Maximum input voltage rating of the IC is as shown in Equation 7: VINMAX = VIN + |VOUT| (7) Maximum load current, IOUT(MAX), is dependent upon the duty-cycle, D, and the inductor value, L. This is important because the LM22670 3A step-down switching regulator cannot typically deliver a 3A load current in a polarity-inverting topology as shown in Figure 3. Figure 3. LM22670 Input Voltage vs Maximum Load Current (VOUT = -5 V, L = 10 µH) The formula for maximum load current in a given circuit is shown in Equation 8: IOUT(MAX) = ICLMIN - VIN x D x (1 - D) 2xFxL (8) where, F is the switching frequency and ICLMIN is the minimum current limit threshold as specified in the Electrical Characteristics section of the LM22670/LM22670Q 42V, 3A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Features Data Sheet (SNVS584). 8 Diode Ratings Diode, D1, has to be able to meet the following parameters: IDMAX = IPEAK VDMAX = VIN + |VOUT|, (9) (10) where, IDMAX is the maximum current rating and VDMAX is the maximum voltage rating of the diode, D1. A Shottky diode with a low forward voltage rating is recommended to achieve high converter efficiency and low EMI. 4 AN-1888 LM22670 Evaluation Board Inverting Topology SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Output Capacitor Selection www.ti.com 9 Output Capacitor Selection The output capacitor needs to be selected primarily for a low ESR value, but the capacitance must also be able to deliver the maximum load current when the switch is on. The ESR value determines the load impedance and output voltage ripple at the first moment diode, D1, becomes forward biased. Thus, the required ESR for a desired output voltage ripple, ΔVOUT, is calculated as shown in Equation 11: ESR = 'VOUT IPEAK (11) The minimum output capacitor value, COUTMIN, for a desired output voltage ripple and load current is: COUTMIN = 10 IOUT x D F x 'VOUT (12) Input Capacitor Selection The input capacitor needs to be selected based on its low ESR value and the high RMS current rating capable of supporting high current changes on the input of the application. Low ESR bypass capacitors located close to the input pin of the switching regulator are recommended. A larger ESR input capacitor is useful for input filtering purposes to reduce inductive kicks on the supply line and to keep the input filter corner frequencies away from the bandwidth of the switching regulator. In general, applications using the polarity-inverting (buck-boost) topology generate noise on both the input as well as the output. This noise makes the input and the output capacitors important components. 11 Synchronization and Adjustable Frequency To use the synchronization feature, it is important to apply a synchronization voltage in reference to the LM22670 ground pin, GND, that has the same potential as the negative output voltage in an inverting topology. Some level shifting of the synchronization pulse might be necessary to stay within the absolute maximum rating of the RT/SYNC pin. The switching frequency can be adjusted higher or lower than 500 kHz by connecting a resistor from the RT/SYNC pin to the LM22670 GND pin. for more details about the synchronizing and adjustable frequency features, see the LM22670/LM22670Q 42V, 3A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Features Data Sheet (SNVS584). 12 Precision Enable The LM22670 can be shut down if the EN pin is pulled low. In the inverting topology, this means that the EN pin is pulled to a voltage close to the GND pin voltage, which is the negative output voltage. If an external signal is applied, care must be taken so that the voltage at the EN pin is never higher than the maximum allowed voltage according to the absolute maximum rating in the LM22670 datasheet in reference to the GND pin. Since the GND pin of the LM22670 becomes the negative output voltage in an inverting application, level shifting might be necessary when using the EN pin. If the EN pin is not used in an application, it may be left floating. 13 PCB Layout Guidelines The printed circuit board (PCB) layout for the LM22670 switching regulator in polarity-inverting topology is shown in Figure 8. Similar PCB layouts can be used for other versions of the LM2267X SIMPLE SWITCHER family. It is very important to place the input capacitor as close as possible to the input pin of the switching regulator. In order to achieve optimal performance, the switching regulator needs to be properly grounded. It is recommended to use a separate ground plane and a single point ground structure. Especially, at load currents above 1A, trace layout and component placement is critical, otherwise, high switching currents will cause malfunction. The parasitic trace inductance is often the main cause of high voltage spikes as well as EMI problems on the input and output lines. SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback AN-1888 LM22670 Evaluation Board Inverting Topology Copyright © 2008–2013, Texas Instruments Incorporated 5 Stability Considerations www.ti.com Figure 4 shows the current flow of a polarity-inverting (buck-boost) converter. The top schematic shows dotted lines that represent the current flow during an on-state. The middle schematic shows the current flow during an off-state. The bottom schematic shows the currents referred to as AC currents. These AC currents are the most critical since current is changing in very short time periods. The dotted lines of the bottom schematic show the traces to keep as short as possible. This will yield a small area reducing the loop inductance. Comparing the AC traces of the polarity-inverting topology with a buck or boost topology shows that the polarity-inverting topology has more critical AC traces. It is usually not possible to keep all critical AC traces as tight as possible at the same time and some tradeoffs need to be made. In sensitive applications, input and output voltage spikes may not be acceptable even when using low ESR input and output filter capacitors. In such cases additional input and output L/C filters should be considered. Vin Vout GND GND Vin Vout GND GND Vin Vout GND GND Figure 4. Current Flow in a Polarity-Inverting (Buck-Boost) Application 14 Stability Considerations Pulse width modulated switch mode DC/DC converters consist of a frequency response control loop. It is necessary for the design to be stable over all operating conditions. The value of the inductor, output capacitor, including ESR, as well as compensation capacitors, C6 and C7, will influence the switching regulator loop stability. The polarity-inverting converter needs to be tested for stability. The first stability test is to observe the switch voltage waveform on the SW pin of the LM22670. This waveform should be stable and free of jitter under all input voltage and load current conditions, which is an indication of a stable design. The next stability measurement is a pulsating load test or load transient response. During this test, the load current is pulsed (rectangular waveform, fast rise time) between minimum and maximum load while the output voltage waveform is monitored with an oscilloscope. Under these conditions, the output voltage should respond without excessive oscillation to load current changes. This pulsating load test or load transient response also needs to be verified under all input voltage conditions. If the switching regulator exhibits stability problems during these tests, the output capacitor and/or compensation capacitors, C6 and C7, should be changed accordingly. For the LM22670 polarityinverting (buck-boost) application, the stability will typically improve with an increase in the capacitance 6 AN-1888 LM22670 Evaluation Board Inverting Topology SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Stability Considerations www.ti.com value of C6 and C7. Figure 7 shows the stability of the LM22670INVEVAL evaluation board taken with a 1.5A load current and a 12 V input voltage. At input voltages below 6 V, the phase margin decreases significantly. To increase the phase margin for applications using low input voltages, select a higher capacitance value for C6 and C7. It can be helpful to plot the loop transfer function by taking a Bode plot using a network analyzer. For details on how to take a Bode plot measurement using only an oscilloscope and a function generator, see AN-1889 How to Measure the Loop Transfer Function of Power Supplies (SNVA364). Table 1. LM22670INVEVAL Bill of Materials (BOM) for VOUT = -5 V, Designed for 1.5A Output Current Ref # Value Supplier Part Number C1, C8 2.2 µF 50 V ceramic TDK C3225X7R1H225K C2 22 µF 63 V electrolytic Panasonic EEEFK1J220XP C3 10 nF 50 V ceramic TDK C1608X7R1H103K C4 120 µF 6.3 V 24 mΩ ESR Nippon Chemi-Con APXE6R3ARA121ME61G C5 Not Populated - C6, C7 4.7 µF 50 V ceramic TDK D1 60 V, 5A Central Semiconductor CMSH5-60 L1 10 µH 4.09A Wurth WE-PD L 74477110 Coilcraft MSS1260-103MLD R1 2.55 kΩ Vishay/Dale CRCW06032K55FKEA R2 7.32 kΩ Vishay/Dale CRCW06037K32FKEA R3 Not Populated - U1 Texas Instruments SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback C4532X7R1H475M LM22670MR-ADJ AN-1888 LM22670 Evaluation Board Inverting Topology Copyright © 2008–2013, Texas Instruments Incorporated 7 Performance Characteristics 15 www.ti.com Performance Characteristics Unless otherwise specified, VIN = 12 V, TA = 25°C, VOUT = -5 V. Figure 5. Start-Up Waveforms (Load Resistor = 4 Ω) Figure 6. Efficiency vs IOUT Figure 7. Overall Loop Gain and Phase (IOUT = 1.5A) 8 AN-1888 LM22670 Evaluation Board Inverting Topology SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated PCB Layout Diagram www.ti.com 16 PCB Layout Diagram SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback AN-1888 LM22670 Evaluation Board Inverting Topology Copyright © 2008–2013, Texas Instruments Incorporated 9 PCB Layout Diagram www.ti.com Figure 8. LM22670INVEVAL PCB Layout 10 AN-1888 LM22670 Evaluation Board Inverting Topology SNVA363E – September 2008 – Revised April 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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