LM2506GRX/NOPB

LM2506 www.ti.com SNLS186B – AUGUST 2006 – REVISED MAY 2013 LM2506 Low Power Mobile Pixel Link (MPL) Level 0, 18-bit RGB Display Interface Serializer and Deserializer Check for Samples: LM2506 FEATURES DESCRIPTION • The LM2506 device adapts RGB style display interfaces to the Mobile Pixel Link (MPL) Level zero serial link. The LM2506 supports one RGB display at up to 18-bit color depth and 800 X 300 pixels (over 216 Mbps and 13.2 MHz PCLK) is supported. A mode pin configures the device as a Serializer (SER) or Deserializer (DES) so the same chip can be used on both sides of the interface. 1 2 • • • • • • • • • RGB Display Interface Support up to 800 x 300 ½SVGA Formats MPL-Level 0 Physical Layer using Two Data and One Clock Signal Low Power Consumption Pinout Mirroring Enables Straight Through Layout with Minimal vias Level Translation between Host and Display Auto Power Down on STOP PCLK Link Power Down Mode Reduces Quiescent Power Under < 10 µA 1.74V to 2.0V Core / Analog Supply Voltage Range 1.74V to 3.0V I/O Supply Voltage Range −30C to 85C Operating Temperature Range The LM2506 in SER mode resides beside an application, graphics or baseband processor and translates a parallel bus from LVCMOS levels to serial Mobile Pixel Link levels for transmission over a flex cable (or coax) and PCB traces to the DES located near the display module. When the Power_Down (PD*) input is asserted on the SER, the MDn and MC line drivers are powered down to save current. The DES can be controlled by a separate Power_Down input or via a signal from the SER (PDOUT*). SYSTEM BENEFITS • • • • The interconnect is reduced from 22 signals to only 3 active signals with the LM2506 chipset easing flex interconnect design, size constraints and cost. Small Interface Low Power Low EMI Intrinsic Level Translation The LM2506 implements the physical layer of the MPL Level 0 Standard (MPL-0) and a 150 μA IB current (Class 0). Typical Application Diagram - Bridge Chips Apps Processor --Graphics Processor --Baseband Processor RGB Style Display Interface Serializer RGB[17:0] VS HS DE PCLK Deserializer MD0 MC PE PD* MD1 M/S* Signal Ground TM RM0 RM1 GND RGB Display QVGA to 1/2 SVGA at 18-bit Color Depth PD* M/S* RGB* Bypass Caps. Not shown RGB[17:0] VS HS DE PCLK TM RM0 RM1 RGB* Optional PDOUT* 3 active signals 18-bit RGB Display GND 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2013, Texas Instruments Incorporated LM2506 SNLS186B – AUGUST 2006 – REVISED MAY 2013 www.ti.com Typical Application Diagram - RGB Mode to Display Driver 3-wires support 18-bit RGB Video Path Apps Processor --Graphics Processor --Baseband Processor RGB Style Display Interface LM2506 Serializer RGB[17:0] VS HS DE PCLK Display Driver w/ MPL Interface MD0 RGB Display