LM2612ABL

OBSOLETE LM2612BL www.ti.com SNVS193D – JUNE 2002 – REVISED APRIL 2013 LM2612BL 400mA Sub-miniature, Programmable, Step-Down DC-DC Converter for Ultra Low-Voltage Circuits Check for Samples: LM2612BL FEATURES APPLICATIONS • • • • • 1 2 • • • • • Sub-miniature 10-pin DSBGA Package Only Three Tiny Surface-mount External Components Required Uses Small Ceramic Capacitors Internal Soft Start Current Overload Protection No External Compensation Required Thermal Shutdown Protection DESCRIPTION The LM2612 step-down DC-DC converter is optimized for powering ultra-low voltage circuits from a single Lithium-Ion cell. It provides up to 400mA (300mA for B grade), over an input voltage range of 2.8V to 5.5V. Pin programmable output voltages of 1.05V, 1.3V, 1.5V or 1.8V allow adjustment for MPU voltage options without board redesign or external feedback resistors. KEY SPECIFICATIONS • • • • • • • • • • Mobile Phones Hand-Held Radios Battery Powered Devices Operates from a Single LiION Cell (2.8V to 5.5V) Internal Synchronous Rectification for High PWM Mode Efficiency Pin Programmable Output Voltage (1.05V, 1.3V, 1.5V and 1.8V) 400mA Maximum Load Capability (300mA for B Grade) ±2% PWM Mode DC Output Voltage Precision 5mV typ PWM Mode Output Voltage Ripple 160 μA typ PFM Mode Quiescent Current 0.02μA typ Shutdown Mode Current 600kHz PWM Mode Switching Frequency SYNC Input for PWM Mode Frequency Synchronization from 500kHz to 1MHz The device has three pin-selectable modes for maximizing battery life in mobile phones and similar portable applications. Low-noise PWM mode offers 600kHz fixed-frequency operation to reduce interference in RF and data acquisition applications during full-power operation. In PWM mode, internal synchronous rectification provides high efficiency (91% typ. at 1.8VOUT). A SYNC input allows synchronizing the switching frequency in a range of 500kHz to 1MHz to avoid noise from intermodulation with system frequencies. Low-current hysteretic PFM mode reduces quiescent current to 160 µA (typ.) during system standby. Shutdown mode turns the device off and reduces battery consumption to 0.02µA (typ.). Additional features include soft start and current overload protection. Typical Application Circuit VIN 2.8V to 5.5V VDD 10PF VOUT Programmable to 1.05V, 1.3V, 1.5V or 1.8V PVIN EN SW ON/OFF SYNC/MODE 10PH LM2612 FB PWM/PFM VID0 VID1 SGND PGND 22PF 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2013, Texas Instruments Incorporated OBSOLETE LM2612BL SNVS193D – JUNE 2002 – REVISED APRIL 2013 www.ti.com DESCRIPTION (CONTINUED) The LM2612 is available in a 10 pin DSBGA package. This package uses TI's wafer level chip-scale DSBGA technology and offers the smallest possible size. Only three small external surface-mount components, an inductor and two ceramic capacitors are required. Connection Diagrams DSBGA Package SGND SGND A1 FB B3 B1 VID1 SW C3 C1 VID0 PGND D3 D1 SYNC/ MODE A3 VDD VDD A3 B1 B3 PVIN PVIN VID0 C1 C3 SW SYNC/ MODE D1 D3 PGND FB A1 VID1 A2 D2 A2 D2 EN EN Figure 1. TOP VIEW Figure 2. BOTTOM VIEW PIN DESCRIPTION Pin Number (1) (1) 2 Pin Name A1 FB B1 VID1 C1 VID0 D1 SYNC/MODE D2 EN D3 PGND Function Feedback Analog Input. Connect to the output at the output filter capacitor (Figure 1) Output Voltage Control Inputs. Set the output voltage using these digital inputs (see Table 1). The output defaults to 1.5V if these pins are unconnected. Synchronization Input. Use this digital input for frequency synchronization or modulation control. Set: SYNC/MODE = high for low-noise 600kHz PWM mode SYNC/MODE = low for low-current PFM mode SYNC/MODE = 500kHz - 1MHz external clock for synchronization to an external clock in PWM mode. See Frequency Synchronization (SYNC/MODE Pin) and Operating Mode Selection (SYNC/MODE Pin) in the DEVICE INFORMATION section. Enable Input. For shutdown, set low to SGND.(See Shutdown Mode in the DEVICE INFORMATION section.) Power Ground C3 SW B3 PVIN Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Power Supply Input to the internal PFET switch. Connect to the input filter capacitor (Figure 29). A3 VDD Analog Supply Input. If board layout is not optimum, an optional 0.1µF ceramic capacitor is suggested (Figure 29) A2 SGND Analog and Control Ground The pin numbering scheme for the DSBGA package was revised in April, 2002 to conform to JEDEC standard. Only the pin numbers were revised. No changes to the physical location of the inputs/outputs were made. For reference purpose, the obsolete numbering had FB as pin 1, VID1 as pin 2, VID0 as pin 3, SYNC as pin 4, EN as pin 5, PGND as pin 6, SW as pin 7, PVIN as pin 8, VDD as pin 9 and SGND as pin 10. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL OBSOLETE LM2612BL www.ti.com SNVS193D – JUNE 2002 – REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) −0.2V to +6V PVIN, VDD, to SGND −0.2V to +0.2V PGND to SGND −0.2V to +6V EN, SYNC/MODE, VID0, VID1 to SGND (GND −0.2V) to (VDD +0.2V) FB, SW −45°C to +150°C Storage Temperature Range Lead temperature (Soldering, 10 sec.) Junction Temperature 260°C (3) −25°C to 125°C Minimum ESD Rating Human body model, C = 100pF, R = 1.5 kΩ ±2kV Thermal Resistance (θJA) LM2612ABL/LM2612ATL & LM2612BBL/LM2612BTL (4) (1) 140°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but parameter specifications may not be ensured. For ensured specifications and associated test conditions, see the Min and Max limits and Conditions in the Electrical Characteristics table. Electrical Characteristics table limits are specified by production testing, design or correlation using standard Statistical Quality Control methods. Typical (Typ) specifications are mean or average values from characterization at 25°C and are not ensured. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and specifications. Thermal shutdown will occur if the junction temperature exceeds the 150°C maximum junction temperature of the device. Thermal resistance specified with 2 layer PCB(0.5/0.5 oz. cu). (2) (3) (4) ELECTRICAL CHARACTERISTICS Specifications with standard typeface are for TA = TJ = 25°C, and those in bold face type apply over the full Operating Temperature Range (TA = TJ = −25°C to +85°C). Unless otherwise specified, PVIN = VDD = EN = SYNC = 3.6V, VID0 = VID1 = 0V. Symbol VIN Parameter Input Voltage Range (1) Feedback Voltage VFB (2) VHYST Conditions PVIN = VDD = VID1 = VIN, VID0 = 0V Min Typ 2.8 Max Units 5.5 V VID0 = VIN, VID1 = VIN 1.029 1.05 1.071 VID0 = VIN, VID1 = 0V 1.274 1.30 1.326 VID0 = 0V, VID1 = 0V 1.470 1.50 1.530 VID0 = 0V, VID1 = VIN 1.764 1.8 1.836 PFM Comparator Hysteresis Voltage PFM Mode (SYNC = 0V) ISHDN Shutdown Supply Current EN = 0V 0.02 3 IQ1 DC Bias Current into VDD No switching, PFM mode (SYNC/MODE = 0V) 160 195 No switching, PWM mode (SYNC/MODE = VIN) 605 725 25 (3) IQ2 V mV µA µA RDSON (P) Pin-Pin Resistance for P FET 395 550 mΩ RDSON (N) Pin-Pin Resistance for N FET 325 500 mΩ RDSON , TC FET Resistance Temperature Coefficient 0.5 (1) (2) (3) %/C The LM2612 is designed for applications where turn-on after system power-up is controlled by the system processor and internal UVLO (Under Voltage LockOut) circuitry is unnecessary. The LM2612 has no UVLO circuitry and should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.8V. Although the LM2612 exhibits safe behavior while enabled at low input voltages, this is not ensured. The feedback voltage is trimmed at the 1.5V output setting. The other output voltages result from the pin selection of the internal DAC's divider ratios. The precision for the feedback voltages is ±2%. The hysteresis voltage is the minimum voltage swing on FB that causes the internal feedback and control circuitry to turn the internal PFET switch on and then off during PFM mode. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL 3 OBSOLETE LM2612BL SNVS193D – JUNE 2002 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Specifications with standard typeface are for TA = TJ = 25°C, and those in bold face type apply over the full Operating Temperature Range (TA = TJ = −25°C to +85°C). Unless otherwise specified, PVIN = VDD = EN = SYNC = 3.6V, VID0 = VID1 = 0V. Symbol Ilim Parameter Switch Peak Current Limit Conditions (4) VEN_H EN Positive Going Threshold Voltage VEN_L EN Negative Going Threshold Voltage VSYNC_H SYNC/MODE Positive Going Threshold Voltage VSYNC_L SYNC/MODE Negative Going Threshold Voltage VID_H VID0, VID1 Positive Going Threshold Voltage VID_L VID0, VID1 Negative Going Threshold Voltage IVID VID1, VID0 Pull Down Current fsync SYNC/MODE Clock Frequency Range Min Typ Max LM2612ABL/LM2612ATL 510 710 850 LM2612BBL/LM2612BTL 400 710 980 0.95 1.3 0.4 0.95 0.4 0.4 VID1, VID0 = 3.6V Tmin (4) (5) 4 Internal Oscillator Frequency 1.3 500 1.3 V V V 3.0 µA 1000 kHz LM2612ABL/ATL, PWM Mode (SYNC = VIN) 468 600 732 LM2612BBL/BTL, PWM Mode (SYNC = VIN) 450 600 750 Minimum ON-Time of P FET Switch in PWM Mode V V 0.83 1.8 mA V 0.84 0.92 (5) FOSC 0.80 Units kHz 200 nS Current limit is built-in, fixed, and not adjustable. If the current limit is reached while the output is pulled below about 0.7V, the internal PFET switch turns off for 2.5 µs to allow the inductor current to diminish. SYNC driven with an external clock switching between VIN and GND. When an external clock is present at SYNC, the IC is forced to PWM mode at the external clock frequency. The LM2612 synchronizes to the rising edge of the external clock. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL OBSOLETE LM2612BL www.ti.com SNVS193D – JUNE 2002 – REVISED APRIL 2013 TYPICAL OPERATING CHARACTERISTICS LM2612ABL/ATL, Circuit of Figure 29, VIN = 3.6V, TA = 25°C, L1 = 10 µH, unless otherwise noted. Quiescent Supply Current vs Temperature Quiescent Supply Current vs Supply Voltage Figure 3. Figure 4. Shutdown Quiescent Current vs Temperature Output Voltage vs Temperature (PWM Mode) Figure 5. Figure 6. Output Voltage vs Temperature (PFM Mode) Output Voltage vs Supply Voltage (VOUT = 1.5V, PWM Mode) Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL 5 OBSOLETE LM2612BL SNVS193D – JUNE 2002 – REVISED APRIL 2013 www.ti.com TYPICAL OPERATING CHARACTERISTICS (continued) LM2612ABL/ATL, Circuit of Figure 29, VIN = 3.6V, TA = 25°C, L1 = 10 µH, unless otherwise noted. 6 Output Voltage vs Supply Voltage (VOUT = 1.5V, PFM Mode) Output Voltage vs Output Current (VOUT = 1.5V, PWM Mode) Figure 9. Figure 10. Output Voltage vs Output Current (VOUT = 1.5V, PFM Mode) Efficiency vs Output Current (VOUT = 1.8V, PWM Mode, With Diode) Figure 11. Figure 12. Efficiency vs Output Current (VOUT = 1.8V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.5V, PWM Mode, With Diode) Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL OBSOLETE LM2612BL www.ti.com SNVS193D – JUNE 2002 – REVISED APRIL 2013 TYPICAL OPERATING CHARACTERISTICS (continued) LM2612ABL/ATL, Circuit of Figure 29, VIN = 3.6V, TA = 25°C, L1 = 10 µH, unless otherwise noted. Efficiency vs Output Current (VOUT = 1.5V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.3V, PWM Mode, With Diode) Figure 15. Figure 16. Efficiency vs Output Current (VOUT = 1.3V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.05V, PWM Mode, With Diode) Figure 17. Figure 18. Efficiency vs Output Current (VOUT = 1.05V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.8V, PWM Mode,No Diode) Figure 19. Figure 20. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL 7 OBSOLETE LM2612BL SNVS193D – JUNE 2002 – REVISED APRIL 2013 www.ti.com TYPICAL OPERATING CHARACTERISTICS (continued) LM2612ABL/ATL, Circuit of Figure 29, VIN = 3.6V, TA = 25°C, L1 = 10 µH, unless otherwise noted. Efficiency vs Output Current (VOUT = 1.8V, PFM Mode, No Diode) Switching Frequency vs Temperature (PWM Mode) Figure 21. Figure 22. Load Transient Response (PWM Mode) Load Transient Response (PFM Mode) A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 5V/div C: VOUT, 50mV/div, AC COUPLED, D: LOAD, 10mA to 100mA, 100mA/div Figure 24. A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 5V/div C: VOUT, 50mV/div, AC COUPLED D: LOAD, 20mA to 200mA, 200mA/div Figure 23. Shutdown Response (PWM Mode) A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: VOUT, 1V/div, D: EN, 5V/div Figure 25. 8 Shutdown Response (PFM Mode) A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: VOUT, 1V/div , D: EN, 5V/div Figure 26. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL OBSOLETE LM2612BL www.ti.com SNVS193D – JUNE 2002 – REVISED APRIL 2013 TYPICAL OPERATING CHARACTERISTICS (continued) LM2612ABL/ATL, Circuit of Figure 29, VIN = 3.6V, TA = 25°C, L1 = 10 µH, unless otherwise noted. PWM to PFM Response A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: VOUT, 50mV/div, AC COUPLED D: SYNC/MODE, 5V/div Figure 27. Line Transient Response (PWM Mode) A: SUPPLY VOLTAGE, 500mV/div, AC COUPLED B: SW PIN, 5V/div C: VOUT, 10mV/div, AC COUPLED L1 = 22 µH Figure 28. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL 9 OBSOLETE LM2612BL SNVS193D – JUNE 2002 – REVISED APRIL 2013 www.ti.com DEVICE INFORMATION The LM2612 is a simple, step-down DC-DC converter optimized for powering low-voltage CPUs or DSPs in cell phones and other miniature battery powered devices. It provides pin-selectable output voltages of 1.05V, 1.3V, 1.5V or 1.8V from a single 2.8V to 5.5V LiION battery cell. It is designed for a maximum load current of 400mA (300mA for B grade). The device has all three of the pin-selectable operating modes required for cell phones and other complex portable devices. Such applications typically spend a small portion of their time operating at full power. During full power operation, synchronized or fixed-frequency PWM mode offers full output current capability while minimizing interference to sensitive IF and data acquisition circuits. PWM mode uses synchronous rectification for high efficiency: typically 91% for a 100mA load with 1.8V output, 2.8V input. These applications spend the remainder of their time in low-current standby operation or shutdown to conserve battery power. During standby operation, hysteretic PFM mode reduces quiescent current to 160µA typ to maximize battery life. Shutdown mode turns the device off and reduces battery consumption to 0.02µA (typ.). The LM2612 offers good performance and a full set of features. It is based on a current-mode switching buck architecture. The SYNC/MODE input accepts an external clock between 500kHz and 1MHz. The output voltage selection pins eliminate external feedback resistors. Additional features include soft-start, current overload protection, over-voltage protection and thermal shutdown protection. The LM2612 is constructed using a chip-scale 10-pin DSBGA package. The DSBGA package offers the smallest possible size for space critical applications, such as cell phones. Required external components are only a small 10uH inductor, and tiny 10uF and 22uF ceramic capacitors for reduced board area. C3* 0.1PF C1 VIN 2.8V to 5.5V 10PF VDD PVN L1 = 10PH VOUT 1.5V SW D1* LM2612 SYSTEM PROCESSOR FB PWM/PFM ON/OFF SYNC/MODE VID1 EN VID0 SGND C2 22PF *C3 IS OPTIONAL *D1 IS OPTIONAL PGND Figure 29. Typical Operating Circuit Circuit Operation Referring to Figure 29, Figure 30, and Figure 31, the LM2612 operates as follows: During the first part of each switching cycle, the control block in the LM2612 turns on the internal PFET switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of (VIN -VOUT)/L, by storing energy in a magnetic field. During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. In response, the inductor's magnetic field collapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter capacitor and load. As the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope of VOUT/L. If the inductor current reaches zero before the next cycle, the synchronous rectifier is turned off to prevent current reversal. The output filter capacitor stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. 10 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL OBSOLETE LM2612BL www.ti.com SNVS193D – JUNE 2002 – REVISED APRIL 2013 The output voltage is regulated by modulating the PFET switch on-time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier to a low-pass filter created by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. VDD SYNC/ MODE OSCILLATOR AND MODE CONTROL PVIN ¦ CURRENT SENSE ERROR AMPLIFIER FB PWM COMP OVP COMPARATOR VID0 DAC VID1 MOSFET CONTROL LOGIC PFM COMPARATOR REF SW ZERO CROSSING DETECTOR SHUTDOWN CONTROL SOFT START EN PGND SGND Figure 30. Simplified Functional Diagram PWM Operation The LM2612 can be set to current-mode PWM operation by connecting the SYNC/MODE pin to VDD. While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse-width to control the peak inductor current. This is done by controlling the PFET switch using a flip-flop driven by an oscillator and a comparator that compares a ramp from the current-sense amplifier with an error signal from a voltage-feedback error amplifier. At the beginning of each cycle, the oscillator sets the flip-flop and turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error amplifier signal, the PWM comparator resets the flip-flop and turns off the PFET switch, ending the first part of the cycle. The NFET synchronous rectifier turns on until the next clock pulse or the inductor current ramps to zero. If an increase in load pulls the output voltage down, the error amplifier output increases, which allows the inductor current to ramp higher before the comparator turns off the PFET switch. This increases the average current sent to the output and adjusts for the increase in the load. Before going to the PWM comparator, the current sense signal is summed with a slope compensation ramp from the oscillator for stability of the current feedback loop. During the second part of the cycle, a zero crossing detector turns off the NFET synchronous rectifier if the inductor current ramps to zero. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM2612BL 11 OBSOLETE LM2612BL SNVS193D – JUNE 2002 – REVISED APRIL 2013 www.ti.com PWM Mode Switching Waveform A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: VOUT, 10mV/div, AC COUPLED PFM Mode Switching Waveform A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: VOUT, 50mV/div, AC COUPLED Figure 31. Typical Circuit Waveforms in (a) PWM Mode and (b) PFM Mode PFM Operation Connecting the SYNC/MODE pin to SGND sets the LM2612 to hysteretic PFM operation. While in PFM (Pulse Frequency Modulation) mode, the output voltage is regulated by switching with a discrete energy per cycle and then modulating the cycle rate, or frequency, to control power to the load. This is done by using an error comparator to sense the output voltage and control the PFET switch. The device waits as the load discharges the output filter capacitor, until the output voltage drops below the lower threshold of the PFM error-comparator. Then the error comparator initiates a cycle by turning on the PFET switch. This allows current to flow from the input, through the inductor to the output, charging the output filter capacitor. The PFET switch is turned off when the output voltage rises above the regulation threshold of the PFM error comparator. After the PFET switch turns off, the output voltage rises a little higher as the inductor transfers stored energy to the output capacitor by pushing current into the output capacitor. Thus, the output voltage ripple in PFM mode is proportional to the hysteresis of the error comparator and the inductor current. In PFM mode, the device only switches as needed to service the load. This lowers current consumption by reducing power consumed during the switching action in the circuit due to transition losses in the internal MOSFETs, gate drive currents, eddy current losses in the inductor, etc. It also improves light-load voltage regulation. During the second part of the cycle, the intrinsic body diode of the NFET synchronous rectifier conducts until the inductor current ramps to zero. The LM2612 does not turn on the synchronous rectifier while in PFM mode. Operating Mode Selection (SYNC/MODE Pin) The SYNC/MODE digital input pin is used to select between PWM or PFM operating modes. Set SYNC/MODE high (above 1.3V) for 600kHz PWM operation when the system is active and the load is above 50mA. Set SYNC/MODE low (below 0.4V) to select PFM mode when the load is less than 50mA for precise regulation and reduced current consumption when the system is in standby. The LM2612 has an over-voltage protection feature that may activate if the device is left in PWM mode under low-load conditions (