User's Guide
SNVA350B – September 2008 – Revised April 2013
AN-1858 LM26484 Power Management Unit Evaluation
Board
1
Introduction
The LM26484 evaluation board is a working demonstration of two step-down DC-DC converters and an
LDO controller. This user's guide helps you make the best use of the LM26484 with your application. For
more specific information about how the LM26484 device works as it relates to its electrical
characteristics, please refer to LM26484 Power Management Unit (SNVS573).
The evaluation board (Figure 1) comes with the regulators pre-configured to have VOUT Buck1 set to
1.8V, VOUT Buck2 set to 1.0V, and VOUT LDO set to 1.0V.
Because the LM26484 is externally configurable and has many voltage options, it is possible to change
the feedback network to get a different regulator output voltage. Details are included in this document.
Comm DC
Input voltage
Comm DC
Input voltage
AVDD
VIN1
C1
C9
AVIN
L1
VOUT1
SW1
ENSW1
C3
R1
C4
R2
C2
FB1
ENSW2
ENLDO
PGND_SW1
nPOR
LM26484
PVIN
C4 and C8 are usually not needed
LDOGATE
Comm DC
Input voltage
LDO_OUT
VIN2
C10
C5
R5
C11
L2
LDOFB
VOUT2
SW2
R6
C6
R3
C8
R4
C7
AGND
DAP
FB2
PGND_SW2
Figure 1. LM26480 Evaluation Board
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AN-1858 LM26484 Power Management Unit Evaluation Board
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1
General Description
2
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General Description
The LM26484 is a multi-function, configurable Power Management Unit. This device integrates two highly
efficient 2.0A step-down DC/DC converters, one LDO Controller, a POR (Power On Reset) circuit, and
thermal overload protection circuitry. All regulator output voltages are externally adjustable. The LDO
controller is a low voltage NMOS voltage regulator. The LM26484 is offered in a 5 × 4 × 0.8 mm 24- pin
WQFN package (see Figure 2).
19
18
17
16
15
14
13
20
12
21
11
DATE CODE *
26484SQ
22
10
23
9
24
8
2
1
3
4
5
6
7
Figure 2. Package Drawing of LM26484
Table 1. Pin Descriptions
(1)
2
Type
(1)
Pin #
Name
I/O
1
VIN1
I
PWR
Description
2
ENSW1
I
D
Enable for Buck1 switcher, a logic HIGH enables Buck1
3
FB1
I
A
Buck1 feedback terminal
4
AVIN
I
PWR
5
FB2
I
A
Buck2 feedback terminal
6
ENSW2
I
D
Enable for Buck2 switcher, a logic HIGH enables Buck2
7
VIN2
I
PWR
Power in DC source Buck2 PMOS
8
VIN2
I
PWR
Power in DC source Buck2 PMOS
9
SW2
O
A
Buck2 switcher output
10
SW2
O
A
Buck2 switcher output
11
PGND_SW2
G
G
Buck2 NMOS Power Ground
12
PGND_SW2
G
G
Buck2 NMOS Power Ground
Power in DC source Buck1 PMOS
Analog power for internal circuits
13
ENLDO
I
D
Enable for LDO, a logic HIGH enables LDO
14
LDOGATE
O
A
LDO Controller output to NMOS power transistor Gate
15
LDOFB
I
A
LDO Controller input to feedback terminal
16
AGND
G
G
Analog GND
17
GND
G
G
Ground
18
nPOR
O
D
nPOR Active low Reset output. nPOR remains LOW while the input supply is
below threshold, and goes HIGH after the threshold is reached and timed delay
19
AVDD
I
PWR
20
PGND_SW1
G
G
Analog Power Pin
Buck1 NMOS Power Ground
21
PGND_SW1
G
G
Buck1 NMOS Power Ground
22
SW1
O
A
Buck1 switcher output
23
SW1
O
A
Buck1 switcher output
24
VIN1
I
PWR
Power in DC source Buck1 PMOS
A: Analog Pin, D: Digital Pin, G: Ground Pin, PWR: Power Pin
AN-1858 LM26484 Power Management Unit Evaluation Board
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Evaluation Board Description
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Table 1. Pin Descriptions (continued)
3
Pin #
Name
I/O
DAP
DAP
GND
Type
(1)
GND
Description
Connection isn't necessary for electrical performance, but it is recommended
for better thermal dissipation.
Evaluation Board Description
From a common input voltage, the user has access to two DC-DC step-down converters and one LDO
controller. The output voltages of the two converters are configured via the feedback network which is
external to the LM26484. From Table 2, select the feedback network components that correlate to the
desired output voltage and solder to the board.
It is very important to clean the board after assembly of the feedback network. The FB pin is a high
impedance node, and any leakage caused by the flux remaining on the board could cause errors in the
output voltage.
Table 2. Buck1/2 Configuration and Component Selection Guide
Ideal Resistor Values
(KΩ)
Common R Values
(KΩ)
VOUT(V)
R1/R3
R2/R4
R1/R3
R2/R4
Actual VOUT
with Com/R
(V)
0.8
120
200
121
200
0.803
0.002
15
none
0.9
160
200
162
200
0.905
0.005
15
none
1
200
200
200
200
1
0
15
none
1.1
240
200
240
200
1.1
0
15
none
1.2
280
200
280
200
1.2
0
12
none
1.3
320
200
324
200
1.31
0.01
12
none
1.4
360
200
357
200
1.393
-0.008
10
none
1.5
400
200
402
200
1.505
0.005
10
none
1.6
440
200
442
200
1.605
0.005
8.2
none
1.7
427
178
432
178
1.713
0.013
8.2
none
1.8
463
178
464
178
1.803
0.003
8.2
none
1.9
498
178
499
178
1.902
0.002
8.2
none
2
450
150
453
150
2.01
0.01
8.2
none
2.1
480
150
475
150
2.083
-0.017
8.2
none
2.2
422
124
422
124
2.202
0.002
8.2
none
2.3
446
124
442
124
2.282
-0.018
8.2
none
2.4
471
124
475
124
2.415
0.015
8.2
none
2.5
400
100
402
100
2.51
0.01
8.2
none
2.6
420
100
422
100
2.61
0.01
8.2
none
2.7
440
100
442
100
2.71
0.01
8.2
33
2.8
460
100
464
100
2.82
0.02
8.2
33
2.9
480
100
475
100
2.875
-0.025
8.2
33
3
500
100
499
100
2.995
-0.005
6.8
33
3.1
520
100
523
100
3.115
0.015
6.8
33
3.2
540
100
536
100
3.18
-0.02
6.8
33
3.3
560
100
562
100
3.31
0.01
6.8
33
3.4
580
100
576
100
3.38
-0.02
6.8
33
3.5
600
100
604
100
3.52
0.02
6.8
33
Target
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Actual VOUT
Delta from
Target (V)
C3/C6 (pF)
C4/C8 (pF)
Feedback Capacitors
AN-1858 LM26484 Power Management Unit Evaluation Board
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3
LDO Controller
4
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LDO Controller
The LDO controller must have its feedback network assembled before proper operation as well. Select the
components from Table 3 that correspond to the desired output voltage. Make sure to clean the board
after soldering the feedback network for reasons previously described.
Table 3. LDO Configuration and Component Selection Guide
Target
5
Ideal Resistor Values
Common R Values
Actual VOUT with
Com R (V)
Feedback
Capacitor
VOUT (V)
R5 (KΩ)
R6 (KΩ)
R5 (KΩ)
R6 (KΩ)
0.8
120
200
120
200
0.8
C11 (pF)
15
0.9
160
200
162
200
0.905
15
1
200
200
200
200
1
15
1.1
240
200
240
200
1.1
15
1.2
280
200
280
200
1.2
12
1.3
320
200
324
200
1.31
12
1.4
360
200
357
200
1.393
10
1.5
400
200
402
200
1.505
10
Jumper Settings
In order for the board to function properly there are certain jumpers that must be in place, see Table 4.
Table 4. Jumper Descriptions
4
JP1
Must be in place
Connects Vin1 to board power
JP2
Must be in place
Connects Vin2 to board power
JP3
Must be in place
Connects AVDD to board power
JP4
Must be in place
Connects AVIN to board power
JP5
Must be in place
This alternates between GND and board power to enable Buck2
JP6
Must be in place
This alternates between GND and board power to enable Buck1
JP7
Must be in place
This alternates between GND and board power to enable the LDO
JP9
Must be in place
Connects GND to board GND
JP10
Optional
Changes the output voltage of Buck2
JP11
Optional
Changes the output voltage of the LDO
JP12
Optional
Changes the output voltage of Buck1
JP14
Must be in place
Alternates the FET Drain voltage between Buck 2 and board power
AN-1858 LM26484 Power Management Unit Evaluation Board
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Using Evaluation Board to Supply Power
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6
Using Evaluation Board to Supply Power
It is important to connect the LM26484 Buck and LDO using proper ground returns. This will enable the
output voltage to be as clean as possible. As seen in Figure 3, connect each VOUT and its corresponding
ground to the input and ground on the application board. Each LM26484 Buck output has a ground
associated with it, and its ground needs to be connected for proper ground current flow.
Figure 3. Ground Connections
7
Bill of Materials
Table 5. Bill of Materials
Item
Designator
1
Vendor
Part Number
Qty.
Comp. Type
Texas
Instruments
LM26484
1
LM26484 Eval Board PCB,
Rev A
Value
2
U1
Texas
Instruments
WQFN
1
3
C1, C1A, C2, C5,
C5A, C7, C12, C17
Taiyo Yuden
JMK316B7226ML-T
8
CAP CER 22 µF 6.3V X7R
1206
22 µF
4
C9, C10, C11, C14
Murata
GRM21BR71A106KE51L
4
CAP CER 10 µF 10V X7R
0805
10 µF
5
C3
Murata
ERB21B5C2E8R2CDX1L
1
CAP CER 8.2F 250V 0805
8.2 pF
6
C6,C15
Murata
ERB21B5C2E150JDX1L
2
CAP CER 15F 250V 0805
15 pF
7
C4, C8
NO LOAD
NO LOAD
5
NO LOAD
8
C16
Murata
GRM32ER61A476KE20L
1
CAP CER 47 µF 10V X5R
1210
47 µF
9
L2, L3
Coilcraft
LPS4414-501MLB
2
LPS4414 Series Low
Profile Shielded Power
Inductors
0.5 µH
10
Q1
Vishay
SI1450DH
1
MOSFET N-CH 20V 1.6A
SOT-363
20V, 1.6A
11
R2
Panasonic
ERJ-3EKF1783V
1
RES 178 kΩ 1/10W 1%
0603 SMD
178K
12
R1
Panasonic
ERJ-3EKF4643V
1
RES 464 kΩ 1/10W 1%
0603 SMD
464K
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LM26484 Board Layout
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Table 5. Bill of Materials (continued)
8
Item
Designator
Vendor
Part Number
Qty.
Comp. Type
Value
13
R3, R4, R5, R6
Panasonic
ERJ-3EKF2003V
4
RES 200 kΩ 1/10W 1%
0603 SMD
200K
14
R11, R13, R15
NO LOAD
NO LOAD
9
NO LOAD
15
R7
Panasonic
ERJ-3EKF1003V
1
RES 100 kΩ 1/10W 1%
0603 SMD
16
JP1, JP2, JP3, JP4,
JP9
Tyco/AMP
9-146285-0-02
5
2-pin header 100 mil pitch
17
JP10, JP11, JP12
NO LOAD
NO LOAD
3
NO LOAD
18
JP5, JP6, JP7, JP14
Tyco/AMP
9-146285-0-03
4
3-pin header 100 mil pitch
19
AVIN,
BUCK1_SENSE,
BUCK2_SENSE,
ENLDO, ENSW1,
ENSW2, GND,
GND1, GND2, GND3,
GND_SW1,
GND_SW2,
LDOGATE, NPOR,
VBUCK1, VBUCK2,
VDD_M, VDD_M1,
VIN1, VIN2, VLDO
Keystone
1573-2
21
silver plated turret 70 mil
drill
20
JP1_SH, JP2_SH,
JP3_SH, JP4_SH,
JP5_SH, JP6_SH,
JP7_SH, JP9_SH,
JP14_SH
Tyco/AMP
881545-2
9
Jumper Shunt, 0.100" 30
uin AU (with handle)
100K
LM26484 Board Layout
Figure 4. Silkscreen Top
6
AN-1858 LM26484 Power Management Unit Evaluation Board
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LM26484 Board Layout
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Figure 5. Signal Top Layer
Figure 6. Signal Plane Ground
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LM26484 Board Layout
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Figure 7. Signal Plan VDD_M (Board Power)
Figure 8. Signal 4 Bottom
8
AN-1858 LM26484 Power Management Unit Evaluation Board
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LM26484 Board Schematic
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9
LM26484 Board Schematic
C6
+
C3
VDD_M
VDD_M
C16
R1
R3
VBUCK1
VBUCK2
JP10
GND
R4
C8
R2
R11
ENSW2
ENSW1
JP4
GND
VDD_M
JP2
GND
VDD_M
VDD_M
C16
VIN2
VIN2
2
JP5
JP1
VDD_M
JP6
GND
C5
C5A
VIN2
PIN 7
GND
FB2
PIN 5
ENSW2
PIN 6
FB1
PIN 3
AVIN
PIN 4
ENSW1
PIN 2
VIN2
PIN 8
GND
VBUCK2
VIN1
PIN 1
VIN1
PIN 24
GND
L2
VBUCK2
C7
C17
C1
C1A
GND
BUCK2_SENSE
JP12
AVIN
R13
VDD_M
C4
VBUCK1
0.5 µH
SW1
PIN 23
SW2
PIN 9
0.5µH
VBUCK1
L3
C12
C2
LM26484
SW2
PIN 10
SW1
PIN 22
GND_SW1
GND_SW2
GND
GND
PGND_SW2
PIN 11
PGND_SW1
PIN 21
PGND_SW2
PIN 12
PGND_SW1
PIN 20
VDD_M
BUCK1_SENSE
ENLDO
PIN 13
LDOGATE
PIN 14
LDOFB
PIN 15
GND_PIN
PIN 17
AGND
PIN 16
NPOR
PIN 18
GND
GND
AVDD
PIN 19
JP3
VDD_M
JP7
ENLDO
C14
GND
JP14
VDD_M
VDD_M1
R7
VDD_M
100k
NPOR
VBUCK2
C9
LDOGATE
JP9
GND
JP11
R15
C10
C15
VLDO
GND
R5
R6
GND
GND
Figure 9. LM26484 Board Schematic
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