LM2655MTC-ADJ/NOPB

LM2655 LM2655 2.5A High Efficiency Synchronous Switching Regulator Literature Number: SNVS072C LM2655 2.5A High Efficiency Synchronous Switching Regulator General Description Features The LM2655 is a current-mode controlled PWM step-down switching regulator. It has the unique ability to operate in synchronous or asynchronous mode. This gives the designer flexibility to choose between the high efficiency of synchronous operation, or the low solution cost of asynchronous operation. Along with flexibility, the LM2655 offers high power density with the small footprint of a TSSOP-16 package. High efficiency ( > 90%) is obtained through the use of an internal low ON-resistance (33mΩ) MOSFET, and an external N-Channel MOSFET. This feature, together with its low quiescent current, makes the LM2655 an ideal fit in portable applications. Integrated in the LM2655 are all the power, control, and drive functions for asynchronous operation. In addition, a low-side driver output allows easy synchronous operation. The IC uses patented current sensing circuitry that eliminates the external current sensing resistor required by other currentmode DC-DC converters. A programmable soft-start feature limits start up current surges and provides a means of sequencing multiple power supplies. n n n n n n n n n n n n n Ultra-high efficiency up to 96% 4V to 14V input voltage range Internal high-side MOSFET with low RDS(ON) = 0.033Ω 300 kHz fixed frequency internal oscillator Low-side drive for synchronous operation Guaranteed less than 12 µA shutdown current Patented current sensing for current mode control Programmable soft-start Input undervoltage lockout Output overvoltage shutdown protection Output undervoltage shutdown protection Thermal Shutdown 16-pin TSSOP package Applications n n n n n Hard disk drives Internet appliances TFT monitors Computer peripherals Battery powered devices Typical Application 10128429 © 2005 National Semiconductor Corporation DS101284 www.national.com LM2655 2.5A High Efficiency Synchronous Switching Regulator April 2005 LM2655 Connection Diagram 16-Lead TSSOP (MTC) 10128403 Top View Order Number LM2655MTC-ADJ See NS Package Number MTC16 Block Diagram 10128404 www.national.com 2 LM2655 Pin Description Pin Name Function 1-2 SW Switched-node connection, which is connected to the source of the internal high-side MOSFET. 3-5 PVIN Main power supply input pin. Connected to the drain of the internal high-side MOSFET. 6 VCB Bootstrap capacitor connection for high-side gate drive. 7 AVIN Input voltage for control and drive circuits. 8 SD(SS) Shutdown and Soft-start control pin. Pulling this pin below 0.3V shuts off the regulator. A capacitor connected from this pin to ground provides a control ramp of the input current. Do not drive this pin with an external source or erroneous operation may result. 9 FB 10 COMP Output voltage feedback input. Connected to the output voltage. Compensation network connection. Connected to the output of the voltage error amplifier. 11 LDELAY A capacitor between this pin to ground sets the delay from when the output voltage reaches 80% of its nominal to when the undervoltage latch protection is enabled. 12 LDR Low-side FET gate drive pin. 13 GND Power ground. 14-16 PVIN Main power supply input pin. Connected to the drain of the internal high-side MOSFET. Ordering Information Supplied as 1000 units Tape and Reel Supplied as 3000 units, Tape and Reel LM2655MTC-3.3 LM2655MTCX-3.3 LM2655MTC-ADJ LM2655MTCX-ADJ 3 www.national.com LM2655 Absolute Maximum Ratings (Note 1) TSSOP-16 Package θJA Power Dissapation If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (PVIN) 3.8V ≤ VIN ≤ 14V Supply Voltage (AVIN) 4.0V ≤ VIN ≤ 14V Feedback Pin Voltage -0.4V ≤ VFB ≤ 5V VCB Voltage, (Note 7) 7V CSS Voltage 2.5V Comp Voltage 2.5V LDELAY Voltage 2.5V LDR Voltage VSW, (Note 8) 140˚C/W 893mW Lead Temperature Vapor Phase (60 sec.) 215˚C Infrared (15 sec.) 220˚C ESD Susceptibility(Note 3) Human Body Model(Note 4) 1kV Machine Model 200V Operating Ratings (Note 1) 5V Storage Temperature Range −65˚C ≤ TJ ≤ +150˚C 14V Junction Temperature Range −40˚C ≤ TJ ≤ +125˚C Power Dissipation (TA =25˚C), (Note 2) LM2655-3.3 Electrical Characteristics Specifications with standard typeface are for TJ = 25˚C, and those in boldface type apply over full Operating Temperature Range. VIN = 10V unless otherwise specified. Symbol VOUT VOUT VINUV Parameter Output Voltage Conditions ILOAD = 1.5 A Typical (Note 5) 3.3 Output Voltage Line Regulation VIN = 5V to 14V ILOAD = 1.5 A 0.5 Output Voltage Load Regulation ILOAD = 100 mA to 2.5A VIN =10V 0.6 VIN Undervoltage Lockout Threshold Voltage Rising Edge 3.8 VUV_HYST Hysteresis for the Input Undervoltage Lockout ICL(Note 9) Average Output Current Limit Limit (Note 6) Units 3.235/3.185 3.392/3.416 V V(min) V(max) 0.7 % %(max) 1.7 % %(max) 3.95 V V(max) 210 mV 3.3 VIN = 5V VOUT = 3.3V LM2655-ADJ Electrical Characteristics Specifications with standard typeface are for TJ = 25˚C, and those in boldface type apply over full Operating Temperature Range. VIN = 10V unless otherwise specified. Symbol VFB VOUT VINUV Parameter Feedback Voltage ILOAD = 1.5 A Typical (Note 5) VIN = 5V to 14V ILOAD = 1.5 A 0.5 Output Voltage Load Regulation ILOAD = 100 mA to 2.5A VIN =10V 0.6 VIN Undervoltage Lockout Threshold Voltage Rising Edge 3.8 Hysteresis for the Input Undervoltage Lockout ICL(Note 9) Average Output Current Limit Limit (Note 6) 1.238 Output Voltage Line Regulation VUV_HYST www.national.com Conditions VIN = 5V VOUT = 3.3V 4 Units 1.208/1.181 1.260/1.267 V V(min) V(max) 0.7 % %(max) 1.7 % %(max) 3.95 V V(max) 210 mV 3.3 A Specifications with standard typeface are for TJ = 25˚C, and those in boldface type apply over full Operating Temperature Range. VIN = 10V unless otherwise specified. Symbol Parameter Conditions IQ Quiescent Current Shutdown Pin Floating (Device On) Device Not Switching IQSD Quiescent Current in Shutdown Mode Shutdown Pin Pulled Low Switch ON Resistance ISWITCH = 1.5A RDS(ON) RSW(ON) Switch On Resistance (MOSFET ON Resistance + Bonding Wire Resistance) IL Switch Leakage Current VBOOT Bootstrap Regulator Voltage Typical (Note 6) 1.7 3 7 5 nA 6.7 6.4 7.0 Error Amplifier Source Current VIN = 4V, VFB = .9*VOUT, VCOMP = 2V 40 Error Amplifier Sink Current VIN = 4V, VFB = 1.1*VOUT, VCOMP = 2V 80 Error Amplifier Output Swing Upper Limit VIN = 4V, VFB = .9*VOUT, VCOMP = 2V 2.70 Error Amplifier Output Swing Lower Limit VIN = 4V, VFB = .9*VOUT, VCOMP = 2V 1.25 Oscillator Frequency Measured at Switch Pin VIN = 4V 300 VIN = 4V 95 ISS VOUTUV Maximum Duty Cycle Soft-Start Current 1250 ILDELAY__ V V(min) V(max) µmho 100 Voltage at the SS Pin = 1.4V VOUT Undervoltage Lockout Threshold Voltage 32/10 µA µA(min) 53/30 µA µA(min) 2.50/2.40 V V(min) 1.35/1.50 V V(max) 280/255 330/345 kHz kHz(min) kHz(max) 92 % %(min) 14 µA µA(max) 76 84 %VOUT %VOUT(min) %VOUT(max) 11 81 Hysteresis for VOUTUV VOUTOV mΩ mΩ(max) IBOOT = 1 mA CBOOT=tbd Error Amplifier Voltage Gain DMAX 80 mΩ IEA_SOURCE FOSC µA µA(max) 72 AV VEAL mA mA(max) ISWITCH = 1.5A Error Amplifier Transconductance VEAH Units 12/20 33 GM IEA_SINK Limit (Note 5) 5 VOUT Overvoltage Lockout Threshold Voltage %VOUT 108 106 114 %VOUT %VOUT(min) %VOUT(max) Hysteresis for VOUTOV 5 %VOUT LDELAY Pin Source Current 5 µA SOURCE ISHUTDOWN VSHUTDOWN TSD Shutdown Pin Current Shutdown Pin Threshold Voltage Shutdown Pin Pulled Low Rising Edge 2.2 3.7/4.0 µA µA(max) 0.25 0.9 V V(min) V(max) 0.6 Thermal Shutdown Temperature 165 5 ˚C www.national.com LM2655 All Output Voltage Versions Electrical Characteristics LM2655 All Output Voltage Versions Electrical Characteristics (Continued) Specifications with standard typeface are for TJ = 25˚C, and those in boldface type apply over full Operating Temperature Range. VIN = 10V unless otherwise specified. Symbol TSD_HYST Parameter Conditions Thermal Shutdown Hysteresis Temperature Typical (Note 6) Limit (Note 5) 25 Units ˚C Low-side Driver (LDR) Parameters Specifications with standard typeface are for TJ = 25˚C, and those in boldface type apply over full Operating Temperature Range. VIN = 10V unless otherwise specified. Symbol VOH Parameter Logic High Level Conditions VIN = 10V Limit (Note 6) 6.8 VIN = 6.0V VOL Typical (Note 5) 6.6 V V(min) 5.8 V V(min) 0.05 V V(max) 6 Logic Low Level Units 0 ISINK LDR Sink Current LDR Voltage = 1V 500 mA ISOURCE LDR Source Current LDR Voltage = 2V 180 mA TRR Rise Time CGS=1000pF 18 ns TF Fall Time CGS=1000pF 7 ns Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed under these conditions. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The maximum allowable power dissipation is calculated by using PDMAX = (TJMAX − TA)/θJA, where TJMAX is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package. The 893 mW rating results from using 150˚C, 25˚C, and 140˚C/W for TJMAX, TA, and θJA respectively. A θJA of 140˚C/W represents the worst-case condition of no heat sinking of the 16-pin TSSOP package. Heat sinking allows the safe dissipation of more power. The Absolute Maximum power dissipation must be derated by 7.14 mW per ˚C above 25˚C ambient. The LM2655 actively limits its junction temperatures to about 165˚C. Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 4: ESD susceptibility using the human body model is 500V for VCB, VSW, LDR, and LDELAY. Note 5: Typical numbers are at 25˚C and represent the most likely norm. Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 7: Measured with respect to VSW. Note 8: Measured while switching in closed loop with Vin = 15V. Note 9: Average output current limit obtained using typical application circuit. This figure is dependant on the the inductor used. Note 10: Bond wire resistance accounts for approximately 40mΩ of RSW(ON). www.national.com 6 LM2655 Typical Performance Characteristics Efficiency vs VIN (ILOAD = 0.5A) (Synchronous) Efficiency vs Load Current (VIN = 5V, VOUT = 3.3V) 10128405 10128406 lQ vs VIN IQSD vs VIN 10128407 10128408 IQSD vs Junction Temperature Frequency vs Junction Temperature 10128409 10128410 7 www.national.com LM2655 Typical Performance Characteristics (Continued) RSW(ON) + Bond Wire Resistance vs Input Voltage (Note 10) (ILOAD = 1.5A) RSW(ON) + Bond Wire Resistance vs Junction Temperature (Note 10) (ILOAD = 1.5A, VIN = 5V ) 10128412 10128411 Current Limit vs Input Voltage (Synchronous) Current Limit vs Input Voltage (Asynchronous) 10128413 10128414 Current Limit vs Junction Temperature (VIN = 5V, VOUT = 3.3V) Reference Voltage vs Junction Temperature 10128415 www.national.com 10128416 8 A unique feature of the LM2655 is that it can be operated in either synchronous or asynchronous mode. When operating in asynchronous mode, a small amount of efficiency is sacrificed for a less expensive solution. Any diode may be used, but it is recommended that a low forward drop schottky diode be use to maximize efficiency. When operating the LM2655 in asynchronous mode, the LDR pin should be terminated with a large resistor ( > 1 MegΩ), or left floating. Operation in asynchronous mode is similar to that of synchronous mode, except the internal low-side MOSFET logic is not used. At the beginning of a switching cycle, the high-side MOSFET is on and current from the input source flows through the inductor and to the load. The current from the high-side MOSFET is sensed and compared with the output of the error amplifier (COMP pin). When the sensed current reaches the COMP pin voltage level, the high-side switch is turned off. At this instant, the load current is commutated through the catch diode. The current now flows through the diode and the inductor and on to the load. At the end of the switching cycle, the high-side switch is turned on and the cycle is repeated. The LM2655 is a constant frequency (300kHz), currentmode PWM switcher that can be operated synchronously or asynchronously. SYNCHRONOUS OPERATION A converter is said to be in synchronous operation when a MOSFET is used in place of the catch diode. In the case of the buck converter, this MOSFET is known as the low-side MOSFET (the MOSFET connected between the input source and the low-side MOSFET is the high-side MOSFET). Converters in synchronous operation exhibit higher efficiencies compared to asynchronous operation because the I2R losses are reduced with the use of a MOSFET . Operation of the LM2655 in synchronous mode is identical to its operation in asynchronous mode, except that internal logic drives the low-side MOSFET. At the beginning of a switching cycle, the high-side MOSFET is on and current from the input source flows through the inductor and to the load. The current from the high-side MOSFET is sensed and compared with the output of the error amplifier (COMP pin). When the sensed current reaches the COMP pin voltage level, the high-side switch is turned off. After a 30ns delay (deadtime), the low-side driver goes high and turns the low-side MOSFET on. The current now flows through the low-side MOSFET, through the inductor and on to the load. A 30ns delay is necessary to insure that the MOSFETs are never on at the same time. During the 30ns deadtime, the current is forced to flow through the low-side MOSFET’s body diode. It is recommended that a low forward drop schottky diode be placed in parallel to the low-side MOSFET so that current will be more efficiently conducted during this 30ns deadtime. This Schottky diode should be placed within 5mm of the switch pin so that current limit is not effected (see External Schottky Diode section). At the end of the switching cycle, the low-side switch is turned off and after another 30ns delay, the cycle is repeated. PROTECTIONS The peak current in the system is monitored by cycle-bycycle current limit circuitry. This circuitry will turn the highside MOSFET off whenever the current through the highside MOSFET reaches a preset limit (see plots). A second level current limit is accomplished by the undervoltage protection: if the load pulls the output voltage down below 80% of its nominal value, the undervoltage latch protection will wait for a period of time (set by the capacitor at the LDELAY pin, see LDELAY CAPACITOR section for more information). If the output voltage is still below 80% of its nominal after the waiting period, the latch protection will be enabled. In the latch protection mode, the low-side MOSFET is on and the high-side MOSFET is off. The latch protection will also be enabled immediately whenever the output voltage exceeds the overvoltage threshold (110% of its nominal). Both protections are disabled during start-up.(See SOFT-START CAPACITOR section and LDELAY CAPACITOR section for more information.) Toggling the input supply voltage or the shutdown pin can reset the device from the latched protection mode. Current through the high-side MOSFET is sensed by patented circuitry that does not require an external sense resistor. As a result, system cost and size are reduced, efficiency is increased, and noise immunity of the sensed current is improved. A feedforward from the input voltage is added to reduce the variation of the current limit over the input voltage range. Design Procedure voltage. The tantalum capacitor should be surge current tested by the manufacturer to prevent damage by the inrush current. It is also recommended to put a small ceramic capacitor (0.1 µF) between the input pin and ground pin to reduce high frequency noise. This section presents guidelines for selecting external components. INPUT CAPACITOR A low ESR aluminum, tantalum, ceramic, or any other type of capacitor is needed between the input pin and power ground. This capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the RMS current and voltage requirements. The RMS current is given by: INDUCTOR The most critical parameters for the inductor are the inductance, peak current and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages: The RMS current reaches its maximum (IOUT/2) when VIN equals 2VOUT. For an aluminum or ceramic capacitor, the voltage rating should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating required is about twice the maximum input A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, current stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage ripple require9 www.national.com LM2655 ASYNCHRONOUS OPERATION Operation LM2655 Design Procedure Sprague 593D, 594D, AVX TPS, and CDE polymer aluminum) is recommended. An electrolytic capacitor is not recommended for temperatures below −25˚C since its ESR rises dramatically at cold temperature. A tantalum capacitor has a much better ESR specification at cold temperature and is preferred for low temperature applications. The output voltage ripple in constant frequency mode has to be less than the sleep mode voltage hysteresis to avoid entering the sleep mode at full load: VRIPPLE < 20mV * VOUT /VFB (Continued) ment. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the ripple current increases with the input voltage, the maximum input voltage is always used to determine the inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the inductor copper loss equal 2% of the output power. OUTPUT CAPACITOR The selection of COUT is primarily determined by the maximum allowable output voltage ripple. The output ripple in the constant frequency, PWM mode is approximated by: The ESR term usually plays the dominant role in determining the voltage ripple. A low ESR aluminum electrolytic or tantalum capacitor (such as Nichicon PL series, Sanyo OS-CON, 10128421 FIGURE 1. Low-side/high-side driver timing diagram. TABLE 1. MOSFET Manufacturers Manufacturer Model Number Package Type Fairchild Semiconductor FDC653N SuperSOT-6 General Semiconductor GF4420 International Rectifier Vishay Siliconix Zetex www Address Fax www.fairchildsemi.com 888-522-5372 207-761-6020 SO-8 www.gensemi.com 631-847-3000 631-847-3236 IRF7807 SO-8 www.irf.com 310-322-3331 310-322-3332 Si4812DY SO-8 www.vishay.com 800-554-5565 408-567-8995 Si4874DY SO-8 ZXM64N03X SO-8 www.zetex.com (44) 161-622-4422 (44) 161-622-4420 LOW-SIDE MOSFET SELECTION When operating in synchronous mode, special attention should be given to the selection of the low-side MOSFET. Besides choosing a MOSFET with minimal size and on resistance, it is critical that the MOSFET meet certain rise and fall time specifications. A 30ns deadtime between the low-side and high-side MOSFET switching transitions is programmed into the LM2655, as shown in Figure 1. The prevent shoot-through current, the low-side MOSFET must turn off before the high-side MOSFET turns on. Hence, the low- www.national.com Phone side MOSFET has 30ns to turn off from the time the low-side driver goes low. The fall time of the low-side MOSFET is governed by the equation: IC = CIN*dVC/dt. where IC is the LDR sink current capability, CIN is the equivalent capacitance seen at the LDR pin, and VC is the gate-tosource voltage of the MOSFET. IC is limited by the low-side driver of the LM2655, but CIN is fixed by the MOSFET. Therefore, it is important that the chosen MOSFET has a suitable CIN so that the LM2655 will be able to turn it off 10 TSS = CSS * 0.6V/2 µA + CSS * (2V−0.6V)/10 µA (Continued) During start-up, the internal circuit is monitoring the soft-start voltage. When the softstart voltage reaches 2V, the undervoltage and overvoltage protections are enabled. If the output voltage doesn’t rise above 80% of the normal value before the soft-start reaches 2V, undervoltage protection shut down the device. You can avoid this by either increasing the value of the soft-start capacitor, or using a LDELAY capacitor. within 30ns. An input capacitance of less than 1000pF is recommended. Several suitable MOSFETs are shown in Table 1. EXTERNAL SCHOTTKY DIODE (Syncronous) A Schottky diode is recommended to prevent the intrinsic body diode of the low-side MOSFET from conducting during the deadtime in PWM operation. If the body diode turns on, there is extra power dissipation in the body diode because of the reverse-recovery current and higher forward voltage drop. In addition, the high-side MOSFET has more switching loss because the diode reverse-recovery current adds to the high-side MOSFET turn-on current. These losses degrade the efficiency by 1-2%. The improved efficiency and noise immunity with the Schottky diode become more obvious with increasing input voltage and load current. LDELAY CAPACITOR The LDELAY capacitor (CDELAY) provides a means to control undervoltage latch protection. By changing CDELAY, the user can adjust the time delay between the output voltage dropping below 80% of its nominal value and the part shutting off due to undervoltage latch protection. The LDELAY circuit consists of a 5 µA current source in series with a user defined capacitor, CDELAY. The 5 µA current source is turned on whenever the output voltage is below 80% of its nominal value, otherwise this current source is off. With the output voltage below 80% of its nominal value, the 5 µA current source begins to charge CDELAY, as shown in Figure 2. If the potential across CDELAY reaches 2V, undervoltage latch protection will be enabled and the part will shutdown. If the output voltage recovers to above 80% of its nominal value before the potential across CDELAY reaches 2V, undervoltage latch protection will remain disabled. Hence, CDELAY sets a time delay by the following equation: TDELAY (ms) = CDELAY (nF) * 2V/5A Undervoltage latch protection can be disabled by tying the LDELAY pin to the ground. It is important to place the diode very close to the switch pin of the LM2655. Extra parasitic impedance due to the trace between the switch pin and the cathode of the diode will cause the current limit to decrease. The breakdown voltage rating of the diode is preferred to be 25% higher than the maximum input voltage. Since it is on for a short period of time, the diode’s average current rating need only be 30% of the maximum output current. EXTERNAL SCHOTTKY DIODE (Asyncronous) In asyncronous mode, the output current commutates throught the schottky diode when the high-side MOSFET is turned off. Using a schottky diode with low forward voltage drop will minimize the effeciency loss in the diode. However, to achieve the greatest efficiency, the LM2655 should be operated in syncronous mode using a low-side MOSFET. Since the Schottky diode conducts for the entire second half of the duty cycle in asyncronous mode, it should be rated higher than the full load current. BOOST CAPACITOR The boost capacitor provides the extra votage needed to turn the high-side, n-channel MOSFET on. A 0.1 µF ceramic capacitor is recommended for the boost capacitor. The typical voltage across the boost capacitor is 6.7V. SOFT-START CAPACITOR A soft-start capacitor is used to provide the soft-start feature. When the input voltage is first applied, or when the SD(SS) pin is allowed to go high, the soft-start capacitor is charged by a current source (approximately 2 µA). When the SD(SS) pin voltage reaches 0.6V (shutdown threshold), the internal regulator circuitry starts to operate. The current charging the soft-start capacitor increases from 2 µA to approximately 10 µA. With the SD(SS) pin voltage between 0.6V and 1.3V, the level of the current limit is zero, which means the output voltage is still zero. When the SD(SS) pin voltage increases beyond 1.3V, the current limit starts to increase. The switch duty cycle, which is controlled by the level of the current limit, starts with narrow pulses and gradually gets wider. At the same time, the output voltage of the converter increases towards the nominal value, which brings down the output voltage of the error amplifier. When the output of the error amplifier is less than the current limit voltage, it takes over the control of the duty cycle. The converter enters the normal current-mode PWM operation. The SD(SS) pin voltage is eventually charged up to about 2V. The soft-start time can be estimated as: 10128422 FIGURE 2. Undervoltage latch protection. COMPENSATION COMPONENTS In the control to output transfer function, the first pole Fp1 can be estimated as 1/(2πROUTCOUT); The ESR zero Fz1 of the output capacitor is 1/(2πESRCOUT); Also, there is a high frequency pole Fp2 in the range of 45kHz to 150kHz: Fp2 = Fs/(πn(1−D)) where D = VOUT/VIN, n = 1+0.348L/(VIN−VOUT) (L is in µHs and VIN and VOUT in volts). The total loop gain G is approximately 1000/IOUT where IOUT is in amperes. A Gm amplifier is used inside the LM2655. The output resistor Ro of the Gm amplifier is about 80kΩ. Cc1 and RC together with Ro give a lag compensation to roll off the gain: Fpc1 = 1/(2πCc1(Ro+Rc)), Fzc1 = 1/2πCc1Rc. 11 www.national.com LM2655 Design Procedure LM2655 Design Procedure Application Circuits (Continued) In some applications, the ESR zero Fz1 can not be cancelled by Fp2. Then, Cc2 is needed to introduce Fpc2 to cancel the ESR zero, Fp2 = 1/(2πCc2Ro\Rc). PROGRAMMABLE OUTPUT VOLTAGE The rule of thumb is to have more than 45˚ phase margin at the crossover frequency (G=1). If COUT is higher than 68µF, Cc1 = 2.2nF, and Rc = 15KΩ are good choices for most applications. If the ESR zero is too low to be cancelled by Fp2, add Cc2. Using the adjustable output version of the LM2655 as shown in Figure 3, output voltages between 1.24V and 13V can be achieved. Use the following formula to select the appropriate resistor values: RFB1 = RFB2*(VOUT - VREF)/VREF where VREF = 1.238V. If the transient response to a step load is important, choose RC to be higher than 10kΩ. Select resistors between 10kΩ and 100kΩ. (1% or higher accuracy metal film resistors for RFB1 and RFB2.) 10128425 FIGURE 3. Programmable output voltage. capacitor should be connected across this source, and a small bypass capacitor should be placed physically close to the AVIN pin to ground. With all the internal circuitry being powered by a separate source, the only requirement of the voltage at PVIN is that it be slightly higher (∼500mV) than the desired output voltage. The source connected to PVIN will also need an input capacitor and bypass capacitor, but the input capacitor must be selected following the guidelines explained in the INPUT CAPACITOR section. EXTENDING INPUT VOLTAGE RANGE Figure 4 shows a way to configure the LM2655 so that input voltages of less than 4V can be converted. This circuit makes use of the separate analog and power VIN pins. All the supervisory circuits of the LM2655 are powered through the AVIN pin, while the source voltage that is to be converted is input to the PVIN pins. The internal circuitry of the LM2655 has an operating range of 4V < VCC < 14V, so a voltage within this range must be applied to AVIN. This source may be low power because it only needs to supply 5mA. An input 10128423 FIGURE 4. Extended input voltage range. www.national.com 12 VOUT = (VREF-VADJ)*(RFB1+RFB2)/RFB2 + VADJ where VREF = 1.24V. VADJ can be any voltage higher than VREF (1.24V). In Figure 5, VADJ is produced by an LMV431 adjustable reference following the equation: VADJ = 1.24*(RADJ1/RADJ2 + 1). (Continued) OBTAINING OUTPUT VOLTAGES OF LESS THAN 1.25V Some applications require output voltages less than 1.25V. The circuit shown in Figure 5 will allow the LM2655 to do such a conversion. By referencing the two feedback resistors to VADJ (VADJ > 1.24V), VOUT can be adjusted from 0V to VADJ by the equation: 10128424 FIGURE 5. Obtaining output voltages of less than 1.25V sources to avoid noise pick up. For applications that require tight regulation at the output, a dedicated sense trace (separated from the power trace) is recommended to connect the top of the resistor divider to the output. 3. If the Schottky diode D is used, minimize the traces connecting D to SW and PGND pins. Use short and wide traces. 4. If the low-side MOSFET is used, minimize the trace connecting the LDR pin to the gate of the MOSFET, and the traces to SW and PGND pins. Use short and wide traces for the power traces going from the MOSFET to SW and PGND pins. Pcb Layout Considerations Layout is critical to reduce noise and ensure specified performance. The important guidelines are listed as follows: 1. Minimize the parasitic inductance in the loop of input capacitors and the internal MOSFETs by connecting the input capacitors to VIN and PGND pins with short and wide traces. The high frequency ceramic bypass capacitor, in particular, should be placed as close to and no more than 5mm from the VIN pin. This is important because the rapidly switching current, together with wiring inductance can generate large voltage spikes that may result in noise problems. 2. Minimize the trace from the center of the output resistor divider to the FB pin and keep it away from noise 13 www.national.com LM2655 Application Circuits LM2655 10128425 Schematic for the Typical Board Layout Typical PC Board Layout: (2X Size) 10128426 Component Placement Guide 10128427 Component Side PC Board Layout www.national.com 14 LM2655 Typical PC Board Layout: (2X Size) (Continued) 10128428 Solder Side PC Board Layout 15 www.national.com LM2655 2.5A High Efficiency Synchronous Switching Regulator Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead TSSOP (MTC) NS Package Number MTC16 Order Number LM2655MTC-ADJ LM2655MTCX-ADJ LM2655MTC-3.3 LM2655MTCX-3.3 See Ordering Information Table For Order Quantities National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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