LM2704
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SNVS175D – FEBRUARY 2002 – REVISED MAY 2013
LM2704 Micropower Step-up DC/DC Converter with 550mA Peak Current Limit
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FEATURES
DESCRIPTION
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The LM2704 is a micropower step-up DC/DC in a
small 5-lead SOT-23 package. A current limited, fixed
off-time control scheme conserves operating current
resulting in high efficiency over a wide range of load
conditions. The 21V switch allows for output voltages
as high as 20V. The low 400ns off-time permits the
use of tiny, low profile inductors and capacitors to
minimize footprint and cost in space-conscious
portable applications. The LM2704 is ideal for LCD
panels requiring low current and high efficiency as
well as white LED applications for cellular phone
back-lighting. The LM2704 can drive up to 8 white
LEDs from a single Li-Ion battery.
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550mA, 0.7Ω, Internal Switch
Uses Small Surface Mount Components
Adjustable Output Voltage up to 20V
2.2V to 7V Input Range
Input Undervoltage Lockout
0.01µA Shutdown Current
Small 5-Lead SOT-23 Package
APPLICATIONS
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LCD Bias Supplies
White LED Back-Lighting
Handheld Devices
Digital Cameras
Portable Applications
Typical Application Circuit
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2013, Texas Instruments Incorporated
LM2704
SNVS175D – FEBRUARY 2002 – REVISED MAY 2013
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Connection Diagram
The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junctionto-ambient thermal resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the
thermal resistance. The maximum allowable power dissipation at any ambient temperature is calculated using: PD
(MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die
temperature.
Figure 1. SOT23-5 - Top View
TJmax = 125°C, θJA = 220°C/W
PIN DESCRIPTIONS
Pin
Name
Function
1
SW
Power Switch input.
2
GND
Ground.
3
FB
4
SHDN
5
VIN
Output voltage feedback input.
Shutdown control input, active low.
Analog and Power input.
SW(Pin 1): Switch Pin. This is the drain of the internal NMOS power switch. Minimize the metal trace area
connected to this pin to minimize EMI.
GND(Pin 2): Ground Pin. Tie directly to ground plane.
FB(Pin 3): Feedback Pin. Set the output voltage by selecting values for R1 and R2 using:
(1)
Connect the ground of the feedback network to an AGND plane which should be tied directly to the GND pin.
SHDN(Pin 4): Shutdown Pin. The shutdown pin is an active low control. Tie this pin above 1.1V to enable the
device. Tie this pin below 0.3V to turn off the device.
VIN(Pin 5): Input Supply Pin. Bypass this pin with a capacitor as close to the device as possible.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings (1) (2)
VIN
7.5V
SW Voltage
21V
FB Voltage
2V
SHDN Voltage
7.5V
Maximum Junction Temp. TJ (3)
150°C
Lead Temperature
(Soldering 10 sec.)
300°C
Vapor Phase
(60 sec.)
215°C
Infrared
(15 sec.)
220°C
(4)
ESD Ratings
Human Body Model
Machine Model (5)
(1)
2kV
200V
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum
allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum
allowable power dissipation will cause excessive die temperature.
The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin.
ESD susceptibility using the machine model is 150V for SW pin.
(2)
(3)
(4)
(5)
Operating Conditions
Junction Temperature
(1)
−40°C to +125°C
Supply Voltage
2.2V to 7V
SW Voltage Max.
(1)
20.5V
All limits ensured at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% production tested or ensured through statistical analysis. All limits at temperature extremes are ensured via correlation using
standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Electrical Characteristics (1)
Specifications in standard type face are for TJ = 25°C and those in boldface type apply over the full Operating Temperature
Range (TJ = −40°C to +125°C). Unless otherwise specified. VIN =2.2V.
Symbol
IQ
Parameter
Min
Conditions
(1)
Typ
Max
40
70
(2)
(1)
Device Disabled
FB = 1.3V
Device Enabled
FB = 1.2V
235
300
Shutdown
SHDN = 0V
0.01
2.5
Units
µA
VFB
Feedback Trip Point
1.189
1.237
1.269
V
ICL
Switch Current Limit
490
420
550
610
620
mA
30
120
nA
7.0
V
IB
FB Pin Bias Current
VIN
Input Voltage Range
RDSON
Switch RDSON
0.7
TOFF
Switch Off Time
400
(1)
(2)
(3)
FB = 1.23V
(3)
2.2
1.6
Ω
ns
All limits ensured at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% production tested or ensured through statistical analysis. All limits at temperature extremes are ensured via correlation using
standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Typical numbers are at 25°C and represent the most likely norm.
Feedback current flows into the pin.
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Electrical Characteristics(1) (continued)
Specifications in standard type face are for TJ = 25°C and those in boldface type apply over the full Operating Temperature
Range (TJ = −40°C to +125°C). Unless otherwise specified. VIN =2.2V.
Symbol
ISD
Parameter
SHDN Pin Current
Typ
Max
SHDN = VIN, TJ = 25°C
0
80
SHDN = VIN, TJ = 125°C
15
SHDN = GND
0
Conditions
Min
(1)
(2)
IL
Switch Leakage Current
VSW = 20V
0.05
UVP
Input Undervoltage Lockout
ON/OFF Threshold
1.8
VFB
Hysteresis
Feedback Hysteresis
SHDN
Threshold
SHDN low
θJA
Thermal Resistance
4
(1)
nA
5
0.7
1.1
0.7
220
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µA
V
8
SHDN High
Units
mV
0.3
V
°C/W
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SNVS175D – FEBRUARY 2002 – REVISED MAY 2013
Typical Performance Characteristics
Enable Current
vs
VIN
(Part Switching)
Disable Current
vs
VIN
(Part Not Switching)
Efficiency
vs
Load Current
Efficiency
vs
Load Current
Efficiency
vs
Load Current
SHDN Threshold
vs
VIN
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SNVS175D – FEBRUARY 2002 – REVISED MAY 2013
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Typical Performance Characteristics (continued)
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Switch Current Limit
vs
VIN
Switch RDSON
vs
VIN
FB Trip Point and FB Pin Current
vs
Temperature
Output Voltage
vs
Load Current
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SNVS175D – FEBRUARY 2002 – REVISED MAY 2013
Typical Performance Characteristics (continued)
Step Response
VOUT = 20V, VIN = 3.0V
1) Load, 1mA to 17mA to 1mA, DC
2) VOUT, 200mV/div, AC
3) IL, 500mA/div, DC
T = 40µs/div
Start-Up/Shutdown
VOUT = 20V, VIN = 2.5V
1) SHDN, 1V/div, DC
2) IL, 250mA/div, DC
3) VOUT, 20V/div, DC
T = 400µs/div
RL = 1.3kΩ
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SNVS175D – FEBRUARY 2002 – REVISED MAY 2013
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OPERATION
Figure 2. LM2704 Block Diagram
VOUT = 20V, VIN = 2.5V
1) VSW, 20V/div, DC
2) Inductor Current, 500mA/div, DC
3) VOUT, 100mV/div, AC
T = 10µs/div
Figure 3. Typical Switching Waveform
The LM2704 features a constant off-time control scheme. Operation can be best understood by referring to
Figure 2 and Figure 3. Transistors Q1 and Q2 and resistors R3 and R4 of Figure 2 form a bandgap reference
used to control the output voltage. When the voltage at the FB pin is less than 1.237V, the Enable Comp in
Figure 2 enables the device and the NMOS switch is turned on pulling the SW pin to ground. When the NMOS
switch is on, current begins to flow through inductor L while the load current is supplied by the output capacitor
COUT. Once the current in the inductor reaches the peak current limit, the CL Comp trips and the 400ns One Shot
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turns off the NMOS switch. The SW voltage will then rise to the output voltage plus a diode drop and the inductor
current will begin to decrease as shown in Figure 3. During this time the energy stored in the inductor is
transferred to COUT and the load. After the 400ns off-time the NMOS switch is turned on and energy is stored in
the inductor again. This energy transfer from the inductor to the output causes a stepping effect in the output
ripple as shown in Figure 3.
This cycle is continued until the voltage at FB reaches 1.237V. When FB reaches this voltage, the enable
comparator then disables the device turning off the NMOS switch and reducing the Iq of the device to 40uA. The
load current is then supplied solely by COUT indicated by the gradually decreasing slope at the output as shown
in Figure 3. When the FB pin drops slightly below 1.237V, the enable comparator enables the device and begins
the cycle described previously. The SHDN pin can be used to turn off the LM2704 and reduce the Iq to 0.01µA.
In shutdown mode the output voltage will be a diode drop lower than the input voltage.
APPLICATION INFORMATION
INDUCTOR SELECTION
The appropriate inductor for a given application is calculated using the following equation:
(2)
where VD is the schottky diode voltage, ICL is the switch current limit found in the Typical Performance
Characteristics section, and TOFF is the switch off time. When using this equation be sure to use the minimum
input voltage for the application, such as for battery powered applications. For the LM2704 constant-off time
control scheme, the NMOS power switch is turned off when the current limit is reached. There is approximately a
200ns delay from the time the current limit is reached in the NMOS power switch and when the internal logic
actually turns off the switch. During this 200ns delay, the peak inductor current will increase. This increase in
inductor current demands a larger saturation current rating for the inductor. This saturation current can be
approximated by the following equation:
(3)
Choosing inductors with low ESR decrease power losses and increase efficiency.
Care should be taken when choosing an inductor. For applications that require an input voltage that approaches
the output voltage, such as when converting a Li-Ion battery voltage to 5V, the 400ns off time may not be enough
time to discharge the energy in the inductor and transfer the energy to the output capacitor and load. This can
cause a ramping effect in the inductor current waveform and an increased ripple on the output voltage. Using a
smaller inductor will cause the IPK to increase and will increase the output voltage ripple further. This can be
solved by adding a 4.7pF capacitor across the RF1 feedback resistor (Figure 2) and slightly increasing the output
capacitor. A smaller inductor can then be used to ensure proper discharge in the 400ns off time.
DIODE SELECTION
To maintain high efficiency, the average current rating of the schottky diode should be larger than the peak
inductor current, IPK. Schottky diodes with a low forward drop and fast switching speeds are ideal for increasing
efficiency in portable applications. Choose a reverse breakdown of the schottky diode larger than the output
voltage.
CAPACITOR SELECTION
Choose low ESR capacitors for the output to minimize output voltage ripple. Multilayer ceramic capacitors are the
best choice. For most applications, a 1µF ceramic capacitor is sufficient. For some applications a reduction in
output voltage ripple can be achieved by increasing the output capacitor.
Local bypassing for the input is needed on the LM2704. Multilayer ceramic capacitors are a good choice for this
as well. A 4.7µF capacitor is sufficient for most applications. For additional bypassing, a 100nF ceramic capacitor
can be used to shunt high frequency ripple on the input.
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LAYOUT CONSIDERATIONS
The input bypass capacitor CIN, as shown in Typical Application Circuit, must be placed close to the IC. This will
reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a
100nF bypass capacitor can be placed in parallel with CIN to shunt any high frequency noise to ground. The
output capacitor, COUT, should also be placed close to the IC. Any copper trace connections for the Cout
capacitor can increase the series resistance, which directly effects output voltage ripple. The feedback network,
resistors R1 and R2, should be kept close to the FB pin to minimize copper trace connections that can inject
noise into the system. The ground connection for the feedback resistor network should connect directly to an
analog ground plane. The analog ground plane should tie directly to the GND pin. If no analog ground plane is
available, the ground connection for the feedback network should tie directly to the GND pin. Trace connections
made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall
efficiency.
Figure 4. White LED Application
Figure 5. Li-Ion 5V Application
Figure 6. Li-Ion 12V Application
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Figure 7. 5V to 12V Application
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SNVS175D – FEBRUARY 2002 – REVISED MAY 2013
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REVISION HISTORY
Changes from Revision C (May 2013) to Revision D
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Changed layout of National Data Sheet to TI format .......................................................................................................... 11
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM2704MF-ADJ/NOPB
ACTIVE
SOT-23
DBV
5
1000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
S28B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of