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LM2717MT

LM2717MT

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP24

  • 描述:

    IC REG BUCK 3.3V DL 24TSSOP

  • 数据手册
  • 价格&库存
LM2717MT 数据手册
LM2717 www.ti.com SNVS253D – MAY 2005 – REVISED MARCH 2013 LM2717 Dual Step-Down DC/DC Converter Check for Samples: LM2717 FEATURES DESCRIPTION • The LM2717 is composed of two PWM DC/DC buck (step-down) converters. The first converter is used to generate a fixed output voltage of 3.3V. The second converter is used to generate an adjustable output voltage. Both converters feature low RDSON (0.16Ω) internal switches for maximum efficiency. Operating frequency can be adjusted anywhere between 300kHz and 600kHz allowing the use of small external components. External soft-start pins for each enables the user to tailor the soft-start times to a specific application. Each converter may also be shut down independently with its own shutdown pin. The LM2717 is available in a low profile 24-lead TSSOP package ensuring a low profile overall solution. 1 2 • • • • • • Fixed 3.3V Output Buck Converter with a 2.2A, 0.16Ω, Internal Switch Adjustable Buck Converter with a 3.2A, 0.16Ω, Internal Switch Operating Input Voltage Range of 4V to 20V Input Undervoltage Protection 300kHz to 600kHz Pin Adjustable Operating Frequency Over Temperature Protection Small 24-Lead TSSOP Package APPLICATIONS • • • • TFT-LCD Displays Handheld Devices Portable Applications Laptop Computers Typical Application Circuit 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2013, Texas Instruments Incorporated LM2717 SNVS253D – MAY 2005 – REVISED MARCH 2013 www.ti.com Connection Diagram Top View Figure 1. 24-Lead TSSOP See Package Number PW0024A PIN DESCRIPTIONS 2 Pin Name 1 PGND Power ground. PGND and AGND pins must be connected together directly at the part. Function 2 PGND Power ground. PGND and AGND pins must be connected together directly at the part. 3 AGND Analog ground. PGND and AGND pins must be connected together directly at the part. 4 FB1 Fixed buck output voltage feedback input. 5 VC1 Fixed buck compensation network connection. Connected to the output of the voltage error amplifier. 6 VBG Bandgap connection. 7 VC2 Adjustable buck compensation network connection. Connected to the output of the voltage error amplifier. 8 FB2 Adjustable buck output voltage feedback input. 9 AGND Analog ground. PGND and AGND pins must be connected together directly at the part. 10 AGND Analog ground. PGND and AGND pins must be connected together directly at the part. 11 PGND Power ground. PGND and AGND pins must be connected together directly at the part. 12 PGND Power ground. PGND and AGND pins must be connected together directly at the part. 13 SW2 Adjustable buck power switch input. Switch connected between VIN pins and SW2 pin. 14 VIN Analog power input. VIN pins should be connected together directly at the part. 15 VIN Analog power input. VIN pins should be connected together directly at the part. 16 CB2 Adjustable buck converter bootstrap capacitor connection. 17 SHDN2 Shutdown pin for adjustable buck converter. Active low. 18 SS2 19 FSLCT Adjustable buck soft start pin. 20 SS1 21 SHDN1 22 CB1 Fixed buck converter bootstrap capacitor connection. 23 VIN Analog power input. VIN pins should be connected together directly at the part. 24 SW1 Switching frequency select input. Use a resistor to set the frequency anywhere between 300kHz and 600kHz. Fixed buck soft start pin. Shutdown pin for fixed buck converter. Active low. Fixed buck power switch input. Switch connected between VIN pins and SW1 pin. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 LM2717 www.ti.com SNVS253D – MAY 2005 – REVISED MARCH 2013 Block Diagram FSLCT CB1 VIN + 95% Duty Cycle Limit + OSC SS1 Buck Load Current Measurement FB1 36.5k 20.38k DC LIMIT SET + PWM Comp - Soft Start RESET BUCK DRIVE Buck Driver SW1 OVP Error Amp + + OVP Comp - TSH PGND Thermal Shutdown BG SHDN1 Bandgap VBG SD Fixed Buck Converter VC1 FSLCT CB2 VIN + OSC SS2 FB2 SET + PWM Comp - Soft Start Buck Load Current Measurement DC LIMIT RESET BUCK DRIVE Buck Driver SW2 OVP Error Amp + + OVP Comp BG Bandgap VBG 95% Duty Cycle Limit + VC2 TSH SD PGND Thermal Shutdown SHDN2 Adjustable Buck Converter These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 3 LM2717 SNVS253D – MAY 2005 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) VIN −0.3V to 22V SW1 Voltage −0.3V to 22V SW2 Voltage −0.3V to 22V FB1, FB2 Voltages −0.3V to 7V CB1, CB2 Voltages −0.3V to VIN+7V (VIN=VSW) VC1 Voltage 1.75V ≤ VC1 ≤ 2.25V VC2 Voltage 0.965V ≤ VC2 ≤ 1.565V SHDN1 Voltage −0.3V to 7.5V SHDN2 Voltage −0.3V to 7.5V SS1 Voltage −0.3V to 2.1V SS2 Voltage −0.3V to 2.1V FSLCT Voltage AGND to 5V Maximum Junction Temperature 150°C Power Dissipation (3) Internally Limited Lead Temperature 300°C Vapor Phase (60 sec.) 215°C Infrared (15 sec.) 220°C ESD Susceptibility (1) (2) (3) (4) (4) Human Body Model 2kV Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Operating Conditions Operating Junction Temperature Range (1) −40°C to +125°C Storage Temperature −65°C to +150°C Supply Voltage 4V to 20V SW1 Voltage 20V SW2 Voltage 20V (1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested or ensured through statistical analysis. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Electrical Characteristics Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating Temperature Range (TJ = −40°C to +125°C). VIN = 5V, IL = 0A, and FSW = 300kHz unless otherwise specified. Symbol IQ Parameter Total Quiescent Current (both switchers) VFB1 Fixed Buck Feedback Voltage VFB2 Adjustable Buck Feedback Voltage (1) (2) 4 Conditions Min (1) Not Switching Typ (2) Max (1) Units 2.7 6 mA Switching, switch open 6 12 mA VSHDN = 0V 9 27 µA 3.3 V 1.267 V All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested or ensured through statistical analysis. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Typical numbers are at 25°C and represent the most likely norm. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 LM2717 www.ti.com SNVS253D – MAY 2005 – REVISED MARCH 2013 Electrical Characteristics (continued) Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating Temperature Range (TJ = −40°C to +125°C). VIN = 5V, IL = 0A, and FSW = 300kHz unless otherwise specified. Symbol ICL1 (3) Parameter Conditions Fixed Buck Switch Current Limit VIN = 8V ICL2 (3) Adjustable Buck Switch Current Limit IB1 Min (1) Typ (2) Max (1) Units (4) 2.2 A VIN = 8V (4) 3.2 A Fixed Buck FB Pin Bias Current (5) VIN = 20V 65 µA IB2 Adjustable Buck FB Pin Bias Current (5) VIN = 20V 65 nA VIN Input Voltage Range gm1 Fixed Buck Error Amp Transconductance ΔI = 20µA gm2 Adjustable Buck Error Amp Transconductance ΔI = 20µA AV1 4 20 V 1340 µmho 1360 µmho Fixed Buck Error Amp Voltage Gain 134 V/V AV2 Adjustable Buck Error Amp Voltage Gain 136 V/V DMAX Maximum Duty Cycle FSW Switching Frequency ISHDN1 Fixed Buck Shutdown Pin Current 89 93 RF = 46.4k 200 300 400 kHz RF = 22.6k 475 600 775 kHz 0V < VSHDN1 < 7.5V −5 5 µA ISHDN2 Adjustable Buck Shutdown Pin 0V < VSHDN2 < 7.5V Current −5 5 µA IL1 Fixed Buck Switch Leakage Current VIN = 20V 0.01 5 µA IL2 Adjustable Buck Switch Leakage Current VIN = 20V 0.01 5 µA (6) RDSON1 Fixed Buck Switch RDSON RDSON2 Adjustable Buck Switch RDSON (6) ThSHDN1 Fixed Buck SHDN Threshold Output High 1.8 Output Low ThSHDN2 Adjustable Buck SHDN Threshold Output High 160 mΩ 160 mΩ 1.36 1.33 1.8 Output Low % V 0.7 1.36 1.33 0.7 V ISS1 Fixed Buck Soft Start Pin Current 4 9 15 µA ISS2 Adjustable Buck Soft Start Pin Current 4 9 15 µA UVP On Threshold 4 3.8 Off Threshold θJA (3) (4) (5) (6) (7) Thermal Resistance (7) 3.6 TSSOP, package only 115 V 3.3 °C/W Duty cycle affects current limit due to ramp generator. Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. VIN Bias current flows into FB pin. Includes the bond wires, RDSON from VIN pin(s) to SW pin. Refer to Texas Instruments packaging website for more detailed thermal information and mounting techniques for the TSSOP package. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 5 LM2717 SNVS253D – MAY 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics Switching IQ vs. Input Voltage (FSW = 300kHz) 16 9 14 8 12 7 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (PA) Shutdown IQ vs. Input Voltage 10 8 6 4 2 6 5 4 3 2 1 0 4 6 8 10 12 14 16 18 20 0 4 INPUT VOLTAGE (V) 6 8 10 12 14 16 18 20 18 20 INPUT VOLTAGE (V) Figure 2. Figure 3. Switching Frequency vs. Input Voltage (FSW = 300kHz) Fixed Buck RDS(ON) vs. Input Voltage 320 200 190 315 180 SWITCH RDS(ON) (m: SWITCHING FREQUENCY (kHz) R F = 46.4k 310 305 300 170 160 150 140 130 120 295 110 290 100 4 6 8 10 12 14 16 18 20 4 6 8 12 14 16 Figure 4. Figure 5. Adjustable Buck RDS(ON) vs. Input Voltage Fixed Buck Efficiency vs. Load Current 200 100 190 90 180 80 170 70 160 150 140 V IN = 5V V IN = 12V 60 V IN = 18V 50 40 130 30 120 20 110 10 0 100 4 6 8 10 12 14 16 18 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 LOAD CURRENT (A) INPUT VOLTAGE (V) Figure 6. 6 10 INPUT VOLTAGE (V) EFFICIENCY (%) SWITCH RDS(ON) (m: INPUT VOLTAGE (V) Figure 7. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 LM2717 www.ti.com SNVS253D – MAY 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Adjustable Buck Efficiency vs. Load Current (VOUT = 5V) 100 100 90 90 80 80 70 70 EFFICIENCY (%) EFFICIENCY (%) Adjustable Buck Efficiency vs. Load Current (VOUT = 15V) 60 50 40 30 50 40 30 20 20 V IN = 18V 10 V IN = 18V 10 0 0 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 LOAD CURRENT (A) LOAD CURRENT (A) Figure 8. Figure 9. Fixed Buck Switch Current Limt vs. Input Voltage Adjustable Buck Switch Current Limt vs. Input Voltage (VOUT = 5V) 2.4 3.4 2.2 3.2 SWITCH CURRENT LIMIT (A) SWITCH CURRENT LIMIT (A) 60 2 1.8 1.6 1.4 1.2 3 2.8 2.6 2.4 2.2 1 2 4 6 8 10 12 14 16 18 20 8 10 12 14 16 18 20 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 10. Figure 11. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 7 LM2717 SNVS253D – MAY 2005 – REVISED MARCH 2013 www.ti.com BUCK OPERATION PROTECTION (BOTH REGULATORS) The LM2717 has dedicated protection circuitry running during normal operation to protect the IC. The Thermal Shutdown circuitry turns off the power devices when the die temperature reaches excessive levels. The UVP comparator protects the power devices during supply power startup and shutdown to prevent operation at voltages less than the minimum input voltage. The OVP comparator is used to prevent the output voltage from rising at no loads allowing full PWM operation over all load conditions. The LM2717 also features a shutdown mode for each converter decreasing the supply current to approximately 10µA (both in shutdown mode). CONTINUOUS CONDUCTION MODE The LM2717 contains current-mode, PWM buck regulators. A buck regulator steps the input voltage down to a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady state), the buck regulator operates in two cycles. The power switch is connected between VIN and SW1 and SW2. In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and the load current is supplied by COUT and the rising current through the inductor. During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as: D= VOUT , D' = (1-D) VIN (1) where D is the duty cycle of the switch, D and D′ will be required for design calculations. DESIGN PROCEDURE This section presents guidelines for selecting external components. SETTING THE OUTPUT VOLTAGE (ADJUSTABLE REGULATOR) The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in Figure 12. The feedback pin voltage is 1.26V, so the ratio of the feedback resistors sets the output voltage according to the following equation: RFB1 = RFB2 x VOUT - 1.267 : 1.267 (2) INPUT CAPACITOR A low ESR aluminum, tantalum, or ceramic capacitor is needed betwen the input pin and power ground. This capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the RMS current and voltage requirements. The RMS current is given by: (3) The RMS current reaches its maximum (IOUT/2) when VIN equals 2VOUT. This value should be calculated for both regulators and added to give a total RMS current rating. For an aluminum or ceramic capacitor, the voltage rating should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating required is about twice the maximum input voltage. The tantalum capacitor should be surge current tested by the manufacturer to prevent being shorted by the inrush current. The minimum capacitor value should be 47µF for lower output load current applications and less dynamic (quickly changing) load conditions. For higher output current applications or dynamic load conditions a 68µF to 100µF low ESR capacitor is recommended. It is also recommended to put a small ceramic capacitor (0.1µF to 4.7µF) between the input pins and ground to reduce high frequency spikes. 8 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 LM2717 www.ti.com SNVS253D – MAY 2005 – REVISED MARCH 2013 INDUCTOR SELECTION The most critical parameters for the inductor are the inductance, peak current and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages (for 300kHz operation): (4) A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, and current stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the ripple current increases with the input voltage, the maximum input voltage is always used to determine the inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the inductor copper loss equal 2% of the output power. OUTPUT CAPACITOR The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant frequency, PWM mode is approximated by: (5) The ESR term usually plays the dominant role in determining the voltage ripple. Low ESR ceramic, aluminum electrolytic, or tantalum capacitors (such as Taiyo Yuden MLCC, Nichicon PL series, Sanyo OS-CON, Sprague 593D, 594D, AVX TPS, and CDE polymer aluminum) is recommended. An electrolytic capacitor is not recommended for temperatures below −25°C since its ESR rises dramatically at cold temperature. Ceramic or tantalum capacitors have much better ESR specifications at cold temperature and is preferred for low temperature applications. BOOTSTRAP CAPACITOR A 4.7nF ceramic capacitor or larger is recommended for the bootstrap capacitor. For applications where the input voltage is less than twice the output voltage a larger capacitor is recommended, generally 0.1µF to 1µF to ensure plenty of gate drive for the internal switches and a consistently low RDS(ON). SOFT-START CAPACITOR (BOTH REGULATORS) The LM2717 does not contain internal soft-start which allows for fast startup time but also causes high inrush current. Therefore for applications that need reduced inrush current the LM2717 has circuitry that is used to limit the inrush current on start-up of the DC/DC switching regulators. This inrush current limiting circuitry serves as a soft-start. The external SS pins are used to tailor the soft-start for a specific application. A current (ISS) charges the external soft-start capacitor, CSS. The soft-start time can be estimated as: TSS = CSS*0.6V/ISS (6) When programming the softstart time simply use the equation given in the Soft-Start Capacitor section above. SHUTDOWN OPERATION (BOTH REGULATORS) The shutdown pins of the LM2717 are designed so that they may be controlled using 1.8V or higher logic signals. If the shutdown function is not to be used the pin may be left open. The maximum voltage to the shutdown pin should not exceed 7.5V. If the use of a higher voltage is desired due to system or other constraints it may be used, however a 100k or larger resistor is recommended between the applied voltage and the shutdown pin to protect the device. SCHOTTKY DIODE The breakdown voltage rating of D1 and D2 is preferred to be 25% higher than the maximum input voltage. The current rating for the diode should be equal to the maximum output current for best reliability in most applications. In cases where the input voltage is much greater than the output voltage the average diode current is lower. In this case it is possible to use a diode with a lower average current rating, approximately (1-D)*IOUT however the peak current rating should be higher than the maximum load current. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 9 LM2717 SNVS253D – MAY 2005 – REVISED MARCH 2013 www.ti.com LAYOUT CONSIDERATIONS The LM2717 uses two separate ground connections, PGND for the drivers and boost NMOS power device and AGND for the sensitive analog control circuitry. The AGND and PGND pins should be tied directly together at the package. The feedback and compensation networks should be connected directly to a dedicated analog ground plane and this ground plane must connect to the AGND pin. If no analog ground plane is available then the ground connections of the feedback and compensation networks must tie directly to the AGND pin. Connecting these networks to the PGND can inject noise into the system and effect performance. The input bypass capacitor CIN, as shown in Figure 12, must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 0.1µF to 4.7µF bypass capacitors can be placed in parallel with CIN, close to the VIN pins to shunt any high frequency noise to ground. The output capacitors, COUT1 and COUT2, should also be placed close to the IC. Any copper trace connections for the COUTX capacitors can increase the series resistance, which directly effects output voltage ripple. The feedback network, resistors RFB1 and RFB2, should be kept close to the FB pin, and away from the inductor to minimize copper trace connections that can inject noise into the system. Trace connections made to the inductors and schottky diodes should be minimized to reduce power dissipation and increase overall efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149: Layout Guidelines for Switching Power Supplies (SNVA021). Application Information Table 1. Some Recommended Inductors (Others May Be Used) Manufacturer Inductor Contact Information Coilcraft DO3316 and DO5022 series www.coilcraft.com Coiltronics DRQ73 and CD1 series www.cooperet.com Pulse P0751 and P0762 series www.pulseeng.com Sumida CDRH8D28 and CDRH8D43 series www.sumida.com Table 2. Some Recommended Input And Output Capacitors (Others May Be Used) 10 Manufacturer Capacitor Contact Information Vishay Sprague 293D, 592D, and 595D series tantalum www.vishay.com Taiyo Yuden High capacitance MLCC ceramic www.t-yuden.com Cornell Dubilier ESRD seriec Polymer Aluminum Electrolytic SPV and AFK series V-chip series www.cde.com Panasonic High capacitance MLCC ceramic EEJ-L series tantalum www.panasonic.com Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 LM2717 www.ti.com SNVS253D – MAY 2005 – REVISED MARCH 2013 L1 22 PH CBOOT1 4.7 nF U1 CSS1 CC1 47 nF 20k 4.7 nF RC1 CBG 1 nF CC2 2k 4.7 nF RC2 CSS2 RF 20.5k 47 nF AGND CB1 SW1 FB1 SHDN1 SS1 VC1 VIN VBG VIN VC2 SHDN2 CB2 *Connect CINA (pin 23) and CINB (pins 14,15) as close as possible to the VIN pins. VIN SS2 FSLCT FB2 AGND AGND SW2 PGND AGND PGND PGND PGND CBOOT2 *CINB 4.7 PF ceramic 3.3V OUT1 D1 MBRS240 COUT1A 1 PF ceramic 17V to 20V IN *CINA 4.7 PF ceramic CIN 68 PF L2 22 PH 1 PF COUT1 68 PF 15V OUT2 RFB1 D2 MBRS240 221k COUT2A 1 PF ceramic COUT2 68 PF LM2717 RFB2 20k PGND Figure 12. 15V, 3.3V Output Application L1 22 PH CBOOT1 1 PF U1 CSS1 CC1 47 nF 20k 4.7 nF RC1 CBG 1 nF CC2 10k 4.7 nF RC2 CSS2 RF 20.5k 47 nF AGND CB1 SW1 FB1 SHDN1 SS1 VC1 VIN VBG VIN VC2 SHDN2 CB2 *Connect CINA (pin 23) and CINB (pins 14,15) as close as possible to the VIN pins. VIN SS2 FSLCT FB2 AGND AGND SW2 PGND AGND PGND PGND PGND CBOOT2 *CINB 4.7 PF ceramic 1 PF 3.3V OUT1 D1 MBRS240 COUT1A 1 PF ceramic COUT1 68 PF 8V to 20V IN *CINA 4.7 PF ceramic CIN 68 PF L2 22 PH D2 MBRS240 5V OUT2 RFB1 59k COUT2A 1 PF ceramic COUT2 68 PF LM2717 RFB2 20k PGND Figure 13. 5V, 3.3V Output Application Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 11 LM2717 SNVS253D – MAY 2005 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision C (March 2013) to Revision D • 12 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 11 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM2717 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM2717MT/NOPB ACTIVE TSSOP PW 24 61 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM2717MT LM2717MTX/NOPB ACTIVE TSSOP PW 24 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM2717MT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
LM2717MT 价格&库存

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