LM2750
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SNVS180L – APRIL 2002 – REVISED MAY 2013
LM2750 Low Noise Switched Capacitor Boost Regulator
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FEATURES
APPLICATIONS
•
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1
2
•
•
•
•
•
•
•
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Inductorless Solution: Application Requires
Only 3 Small Ceramic Capacitors
Fixed 5.0V Output and Adjustable Output
Voltage Options Available
85% Peak Efficiency
– 70% Average Efficiency over Li-Ion Input
Range (2.9V-to-4.2V)
Output Current up to 120mA with 2.9V ≤ VIN ≤
5.6V
– Output Current up to 40mA with 2.7V ≤ VIN ≤
2.9V
Wide Input Voltage Range: 2.7V to 5.6V
Fixed 1.7MHz Switching Frequency for a Lownoise, Low-ripple Output Signal
Pre-regulation Minimizes Input Current Ripple,
Keeping the Battery Line (VIN) Virtually Noisefree
Tiny WSON Package with Outstanding Power
Dissipation: Usually no Derating Required.
Shutdown Supply Current Less Than 2µA
•
•
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White and Colored LED-based Display
Lighting
Cellular Phone SIM Cards
Audio Amplifier Power Supplies
General Purpose Li-Ion-to-5V Conversion
DESCRIPTION
The LM2750 is a regulated switched-capacitor
doubler that produces a low-noise output voltage. The
5.0V output voltage option (LM2750-5.0) can supply
up to 120mA of output current over a 2.9V to 5.6V
input range, as well as up to 40mA of output current
when the input voltage is as low as 2.7V. An
adjustable output voltage option with similar output
current capabilities is also available (LM2750-ADJ).
The LM2750 has been placed in TI's 10-pin WSON, a
package with excellent thermal properties that keeps
the part from overheating under almost all rated
operating conditions.
Typical Application Circuit
IOUT up to 120mA, (VIN t 2.9V)
IOUT up to 40mA, (VIN t 2.7V)
8, 9
VIN
2.7V to 5.6V
VOUT
VIN
CIN
2.2 PF
COUT
2.2 PF
LM2750-5.0
4
CAP+
SD
VOUT
5.0V ± 4%
1, 2
10
CFLY
1 PF
CAPGND
7
3, 5, 6, DAP
Capacitors: 1.0PF - TDK C1608X5R1A105K
2.2PF - TDK C2012X7R1A225K
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2013, Texas Instruments Incorporated
LM2750
SNVS180L – APRIL 2002 – REVISED MAY 2013
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DESCRIPTION (CONTINUED)
A perfect fit for space-constrained, battery-powered applications, the LM2750 requires only 3 external
components: one input capacitor, one output capacitor, and one flying capacitor. Small, inexpensive ceramic
capacitors are recommended for use. These capacitors, in conjunction with the 1.7MHz fixed switching frequency
of the LM2750, yield low output voltage ripple, beneficial for systems requiring a low-noise supply. Pre-regulation
minimizes input current ripple, reducing input noise to negligible levels.
A tightly controlled soft-start feature limits inrush currents during part activation. Shutdown completely
disconnects the load from the input. Output current limiting and thermal shutdown circuitry protect both the
LM2750 and connected devices in the event of output shorts or excessive current loads.
Connection Diagram
VOUT
1
VOUT
2
GND/FB*
3
SD
4
GND
5
Die-Attach
Pad (DAP)
GND
VOUT
10
C+
C+
10
9
VIN
VIN
9
8
VIN
VIN
8
Die-Attach
Pad (DAP)
3
7
C-
C-
7
GND
4
SD
6
GND
GND
6
5
GND
Top View
1
2
VOUT
GND/FB*
Bottom View
* LM2750-5.0: Pin 3 = GND; LM2750-ADJ: Pin 3 = FB
Figure 1. LM2750 10-Pin WSON/SON (3mm X 3mm)
See Package Number NGY0010A or DSC0010A
Pin Names and Numbers apply to both NGY0010A and DSC0010A packages.
Pin Descriptions
Pin #(s)
Pin Name
8, 9
VIN
1, 2
VOUT
Output Voltage - These pins must be connected externally.
10
CAP+
Flying Capacitor Positive Terminal
7
CAP-
Flying Capacitor Negative Terminal
4
SD
3
5, 6, DAP
2
Description
Input Voltage - The pins must be connected externally.
Active-Low Shutdown Input. A 200kΩ resistor is connected internally between this pin and
GND to pull the voltage on this pin to 0V, and shut down the part, when the pin is left floating.
LM2750-5.0: GND
This pin must be connected externally to the ground pins (pins 5, 6, and the DAP).
LM2750-ADJ: FB
Feedback Pin
GND
Ground - These pins must be connected externally.
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Absolute Maximum Ratings
(1) (2) (3)
−0.3V to 6V
VIN Pin: Voltage to Ground
−0.3V to (VIN+0.3V)
SD Pin: Voltage to GND
Junction Temperature (TJ-MAX-ABS)
150°C
Continuous Power Dissipation (1)
Internally Limited
(2)
175mA
Storage Temperature Range
−65°C to 150°C
Maximum Output Current
Maximum Lead Temperature (Soldering, 5 sec.)
260°C
ESD Rating (3)
Human-body model:
Machine model
(1)
(2)
(3)
(1)
(2)
(3)
2 kV
100V
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is specified. Operating Ratings do not imply performance limits. For performance limits and associated test
conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pin.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
Thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150°C (typ.) and disengages
at TJ=135°C (typ.).
Absolute Maximum Output Current specified by design. Recommended input voltage range for output currents in excess of 120mA: 3.1V
to 4.4V.
The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. MIL-STD-883 3015.7. The machine
model is a 200pF capacitor discharged directly into each pin.
Operating Ratings (1) (2)
LM2750-5.0 Input Voltage Range
LM2750-ADJ Input Voltage Range
2.7V to 5.6V
3.8V ≤ VOUT ≤ 4.9V:
2.7V to (VOUT+0.7V)
4.9V ≤ VOUT ≤ 5.2V:
2.7V to 5.6V
LM2750-ADJ Output Voltage Range
Recommended Output Current
3.8V to 5.2V
2.9V ≤ VIN ≤ 5.6V
2.7V ≤ VIN ≤ 2.9V
Junction Temperature (TJ) Range
(2)
(3)
0 to 40mA
-40°C to 125°C
Ambient Temperature (TA) Range (3)
(1)
0 to 120mA
-40°C to 85°C
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is specified. Operating Ratings do not imply performance limits. For performance limits and associated test
conditions, see Electrical Characteristics() ().
All voltages are with respect to the potential at the GND pin.
Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125ºC), the
maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP - (θJA × PD-MAX). Maximum power dissipation of the
LM2750 in a given application can be approximated using the following equation: PD-MAX = (VIN-MAX × IIN-MAX) - (VOUT × IOUT-MAX) = [VINMAX × ((2 × IOUT-MAX) + 5mA)] - (VOUT × IOUT-MAX). In this equation, VIN-MAX, IIN-MAX, and IOUT-MAX are the maximum voltage/current of the
specific application, and not necessarily the maximum rating of the LM2750.The maximum ambient temperature rating of 85ºC is
determined under the following application conditions: θJA = 55ºC/W, PD-MAX = 727mW (achieved when VIN-MAX = 5.5V and IOUT-MAX =
115mA, for example). Maximum ambient temperature must be derated by 1.1ºC for every increase in internal power dissipation of
20mW above 727mW (again assuming that θJA = 55ºC/W in the application). For more information on these topics, see TI's AN-1187
Application Report (SNOA401) and the POWER EFFICIENCY AND POWER DISSIPATION section of this datasheet.
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LM2750
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Thermal Information
Junction-to-Ambient Thermal Resistance, WSON-10
(1)
Package (θJA)
(1)
55°C/W
Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set
forth in the JEDEC standard JESD51-7. The test board is a 4 layer FR-4 board measuring 102mm x 76mm x 1.6mm with a 2 x 1 array
of thermal vias. The ground plane on the board is 50mm x 50mm. Thickness of copper layers are 36µm/18µm
/18µm/36µm(1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1W. The value of θJA of the
LM2750 in WSON-10 could fall in a range as wide as 50ºC/W to 150ºC/W (if not wider), depending on PCB material, layout, and
environmental conditions. In applications where high maximum power dissipation exists (high VIN, high IOUT), special care must be paid
to thermal dissipation issues. For more information on these topics, see TI's AN-1187 Application Report (SNOA401) and the LAYOUT
RECOMMENDATIONS section of this datasheet.
Electrical Characteristics (1)
(2)
Typical values and limits in standard typeface apply for TJ = 25ºC. Limits in boldface type apply over the operating junction
temperature range. Unless otherwise specified: 2.9V ≤ VIN ≤ 5.6V, VOUT = 5.0V (LM2750-ADJ), V(SD) = VIN, CFLY = 1µF, CIN =
2 x 1µF, COUT = 2 x 1µF (3).
Symbol
Parameter
Min
Typ
Max
2.9V ≤ VIN ≤ 5.6V,
IOUT ≤ 120mA
Conditions
4.80
(-4%)
5.0
5.20
(+4%)
2.7V ≤ VIN ≤ 2.9V,
IOUT ≤ 40mA
4.80
(-4%)
5.0
5.20
(+4%)
5
10
12
mA
2
µA
1.232
1.294
V
VOUT
Output Voltage
(LM2750-5.0)
IQ
Operating Supply Current
IOUT = 0mA,
VIH(MIN) ≤ V(SD) ≤VIN
ISD
Shutdown Supply Current
V(SD) = 0V
VFB
Feedback Pin Voltage (LM2750ADJ)
VIN = 3.1V
IFB
Feedback Pin Input Current
(LM2750-ADJ)
VFB = 1.4V
VR
Output Ripple
COUT = 10µF, IOUT = 100mA
4
COUT = 2.2µF, IOUT = 100mA
15
VIN = 2.7V, IOUT = 40mA
87
VIN = 2.9V, IOUT = 120mA
85
EPEAK
EAVG
Peak Efficiency
(LM2750-5.0)
1.170
1
Average Efficiency over Li-Ion Input VIN Range: 2.9V - 4.2V,
Range
IOUT = 120mA
(LM2750-5.0) (4)
VIN Range: 2.9V - 4.2V,
IOUT = 40mA
fSW
Switching Frequency
tON
VOUT Turn-On Time
ILIM
Current Limit
Units
V
(%)
nA
mVp-p
%
70
%
67
1.0
1.7
MHz
VIN= 3.0V, IOUT = 100mA,
0.5
ms
VOUT shorted to GND
300
mA
(5)
Shutdown Pin (SD) Characteristics
VIH
Logic-High SD Input
1.3
VIN
VIL
Logic-Low SD Input
0
0.4
V
IIH
SD Input Current
50
µA
IIL
SD Input Current
1
µA
(1)
(2)
(3)
(4)
(5)
(6)
4
(6)
1.3V ≤ V(SD) ≤ VIN
V(SD) = 0V
15
−1
V
All voltages are with respect to the potential at the GND pin.
Min and Max limits are specified by design, test, or statistical analysis. Typical numbers represent the most likely norm.
CFLY, CIN, and COUT : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics
Efficiency is measured versus VIN, with VIN being swept in small increments from 3.0V to 4.2V. The average is calculated from these
measurements results. Weighting to account for battery voltage discharge characteristics (VBAT vs. Time) is not done in computing the
average.
Turn-on time is measured from when SD signal is pulled high until the output voltage crosses 90% of its final value.
SD Input Current (IIH ) is due to a 200kΩ (typ.) pull-down resistor connected internally between the SD pin and GND.
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Electrical Characteristics(1) (2) (continued)
Typical values and limits in standard typeface apply for TJ = 25ºC. Limits in boldface type apply over the operating junction
temperature range. Unless otherwise specified: 2.9V ≤ VIN ≤ 5.6V, VOUT = 5.0V (LM2750-ADJ), V(SD) = VIN, CFLY = 1µF, CIN =
2 x 1µF, COUT = 2 x 1µF (3).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Capacitor Requirements
CIN
Required Input Capacitance (7)
COUT
Required Output Capacitance (7)
(7)
IOUT ≤ 60mA
1.0
60mA ≤ IOUT ≤ 120mA
2.0
IOUT ≤ 60mA
1.0
60mA ≤ IOUT ≤ 120mA
2.0
µF
µF
Limit is the minimum required output capacitance to ensure proper operation. This electrical specification is specified by design.
BLOCK DIAGRAM
C-
C+
LM2750
S1
I1
S3
I2
S2
I1
S4
I2
VOUT
OCL
OCL = OverCurrent Limit
VIN
Ra*
R1**
FB**
1.7 MHz Osc.
Rb*
SD
Softstart
R2**
1.2V
Ref.
GND
* LM2750-5.0 only
** LM2750-ADJ only
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Typical Performance Characteristics
Unless otherwise specified: VIN = 3.6V, TA = 25ºC, CIN = 2.2µF, CFLY = 1.0µF, COUT = 2.2µF. Capacitors are low-ESR multilayer ceramic capacitors (MLCC's).
6
Output Voltage
vs.
Output Current
Output Voltage
vs.
Output Current
Figure 2.
Figure 3.
Output Voltage
vs.
Input Voltage
Power Efficiency
Figure 4.
Figure 5.
Input Current
vs.
Output Current
Quiescent Supply Current
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Unless otherwise specified: VIN = 3.6V, TA = 25ºC, CIN = 2.2µF, CFLY = 1.0µF, COUT = 2.2µF. Capacitors are low-ESR multilayer ceramic capacitors (MLCC's).
Current Limit Behavior
Switching Frequency
Figure 8.
Figure 9.
Output Voltage Ripple
Output Voltage Ripple, IOUT = 120mA
Figure 10.
Figure 11.
Turn-on Behavior
Figure 12.
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LM2750
SNVS180L – APRIL 2002 – REVISED MAY 2013
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OPERATION DESCRIPTION
OVERVIEW
The LM2750 is a regulated switched capacitor doubler that, by combining the principles of switched-capacitor
voltage boost and linear regulation, generates a regulated output from an extended Li-Ion input voltage range. A
two-phase non-overlapping clock generated internally controls the operation of the doubler. During the charge
phase (φ1), the flying capacitor (CFLY) is connected between the input and ground through internal passtransistor switches and is charged to the input voltage. In the pump phase that follows (φ2), the flying capacitor is
connected between the input and output through similar switches. Stacked atop the input, the charge of the flying
capacitor boosts the output voltage and supplies the load current.
A traditional switched capacitor doubler operating in this manner will use switches with very low on-resistance to
generate an output voltage that is 2× the input voltage. The LM2750 regulates the output voltage by controlling
the resistance of the two input-connected pass-transistor switches in the doubler.
PRE-REGULATION
The very low input current ripple of the LM2750, resulting from internal pre-regulation, adds very little noise to the
input line. The core of the LM2750 is very similar to that of a basic switched capacitor doubler: it is composed of
four switches and a flying capacitor (external). Regulation is achieved by modulating the on-resistance of the two
switches connected to the input pin (one switch in each phase). The regulation is done before the voltage
doubling, giving rise to the term "pre-regulation". It is pre-regulation that eliminates most of the input current
ripple that is a typical and undesirable characteristic of a many switched capacitor converters.
INPUT, OUTPUT, AND GROUND CONNECTIONS
Making good input, output, and ground connections is essential to achieve optimal LM2750 performance. The
two input pads, pads 8 and 9, must be connected externally. It is strongly recommended that the input capacitor
(CIN) be placed as close as possible to the LM2750, so that the traces from the input pads are as short and
straight as possible. To minimize the effect of input noise on LM2750 performance, it is best to bring two traces
out from the LM2750 all the way to the input capacitor pad, so that they are connected at the capacitor pad.
Connecting the two input traces between the input capacitor and the LM2750 input pads could make the LM2750
more susceptible to noise-related performance degradation. It is also recommended that the input capacitor be
on the same side of the PCB as the LM2750, and that traces remain on this side of the board as well (vias to
traces on other PCB layers are not recommended between the input capacitor and LM2750 input pads).
The two output pads, pads 1 and 2, must also be connected externally. It is recommended that the output
capacitor (COUT) be placed as close to the LM2750 output pads as possible. It is best if routing of output pad
traces follow guidelines similar to those presented for the input pads and capacitor. The flying capacitor (CFLY)
should also be placed as close to the LM2750 as possible to minimize PCB trace length between the capacitor
and the IC. Due to the pad-layout of the part, it is likely that the trace from one of the flying capacitor pads (C+ or
C-) will need to be routed to an internal or opposite-side layer using vias. This is acceptable, and it is much more
advantageous to route a flying capacitor trace in this fashion than it is to place input traces on other layers.
The GND pads of the LM2750 are ground connections and must be connected externally. These include pads 3
(LM2750-5.0 only), 5, 6 and the die-attach pad (DAP). Large, low impedance copper fills and via connections to
an internal ground plane are the preferred way of connecting together the ground pads of the LM2750, the input
capacitor, and the output capacitor, as well as connecting this circuit ground to the system ground of the PCB.
SHUTDOWN
When the voltage on the active-low-logic shutdown pin is low, the LM2750 will be in shutdown mode. In
shutdown, the LM2750 draws virtually no supply current. There is a 200kΩ pull-down resistor tied between the
SD pin and GND that pulls the SD pin voltage low if the pin is not driven by a voltage source. When pulling the
part out of shutdown, the voltage source connected to the SD pin must be able to drive the current required by
the 200kΩ resistor. For voltage management purposes required upon startup, internal switches connect the
output of the LM2750 to an internal pull-down resistor (1kΩ typ) when the part is shutdown. Driving the output of
the LM2750 by another supply when the LM2750 is shutdown is not recommended, as the pull-down resistor was
not sized to sink continuous current.
8
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SOFT START
The LM2750 employs soft start circuitry to prevent excessive input inrush currents during startup. The output
voltage is programmed to rise from 0V to the nominal output voltage (5.0V) in 500µs (typ.). Soft-start is engaged
when a part, with input voltage established, is taken out of shutdown mode by pulling the SD pin voltage high.
Soft-start will also engage when voltage is established simultaneously to the input and SD pins.
OUTPUT CURRENT CAPABILITY
The LM2750-5.0 provides 120mA of output current when the input voltage is within 2.9V-to-5.6V. Using the
LM2750 to drive loads in excess of 120mA is possible. IMPORTANT NOTE: Understanding relevant application
issues is recommended and a thorough analysis of the application circuit should be performed when using the
part outside operating ratings and/or specifications to ensure satisfactory circuit performance in the application.
Special care should be paid to power dissipation and thermal effects. These parameters can have a dramatic
impact on high-current applications, especially when the input voltage is high. (see the POWER EFFICIENCY
AND POWER DISSIPATION section, to come).
The schematic of Figure 13 is a simplified model of the LM2750 that is useful for evaluating output current
capability. The model shows a linear pre-regulation block (Reg), a voltage doubler (2×), and an output resistance
(ROUT). Output resistance models the output voltage droop that is inherent to switched capacitor converters. The
output resistance of the LM2750 is 5Ω (typ.), and is approximately equal to twice the resistance of the four
LM2750 switches. When the output voltage is in regulation, the regulator in the model controls the voltage V' to
keep the output voltage equal to 5.0V ± 4%. With increased output current, the voltage drop across ROUT
increases. To prevent droop in output voltage, the voltage drop across the regulator is reduced, V' increases, and
VOUT remains at 5V. When the output current increases to the point that there is zero voltage drop across the
regulator, V' equals the input voltage, and the output voltage is "on the edge" of regulation. Additional output
current causes the output voltage to fall out of regulation, and the LM2750 operation is similar to a basic openloop doubler. As in a voltage doubler, increase in output current results in output voltage drop proportional to the
output resistance of the doubler. The out-of-regulation LM2750 output voltage can be approximated by:
VOUT= 2×VIN - IOUT × ROUT
Again, this equation only applies at low input voltage and high output current where the LM2750 is not regulating.
See Output Current vs. Output Voltage curves in the Typical Performance Characteristics section for more
details.
LM2750
VIN
V'
Reg
VOUT
2×V '
2×
ROUT
Output Resistance Model
Figure 13. LM2750 Output Resistance Model
A more complete calculation of output resistance takes into account the effects of switching frequency, flying
capacitance, and capacitor equivalent series resistance (ESR). This equation is shown below:
R OUT
2 ˜ R SW
1
FSW u C FLY
4 ˜ ESR CFLY
ESR COUT
Switch resistance (5Ω typ.) dominates the output resistance equation of the LM2750. With a 1.7MHz typical
switching frequency, the 1/(F×C) component of the output resistance contributes only 0.6Ω to the total output
resistance. Increasing the flying capacitance will only provide minimal improvement to the total output current
capability of the LM2750. In some applications it may be desirable to reduce the value of the flying capacitor
below 1µF to reduce solution size and/or cost, but this should be done with care so that output resistance does
not increase to the point that undesired output voltage droop results. If ceramic capacitors are used, ESR will be
a negligible factor in the total output resistance, as the ESR of quality ceramic capacitors is typically much less
than 100mΩ.
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THERMAL SHUTDOWN
The LM2750 implements a thermal shutdown mechanism to protect the device from damage due to overheating.
When the junction temperature rises to 150ºC (typ.), the part switches into shutdown mode. The LM2750
releases thermal shutdown when the junction temperature of the part is reduced to 130ºC (typ.).
Thermal shutdown is most-often triggered by self-heating, which occurs when there is excessive power
dissipation in the device and/or insufficient thermal dissipation. LM2750 power dissipation increases with
increased output current and input voltage (see POWER EFFICIENCY AND POWER DISSIPATION section).
When self-heating brings on thermal shutdown, thermal cycling is the typical result. Thermal cycling is the
repeating process where the part self-heats, enters thermal shutdown (where internal power dissipation is
practically zero), cools, turns-on, and then heats up again to the thermal shutdown threshold. Thermal cycling is
recognized by a pulsing output voltage and can be stopped be reducing the internal power dissipation (reduce
input voltage and/or output current) or the ambient temperature. If thermal cycling occurs under desired operating
conditions, thermal dissipation performance must be improved to accommodate the power dissipation of the
LM2750. Fortunately, the WSON package has excellent thermal properties that, when soldered to a PCB
designed to aid thermal dissipation, allows the LM2750 to operate under very demanding power dissipation
conditions.
OUTPUT CURRENT LIMITING
The LM2750 contains current limit circuitry that protects the device in the event of excessive output current
and/or output shorts to ground. Current is limited to 300mA (typ.) when the output is shorted directly to ground.
When the LM2750 is current limiting, power dissipation in the device is likely to be quite high. In this event,
thermal cycling should be expected (see THERMAL SHUTDOWN section).
PROGRAMMING THE OUTPUT VOLTAGE OF THE LM2750-ADJ
As shown in the application circuit of Figure 14, the output voltage of the LM2750-ADJ can be programmed with
a simple resistor divider (see resistors R1 and R2). The values of the feedback resistors set the output voltage,
as determined by the following equation:
VOUT = 1.23V × (1 + R1/ R2)
In the equation above, the "1.23V" term is the nominal voltage of the feedback pin when the feedback loop is
correctly established and the part is operating normally. The sum of the resistance of the two feedback resistors
should be between 15kΩ and 20kΩ:
15kΩ < (R1 + R2) < 20kΩ
If larger feedback resistors are desired, a 10pF capacitor should be placed in parallel with resistor R1.
VIN
2.7V to 5.6V*
8, 9
VOUT
VIN
CIN
2.2 PF
For VOUT < 4.9V:
max VIN= VOUT + 0.7V
1, 2
VOUT = 1.23V × (1 + R1/R2)
VOUT Range: 3.8V to 5.2V
IOUT up to 120mA
COUT
2.2 PF
LM2750-ADJ
R1
10
CFLY
1 PF
3
CAP+
FB
4
CAP7
R2
SD
GND
5, 6, DAP
Capacitors: 1.0PF - TDK C1608X5R1A105K
2.2PF - TDK C2012X7R1A225K
Figure 14. LM2750-ADJ Typical Application Circuit
10
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APPLICATION INFORMATION
OUTPUT VOLTAGE RIPPLE
The amount of voltage ripple on the output of the LM2750 is highly dependent on the application conditions:
output current and the output capacitor, specifically. A simple approximation of output ripple is determined by
calculating the amount of voltage droop that occurs when the output of the LM2750 is not being driven. This
occurs during the charge phase (φ1). During this time, the load is driven solely by the charge on the output
capacitor. The magnitude of the ripple thus follows the basic discharge equation for a capacitor (I = C × dV/dt),
where discharge time is one-half the switching period, or 0.5/FSW. Put simply,
I
0 .5
RIPPLE Peak - Peak = OUT u
C OUT FSW
A more thorough and accurate examination of factors that affect ripple requires including effects of phase nonoverlap times and output capacitor equivalent series resistance (ESR). In order for the LM2750 to operate
properly, the two phases of operation must never coincide. (If this were to happen all switches would be closed
simultaneously, shorting input, output, and ground). Thus, non-overlap time is built into the clocks that control the
phases. Since the output is not being driven during the non-overlap time, this time should be accounted for in
calculating ripple. Actual output capacitor discharge time is approximately 60% of a switching period, or 0.6/FSW.
The ESR of the output capacitor also contributes to the output voltage ripple, as there is effectively an AC
voltage drop across the ESR due to current switching in and out of the capacitor. The following equation is a
more complete calculation of output ripple than presented previously, taking into account phase non-overlap time
and capacitor ESR.
RIPPLE Peak Peak
§ IOUT
0 .6
¨
u
¨C
F
SW
© OUT
·
¸
¸
¹
2 u IOUT u ESR COU
T
A low-ESR ceramic capacitor is recommended on the output to keep output voltage ripple low. Placing multiple
capacitors in parallel can reduce ripple significantly, both by increasing capacitance and reducing ESR. When
capacitors are in parallel, ESR is in parallel as well. The effective net ESR is determined according to the
properties of parallel resistance. Two identical capacitors in parallel have twice the capacitance and half the ESR
as compared to a single capacitor of the same make. On a similar note, if a large-value, high-ESR capacitor
(tantalum, for example) is to be used as the primary output capacitor, the net output ESR can be significantly
reduced by placing a low-ESR ceramic capacitor in parallel with this primary output capacitor.
CAPACITORS
The LM2750 requires 3 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors
are recommended. These capacitors are small, inexpensive and have very low equivalent series resistance
(≤10mΩ typ.). Tantalum capacitors, OS-CON capacitors, and aluminum electrolytic capacitors generally are not
recommended for use with the LM2750 due to their high ESR, as compared to ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with
the LM2750. These capacitors have tight capacitance tolerance (as good as ±10%), hold their value over
temperature (X7R: ±15% over -55ºC to 125ºC; X5R: ±15% over -55ºC to 85ºC), and typically have little voltage
coefficient. Capacitors with Y5V and/or Z5U temperature characteristic are generally not recommended. These
types of capacitors typically have wide capacitance tolerance (+80%, -20%), vary significantly over temperature
(Y5V: +22%, -82% over -30ºC to +85ºC range; Z5U: +22%, -56% over +10ºC to +85ºC range), and have poor
voltage coefficients. Under some conditions, a nominal 1µF Y5V or Z5U capacitor could have a capacitance of
only 0.1µF. Such detrimental deviation is likely to cause these Y5V and Z5U of capacitors to fail to meet the
minimum capacitance requirements of the LM2750.
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The table below lists some leading ceramic capacitor manufacturers.
Manufacturer
Contact Information
TDK
www.component.tdk.com
AVX
www.avx.com
Murata
www.murata.com
Taiyo-Yuden
www.t-yuden.com
Vishay-Vitramon
www.vishay.com
INPUT CAPACITOR
The input capacitor (CIN) is used as a reservoir of charge, helping to quickly transfer charge to the flying
capacitor during the charge phase (φ1) of operation. The input capacitor helps to keep the input voltage from
drooping at the start of the charge phase, when the flying capacitor is first connected to the input, and helps to
filter noise on the input pin that could adversely affect sensitive internal analog circuitry biased off the input line.
As mentioned above, an X7R/X5R ceramic capacitor is recommended for use. For applications where the
maximum load current required is between 60mA and 120mA, a minimum input capacitance of 2.0µF is required.
For applications where the maximum load current is 60mA or less, 1.0µF of input capacitance is sufficient.
Failure to provide enough capacitance on the LM2750 input can result in poor part performance, often consisting
of output voltage droop, excessive output voltage ripple and/or excessive input voltage ripple.
A minimum voltage rating of 10V is recommended for the input capacitor. This is to account for DC bias
properties of ceramic capacitors. Capacitance of ceramic capacitors reduces with increased DC bias. This
degradation can be quite significant (>50%) when the DC bias approaches the voltage rating of the capacitor.
FLYING CAPACITOR
The flying capacitor (CFLY) transfers charge from the input to the output, providing the voltage boost of the
doubler. A polarized capacitor (tantalum, aluminum electrolytic, etc.) must not be used here, as the capacitor will
be reverse-biased upon start-up of the LM2750. The size of the flying capacitor and its ESR affect output current
capability when the input voltage of the LM2750 is low, most notable for input voltages below 3.0V. These issues
were discussed previously in the OUTPUT CURRENT CAPABILITY section. For most applications, a 1µF
X7R/X5R ceramic capacitor is recommended for the flying capacitor.
OUTPUT CAPACITOR
The output capacitor of the LM2750 plays an important part in determining the characteristics of the output signal
of the LM2750, many of which have already been discussed. The ESR of the output capacitor affects charge
pump output resistance, which plays a role in determining output current capability. Both output capacitance and
ESR affect output voltage ripple. For these reasons, a low-ESR X7R/X5R ceramic capacitor is the capacitor of
choice for the LM2750 output.
In addition to these issues previously discussed, the output capacitor of the LM2750 also affects control-loop
stability of the part. Instability typically results in the switching frequency effectively reducing by a factor of two,
giving excessive output voltage droop and/or increased voltage ripple on the output and the input. With output
currents of 60mA or less, a minimum capacitance of 1.0µF is required at the output to ensure stability. For output
currents between 60mA and 120mA, a minimum output capacitance of 2.0µF is required.
A minimum voltage rating of 10V is recommended for the output capacitor. This is to account for DC bias
properties of ceramic capacitors. Capacitance of ceramic capacitors reduces with increased DC bias. This
degradation can be quite significant (>50%) when the DC bias approaches the voltage rating of the capacitor.
POWER EFFICIENCY AND POWER DISSIPATION
Efficiency of the LM2750 mirrors that of an unregulated switched capacitor converter followed by a linear
regulator. The simplified power model of the LM2750, in Figure 15, will be used to discuss power efficiency and
power dissipation. In calculating power efficiency, output power (POUT) is easily determined as the product of the
output current and the 5.0V output voltage. Like output current, input voltage is an application-dependent
variable. The input current can be calculated using the principles of linear regulation and switched capacitor
12
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conversion. In an ideal linear regulator, the current into the circuit is equal to the current out of the circuit. The
principles of power conservation mandate the ideal input current of a voltage doubler must be twice the output
current. Adding a correction factor for operating quiescent current (IQ, 5mA typ.) gives an approximation for total
input current which, when combined with the other input and output parameter(s), yields the following equation
for efficiency:
E
POUT
PIN
VOUT u IOUT
VIN u (2 ˜ IOUT IQ )
Comparisons of LM2750 efficiency measurements to calculations using the above equation have shown the
equation to be a quite accurate approximation of actual efficiency. Because efficiency is inversely proportional to
input voltage, it is highest when the input voltage is low. In fact, for an input voltage of 2.9V, efficiency of the
LM2750 is greater than 80% (IOUT ≥ 40mA) and peak efficiency is 85% (IOUT = 120mA). The average efficiency
for an input voltage range spanning the Li-Ion range (2.9V-to-4.2V) is 70% (IOUT = 120mA). At higher input
voltages, efficiency drops dramatically. In Li-Ion-powered applications, this is typically not a major concern, as
the circuit will be powered off a charger in these circumstances. Low efficiency equates to high power dissipation,
however, which could become an issue worthy of attention.
LM2750 power dissipation (PD) is calculated simply by subtracting output power from input power:
PD = PIN - POUT = [VIN × (2·IOUT + IQ)] - [VOUT × IOUT]
Power dissipation increases with increased input voltage and output current, up to 772mW at the ends of the
operating ratings (VIN = 5.6V, IOUT = 120mA). Internal power dissipation self-heats the device. Dissipating this
amount power/heat so the LM2750 does not overheat is a demanding thermal requirement for a small surfacemount package. When soldered to a PCB with layout conducive to power dissipation, the excellent thermal
properties of the WSON package enable this power to be dissipated from the LM2750 with little or no derating,
even when the circuit is placed in elevated ambient temperatures.
LM2750
VIN
IIN = (2 × IOUT) + IQ
SwitchedCapacitor
Doubler
V ' # 2 × VIN
I ' = IOUT
Ideal Linear
Regulator
(IQ = 0)
VOUT = 5.0V
IOUT
IQ
Power Model
Figure 15. LM2750 Model for Power Efficiency and Power Dissipation Calculations
LAYOUT RECOMMENDATIONS
A good board layout of the LM2750 circuit is required to achieve optimal assembly, electrical, and thermal
dissipation performance. Figure 16 is an example of a board layout implementing recommended techniques. For
more information related to layout for the WSON/SON package, see TI's AN-1187 Application Report
(SNOA401). Below are some general guidelines for board layout:
• Place capacitors as close to the as possible to the LM2750, and on the same side of the board. VIN and VOUT
connections are most critical: run short traces from the LM2750 pads directly to these capacitor pads.
• Connect the ground pins of the LM2750 and the capacitors to a good ground plane. The ground plane is
essential for both electrical and thermal disspation performance.
• For optimal thermal performance, make the ground plane(s) as large as possible. Connect the die-attach pad
(DAP) of the LM2750 to the ground plane(s) with wide traces and/or multiple vias. Top-layer ground planes
are most effective in increasing the thermal dissipation capability of the WSON package. Large internal
ground planes are also very effective in keeping the die temperature of the LM2750 within operating ratings.
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Figure 16. LM2750-5.0 Recommended Layout
LM2750 LED DRIVE APPLICATION
IOUT up to 120mA, (VIN t 2.9V)
IOUT up to 40mA, (VIN t 2.7V)
VOUT = 5.0V ± 4%
VIN
2.7V to 5.6V
8, 9
VOUT
VIN
CIN
2.2 PF
1, 2
CAP+
SD
LED6
R1
...
R6
10
CFLY
1 PF
CAP7
GND
Capacitors:
1.0PF - TDK C1608X5R1A105K
2.2PF - TDK C2012X7R1A225K
...
COUT
2.2 PF
LM2750-5.0
4
LED1
ILEDx = (5.0V - VLEDx) ÷ Rx
3, 5, 6, DAP
Figure 17. LM2750-5.0 LED Drive Application Circuit
VIN
2.7V to 5.6V*
VOUT = 1.23V + VLED1
VOUT Range: 3.8V to 5.2V
8, 9
VOUT
VIN
CIN
2.2 PF
For VOUT < 4.9V:
max VIN= VOUT + 0.7V
1, 2
CFLY
1 PF
...
LED6
...
R6
COUT
2.2 PF
LM2750-ADJ
10
LED1
IOUT up to 120mA
3
CAP+
FB
4
CAP7
SD
GND
5, 6, DAP
Capacitors: 1.0PF - TDK C1608X5R1A105K
2.2PF - TDK C2012X7R1A225K
R1
ILED1 = 1.23V ÷ R1
ILEDx = (1.23V + VLED1 - VLEDx) ÷ Rx
Figure 18. LM2750-ADJ LED Drive Application Circuit
The LM2750 is an excellent part for driving white and blue LEDs for display backlighting and other generalpurpose lighting functions. The circuits of Figure 17 and Figure 18 show LED driver circuits for the LM2750-5.0
and the LM2750-ADJ, respectively. Simply placing a resistor (R) in series with each LED sets the current through
the LEDs:
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ILED = (VOUT - VLED) / R
In the equation above, ILED is the current that flows through a particular LED, and VLED is the forward voltage of
the LED at the given current. As can be seen in the equation above, LED current will vary with changes in LED
forward voltage (VLED). Mismatch of LED currents will result in brightness mismatch from one LED to the next.
The feedback pin of the LM2750-ADJ can be utilized to help better control brightness levels and negate the
effects of LED forward voltage variation. As shown in Figure 18, connecting the feedback pin to the primary LEDresistor junction (LED1-R1) regulates the current through that LED. The voltage across the primary resistor (R1)
is the feedback pin voltage (1.23V typ.), and the current through the LED is the current through that resistor.
Current through all other LEDs (LEDx) will not be regulated, however, and will vary with LED forward voltage
variations. When using the LM2750-ADJ in current-mode, LED currents can be calculated with the equations
below:
ILED1 = 1.23V / R1
ILEDx = (1.23V + VLED1 - VLEDx) / Rx
The current-mode configuration does not improve brightness matching from one LED to another in a single
circuit, but will keep currents similar from one circuit to the next. For example: if there is forward voltage
mismatch from LED1 to LED2 on a single board, the current-mode LM2750-ADJ solution provides no benefit. But
if the forward voltage of LED1 on one board is different than the forward voltage of LED1 on another board, the
currents through LED1 in both phones will match. THis helps keep LED currents fairly consistent from one
product to the next, adn helps to offset lot-to-lot variation of LED forward voltage characteristics.
PWM BRIGHTNESS/DIMMING CONTROL
Brightness of the LEDs can be adjusted in an application by driving the SD pin of the LM2750 with a PWM
signal. When the PWM signal is high, the LM2750 is ON, and current flows through the LEDs, as described in
the previous section. A low PWM signal turns the part and the LEDs OFF. The perceived brightness of the LEDs
is proportional to ON current of the LEDs and the duty cycle (D) of the PWM signal (the percentage of time the
LEDs are ON).
To achieve good brightness/dimming control with this circuit, proper selection of the PWM frequency is required.
The PWM frequency (FPWM) should be set higher than 100Hz to avoid visible flickering of the LED light. An upper
bound on this frequency is also needed to accommodate the turn-on time of the LM2750 (TON = 0.5ms typ.). This
maximum recommended PWM frequency is similarly dependent on the minimum duty cycle (DMIN) of the
application. The following equation puts bounds on the reommended PWM frequency range:
100Hz < FPWM < DMIN ÷ TON
Choosing a PWM frequency within these limits will result in fairly linear control of the time-averaged LED current
over the full duty-cycle adjustment range. For most applications, a PWM frequency between 100Hz and 500Hz is
recommended. A PWM frequency up to 1kHz may be acceptable in some designs.
LED DRIVER POWER EFFICIENCY
Efficiency of an LED driver (ELED) is typically defined as the power consumed by the LEDs (PLED) divided by the
power consumed at the input of the circuit. Input power consumption of the LM2750 was explained and defined
in the previous section titled: POWER EFFICIENCY AND POWER DISSIPATION. Assuming LED forward
voltages and currents match reasonably well, LED power consumption is the product of the number of LEDs in
the circuit (N), the LED forward voltage (VLED), and the LED forward current (ILED):
PLED = N × VLED × ILED
ELED = PLED / PIN = (N×VLED×ILED) / {VIN × [(2×IOUT) + 5mA]}
Figure 19 is an efficiency curve for a typical LM2750 LED-drive application.
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Figure 19. LM2750 LED Drive Efficiency. 6 LEDs, ILED = 20mA each, VLED = 4.0V
LED DRIVER POWER CONSUMPTION
For battery-powered LED-drive applications, it is strongly recommended that power consumption, rather than
power efficiency, be used as the metric of choice when evaluating power conversion performance. Power
consumed (PIN) is simply the product of input voltage (VIN) and input current (IIN):
PIN = VIN × IIN
LM2750 input current is equal to twice the output current (IOUT), plus the supply current of the part (nominally
5mA):
IIN = (2×IOUT) + 5mA
Output voltage and LED voltage do not impact the amount of current consumed by the LM2750 circuit. Thus,
neither factor affects the current draw on a battery. Since output voltage does not impact input current, there is
no power savings with either the LM2750-5.0 or the LM2750-ADJ: both options consume the same amount of
power.
In the previous section, LED Driver Efficiency was defined as:
ELED = PLED/PIN = (N×VLED×ILED) / {VIN × [(2×IOUT) + 5mA]}
The equation above can be simplified by recognizing the following:
2 × IOUT >> 5mA (high output current applications)
N × ILED = IOUT
Simplification yields:
ELED = VLED / VIN
This is in direct contrast to the previous assertion that showed that power consumption was completely
independent of LED voltage. As is the case here with the LM2750, efficiency is often not a good measure of
power conversion effectiveness of LED driver topologies. This is why it is strongly recommended that power
consumption be studied or measured when comparing the power conversion effectiveness of LED drivers.
One final note: efficiency of an LED drive solution should not be confused with an efficiency calculation for a
standard power converter (EP).
EP = POUT / PIN = (VOUT× IOUT) / (VIN × IIN)
The equation above neglects power losses in the external resistors that set LED currents and is a very poor
metric of LED-drive power conversion performance.
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SNVS180L – APRIL 2002 – REVISED MAY 2013
REVISION HISTORY
Changes from Revision K (May 2013) to Revision L
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
www.ti.com
23-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
LM2750LD-5.0
ACTIVE
WSON
NGY
10
LM2750LD-5.0/NOPB
ACTIVE
WSON
NGY
10
LM2750LD-ADJ
ACTIVE
WSON
NGY
10
LM2750LD-ADJ/NOPB
ACTIVE
WSON
NGY
10
LM2750LDX-5.0
ACTIVE
WSON
NGY
10
LM2750LDX-5.0/NOPB
ACTIVE
WSON
NGY
10
LM2750LDX-ADJ
ACTIVE
WSON
NGY
10
LM2750LDX-ADJ/NOPB
ACTIVE
WSON
NGY
10
LM2750SD-5.0
ACTIVE
WSON
DSC
10
LM2750SD-5.0/NOPB
ACTIVE
WSON
DSC
10
LM2750SD-ADJ
ACTIVE
WSON
DSC
10
LM2750SD-ADJ/NOPB
ACTIVE
WSON
DSC
10
LM2750SDX-5.0
ACTIVE
WSON
DSC
10
LM2750SDX-5.0/NOPB
ACTIVE
WSON
DSC
10
LM2750SDX-ADJ
ACTIVE
WSON
DSC
10
LM2750SDX-ADJ/NOPB
ACTIVE
WSON
DSC
10
1000
1000
4500
4500
1000
1000
4500
4500
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
TBD
Call TI
Call TI
-40 to 85
S002B
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
S002B
TBD
Call TI
Call TI
-40 to 85
S003B
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
S003B
TBD
Call TI
Call TI
-40 to 85
S002B
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
S002B
TBD
Call TI
Call TI
-40 to 85
S003B
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
S003B
TBD
Call TI
Call TI
-40 to 85
S005B
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
S005B
TBD
Call TI
Call TI
-40 to 85
S004B
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
S004B
TBD
Call TI
Call TI
S005B
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
S005B
TBD
Call TI
Call TI
-40 to 85
S004B
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
S004B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
23-Sep-2013
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM2750LD-5.0/NOPB
WSON
NGY
10
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2750LD-ADJ/NOPB
WSON
NGY
10
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2750LDX-5.0/NOPB
WSON
NGY
10
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2750LDX-ADJ/NOPB
WSON
NGY
10
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2750SD-5.0/NOPB
WSON
DSC
10
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2750SD-ADJ/NOPB
WSON
DSC
10
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2750SDX-5.0/NOPB
WSON
DSC
10
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2750SDX-ADJ/NOPB
WSON
DSC
10
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2750LD-5.0/NOPB
WSON
NGY
10
1000
203.0
190.0
41.0
LM2750LD-ADJ/NOPB
WSON
NGY
10
1000
203.0
190.0
41.0
LM2750LDX-5.0/NOPB
WSON
NGY
10
4500
367.0
367.0
35.0
LM2750LDX-ADJ/NOPB
WSON
NGY
10
4500
367.0
367.0
35.0
LM2750SD-5.0/NOPB
WSON
DSC
10
1000
210.0
185.0
35.0
LM2750SD-ADJ/NOPB
WSON
DSC
10
1000
210.0
185.0
35.0
LM2750SDX-5.0/NOPB
WSON
DSC
10
4500
367.0
367.0
35.0
LM2750SDX-ADJ/NOPB
WSON
DSC
10
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
DSC0010A
SDA10A (Rev A)
www.ti.com
MECHANICAL DATA
NGY0010A
LDA10A (Rev B)
www.ti.com
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