LM2773
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SNVS554A – JANUARY 2008 – REVISED MAY 2013
LM2773 Low-Ripple 1.8V/1.6V Spread-Spectrum Switched Capacitor Step-Down Regulator
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FEATURES
DESCRIPTION
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The LM2773 is a switched capacitor step-down
regulator that produces a selectable 1.8V or 1.6V
output. It is capable of supplying loads up to 300mA.
The LM2773 operates with an input voltage from 2.5V
to 5.5V, accommodating 1-cell Li-Ion batteries and
chargers.
1
2
Low-Noise Spread Spectrum Operation
1.8V/1.6V Selectable Output Voltage
2% Output Voltage Regulation
> 75% Efficiency in 1.8V Mode
Very Low Output Ripple: 10mV @ 300mA
Output Currents up to 300mA
2.5V to 5.5V Input Voltage Range
Shutdown Disconnects Load from VIN
1.15MHz Switching Frequency
No Inductors…Small Solution Size
Short Circuit and Thermal Protection
0.5mm pitch, DSBGA-9 (1.511 × 1.511mm ×
0.6mm)
The LM2773 utilizes a regulated charge pump with
gains of 2/3x and 1x. It has very low ripple and noise
on both the input and output due to its pre-regulated
1.15MHz (typ.) switching frequency and spread
spectrum operation. When output currents are low,
the LM2773 automatically switches to a low-ripple
PFM regulation mode to maintain high efficiency over
the entire load range.
The LM2773 is available in TI's 0.5mm pitch 9-bump
DSBGA.
APPLICATIONS
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Power Supply for DSP's, Memory, and
Microprocessors
Mobile Phones and Pagers
Digital Cameras, Portable Music Players, and
Other Portable Electronic Devices
Typical Application Circuit
VIN = 2.5V to
5.5V
CIN
1 PF
VIN
GND
C2+
VOUT
VOUT: 1.8V or 1.6V
IOUT up to 300 mA
COUT
4.7 PF
LM2773
C1+
C1
1 PF
C2
1 PF
C2-
C1-
EN
SEL
Capacitors: 1 PF - C1005 (0402), X5R, 6.3V
4.7 PF - C1608 (0603), X5R, 6.3V
or equivalent
Figure 1.
Figure 2. LM2773 Efficiency vs.
Low-Dropout Linear Regulator (LDO) Efficiency
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM2773
SNVS554A – JANUARY 2008 – REVISED MAY 2013
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Connection Diagram
A1
A2
A3
A3
A2
A1
B1
B2
B3
B3
B2
B1
C1
C2
C3
C3
C2
C1
Top View
Bottom View
9-Bump DSBGA
See Package Number YZR0009
0.5mm Pitch 1.511mm x 1.511mm x 0.6mm
PIN DESCRIPTIONS
Pin #
Name
A1
C2-
Description
A2
VOUT
Output Voltage
A3
C1+
Flying Capacitor 1: Positive Terminal
B1
GND
Ground
B2
EN
Device Enable. Logic HIGH: Enabled, Logic LOW: Shutdown.
Flying Capacitor 2: Negative Terminal
B3
VIN
Input Voltage. Recommended VIN Operating Range = 2.5V to 5.5V.
C1
SEL
Voltage Mode Select. Logic HIGH: VOUT = 1.6V, Logic LOW: VOUT = 1.8V
C2
C1-
Flying Capacitor 1: Negative Terminal
C3
C2+
Flying Capacitor 2: Positive Terminal
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum Ratings (1) (2) (3)
VIN Pin Voltage
-0.3V to 6.0V
EN, SEL Pin Voltage
-0.3V to (VIN+0.3V) w/ 6.0V max
Continuous Power Dissipation (4)
Internally Limited
Junction Temperature (TJ-MAX)
150°C
Storage Temperature Range
-65°C to +150° C
Maximum Lead Temperature
(Soldering, 10 sec.)
265°C
ESD Rating (5)
Human Body Model:
(1)
(2)
(3)
(4)
(5)
2.5kV
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply specified performance limits. For specified performance limits
and associated test conditions, see the Electrical Characteristics tables.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
All voltages are with respect to the potential at the GND pins.
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150°C (typ.) and
disengages at TJ=140°C (typ.).
The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. MIL-STD-883 3015.7
Operating Ratings (1) (2)
Input Voltage Range
2.5V to 5.5V
Recommended Load Current Range
0mA to 300mA
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
(1)
(2)
(3)
-30°C to +110°C
(3)
-30°C to +85°C
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For specified performance limits
and associated test conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pins.
Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 110°C), the
maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Thermal Properties
Junction-to-Ambient Thermal
Resistance (θJA), DSBGA-9 Package (1)
(1)
75°C/W
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues.
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Electrical Characteristics (1) (2)
Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full operating junction temperature range
(-30°C ≤ TJ ≤ +110°C) . Unless otherwise noted, specifications apply to the LM2773 Typical Application Circuit (pg. 1) with:
VIN = 3.6V; V(EN) = 1.8V, V(SEL) = 0V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF. (3)
Symbol
Typ
Max
1.8V Mode Output Voltage
Regulation
2.5V ≤ VIN ≤ 5.5V
0mA ≤ IOUT ≤ 300mA
1.779
(−2%)
1.815
1.851
(+2%)
1.6V Mode Output Voltage
Regulation
V(SEL) = 1.8V
2.5V ≤ VIN ≤ 5.5V
0mA ≤ IOUT ≤ 300mA
1.587
(−2%)
1.619
1.651
(+2%)
VOUT/IOUT
Output Load Regulation
0mA ≤ IOUT ≤ 300mA
VOUT/VIN
Output Line Regulation
E
Power Efficiency
IOUT = 300mA
IQ
Quiescent Supply Current
IOUT = 0mA
See (4)
48
VR
Fixed Frequency Output Ripple
IOUT = 300mA
10
VR–PFM
PFM–Mode Output Ripple
IOUT < 40mA
12
ISD
Shutdown Current
V(EN) = 0V
0.1
0.625
µA
FSW
Switching Frequency
3.0V ≤ VIN ≤ 5.5V
1.15
1.50
MHz
ROL
Open-Loop Output Resistance
IOUT = 300mA
See (5)
ICL
Output Current Limit
tON
Turn-on Time
VIL
Logic-low Input Voltage
EN, SEL Pins
2.5V ≤ VIN ≤ 5.5V
0
0.5
V
VIH
Logic-high Input Voltage
EN, SEL Pins
2.5V ≤ VIN ≤ 5.5V
1.0
VIN
V
IIH
Logic-high Input Current
V(EN), V(SEL) = 1.8V
See (7)
IIL
Logic-low Input Current
V(EN), V(SEL) = 0V
VOUT
(1)
(2)
(3)
(4)
(5)
(6)
(7)
4
Parameter
Condition
Min
0.80
VIN = 5.5V
0V ≤ VOUT ≤ 0.2V
See (6)
Units
V
0.15
mV/mA
0.3
%/V
75
%
55
µA
mV
mV
1.0
Ω
500
mA
150
µs
5
µA
0.01
µA
All voltages are with respect to the potential at the GND pins.
Min and Max limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most
likely norm.
CIN, COUT, C1, C2: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
VOUT is set to 1.9V during this test (Device is not switching).
Open loop output resistance can be used to predict output voltage when, under low VIN and high IOUT conditions, VOUT falls out of
regulation. VOUT = (Gain)VIN - (ROL x IOUT)
Under the stated conditions, the maximum input current is equal to 2/3 the maximum output current.
There are 350kΩ pull-down resistors connected internally between the EN pin and GND and the SEL pin and GND.
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BLOCK DIAGRAM
LM2773
VIN
C1+
SWITCH
ARRAY
GAIN
CONTROL
SWITCH
CONTROL
G =1,
2
C1C2+
3
C2GND
Spread
Spectrum
1.25V
Ref.
PFM
Control
Current
sense
VOUT
1.15 MHz
OSC.
EN
Enable/
Shutdown
Control
EN
Soft-Start
Ramp
0.8V
Ref.
SEL
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Typical Performance Characteristics
Unless otherwise specified: VIN = 3.6V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF, V(EN) = 1.8V, V(SEL) = 0V, TA = 25°C.
Capacitors are low-ESR multi-layer ceramic capacitors (MLCC's).
6
Output Voltage
vs.
Input Voltage, 1.8V Mode
Output Voltage
vs.
Input Voltage, 1.6V Mode
Figure 3.
Figure 4.
Output Voltage
vs.
Output Current, 1.8V Mode
Output Voltage
vs.
Output Current, 1.6V Mode
Figure 5.
Figure 6.
Efficiency
vs.
Input Voltage, 1.8V Mode
Efficiency
vs.
Input Voltage, 1.6V Mode
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
Unless otherwise specified: VIN = 3.6V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF, V(EN) = 1.8V, V(SEL) = 0V, TA = 25°C.
Capacitors are low-ESR multi-layer ceramic capacitors (MLCC's).
Shutdown Supply Current
Operating Supply Current
Figure 9.
Figure 10.
Line Step 3.0V to 4.2V with Load = 300mA, 1.8V Mode
Line Step 3.0V to 4.2V with Load = 300mA, 1.6V Mode
CH1: VIN; Scale: 1V/Div, DC Coupled
CH2: VOUT; Scale: 20mV/Div, AC Coupled
Time scale: 10ms/Div
Figure 11.
Load Step 0mA to 300mA, VIN = 3.6V, 1.8V Mode
CH1: VIN; Scale: 1V/Div, DC Coupled
CH2: VOUT; Scale: 20mV/Div, AC Coupled
Time scale: 10ms/Div
Figure 12.
Load Step 300mA to 0mA, VIN = 3.6V, 1.8V Mode
CH2: VOUT; Scale: 100mV/Div
DC Coupled, Offset 1.834V
CH4: IOUT; Scale: 100mA/Div
Time scale: 4ms/Div
Figure 13.
CH2: VOUT; Scale: 100mV/Div
DC Coupled, Offset 1.834V
CH4: IOUT; Scale: 100mA/Div
Time scale: 4ms/Div
Figure 14.
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Typical Performance Characteristics (continued)
Unless otherwise specified: VIN = 3.6V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF, V(EN) = 1.8V, V(SEL) = 0V, TA = 25°C.
Capacitors are low-ESR multi-layer ceramic capacitors (MLCC's).
Load Step 0mA to 300mA, VIN = 3.6V, 1.6V Mode
Load Step 300mA to 0mA, VIN = 3.6V, 1.6V Mode
CH2: VOUT; Scale: 100mV/Div
DC Coupled, Offset 1.633V
CH4: IOUT; Scale: 100mA/Div
Time scale: 4ms/Div
Figure 15.
8
CH2: VOUT; Scale: 100mV/Div
DC Coupled, Offset 1.633V
CH4: IOUT; Scale: 100mA/Div
Time scale: 4ms/Div
Figure 16.
1.8V Mode Startup, Load = 300mA
1.6V Mode Startup, Load = 300mA, VSEL = VIN
CH1: VEN; Scale: 5V/Div, DC Coupled
CH2: VOUT; Scale: 500mV/Div, DC Coupled
Time scale: 10µs/Div
Figure 17.
CH1: VEN; Scale: 5V/Div, DC Coupled
CH2: VOUT; Scale: 500mV/Div, DC Coupled
Time scale: 10µs/Div
Figure 18.
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OPERATION DESCRIPTION
Overview
The LM2773 is a switched capacitor converter that produces a selectable 1.8V or 1.6V regulated output. The
core of the part is a highly efficient charge pump that utilizes fixed frequency pre-regulation, Pulse Frequency
Modulation, and spread spectrum to minimize conducted noise and power losses over wide input voltage and
output current ranges. A description of the principal operational characteristics of the LM2773 is detailed in the
Circuit Description, and Efficiency Performance sections. These sections refer to details in the Block Diagram.
Circuit Description
The core of the LM2773 is a two-phase charge pump controlled by an internally generated non-overlapping
clock. The charge pump operates by using external flying capacitors C1 and C2 to transfer charge from the input
to the output. The LM2773 will operate in a 1x Gain, with the input current being equal to the load current, when
the input voltage is at or below 3.5V (typ.) for 1.8V mode or 3.3V (typ.) for 1.6V mode. At input voltages above
3.5V (typ.) or 3.3V (typ.) for the respective voltage mode selected, the part utilizes a gain of 2/3x, resulting in an
input current equal to 2/3 times the load current.
The two phases of the switched capacitor switching cycle will be referred to as the "charge phase" and the
"discharge phase". During the charge phase, the flying capacitor is charged by the input supply. After half of the
switching cycle [ t = 1/(2×FSW) ], the LM2773 switches to the discharge phase. In this configuration, the charge
that was stored on the flying capacitors in the charge phase is transferred to the output.
The LM2773 uses fixed frequency pre-regulation to regulate the output voltage to 1.8V during moderate to high
load currents. The input and output connections of the flying capacitors are made with internal MOS switches.
Pre-regulation limits the gate drive of the MOS switch connected between the voltage input and the flying
capacitors. Controlling the on resistance of this switch limits the amount of charge transferred into and out of
each flying capacitor during the charge and discharge phases, and in turn helps to keep the output ripple very
low.
When output currents are low (