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LM3100
SNVS421H – JANUARY 2006 – REVISED OCTOBER 2017
LM3100 Synchronous 1MHz 1.5A Step-Down Voltage Regulator
1 Features
3 Description
•
•
•
•
The LM3100 Synchronously Rectified Buck Converter
features all functions needed to implement a highly
efficient, cost effective buck regulator capable of
supplying 1.5 A to loads with voltages as low as 0.8
V. Dual 40 V N-Channel synchronous MOSFET
switches allow for low external component thus
reducing complexity and minimizing board space. The
LM3100 is designed to work exceptionally well with
ceramic and other very low ESR output capacitors.
The Constant ON-Time (COT) regulation scheme
requires no loop compensation, results in fast load
transient
response,
and
simplifies
circuit
implementation. Through the use of a unique design
the regulator does not rely on output capacitor ESR
for stability, as do most other COT regulators. The
operating frequency remains nearly constant with line
and load variations due to the inverse relationship
between the input voltage and the on-time. The
operating frequency can be externally programmed
up to 1 MHz. Protection features include VCC undervoltage lockout, thermal shutdown and gate drive
under-voltage lockout. The part is available in a
thermally enhanced HTSSOP-20 package
1
•
•
•
•
•
•
•
•
•
•
Input Voltage Range 4.5 V to 36 V
1.5 A Output Current
0.8 V, ±1.5% Reference
Integrated 40 V, Dual N-Channel Buck
Synchronous Switches
Low Component Count and Small Solution Size
No Loop Compensation Required
Ultra-Fast Transient Response
Stable With Ceramic and Other Low ESR
Capacitors
Programmable Switching Frequency up to 1 MHz
Max. Duty Cycle Limited During Start-Up
Valley Current Limit
Precision Internal Reference for Adjustable Output
Voltage Down to 0.8 V
Thermal Shutdown
Thermally Enhanced HTSSOP-20 Package
2 Applications
•
•
•
•
•
•
•
•
5VDC, 12VDC, 24VDC, 12VAC, and 24VAC
Systems
Embedded Systems
Industrial Controls
Automotive Telematics and Body Electronics
Point of Load Regulators
Storage Systems
Broadband Infrastructure
Direct Conversion from 2/3/4 Cell Lithium
Batteries Systems
Device Information
PART NUMBER
LM3100
PACKAGE
HTSSOP (20)
BODY SIZE (NOM)
6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
L
CFB
VOUT
RFB1
CBST
VIN
CIN
CSS
LM3100
RON
N/C
SW
SW
VIN
VIN
BST
GND
SS
N/C
N/C
N/C
N/C
PGND
PGND
VCC
RON
EN
FB
N/C
TST
REN
COUT
RFB2
CVCC
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM3100
SNVS421H – JANUARY 2006 – REVISED OCTOBER 2017
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions ......................
Thermal Information .................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 10
8
Applications and Implementation ...................... 13
8.1 Applications Information.......................................... 13
8.2 Typical Application .................................................. 15
9
Layout ................................................................... 17
9.1 Layout Guidelines ................................................... 17
10 Device and Documentation Support ................. 18
10.1
10.2
10.3
10.4
10.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
11 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (December 2009) to Revision G
•
Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 16
Changes from Revision G (April 2013) to Revision H
Page
•
Added Application and Implementation section, Device Information table, Pin Configuration and Functions section,
ESD Ratings table, Thermal Information table, Feature Description section, Device Functional Modes, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section....................................... 1
•
Deleted Simple Switcher from Title ........................................................................................................................................ 1
2
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5 Pin Configuration and Functions
PWP Package
20-Pin HTSSOP
Top View
1
N/C
2
SW
3
SW
4
VIN
5
VIN
6
BST
7
GND
8
SS
9
N/C
10
N/C
LM3100
EP
20
19
18
17
16
15
14
13
12
11
N/C
N/C
PGND
PGND
VCC
RON
EN
FB
N/C
TST
Pin Functions
PIN
DESCRIPTION
NO.
NAME
1,9,10,12,19,20
N/C
No Connection
These pins must be left unconnected.
2, 3
SW
Switching Node
Internally connected to the buck switch source. Connect to output inductor.
4, 5
VIN
Input supply voltage
Supply pin to the device. Nominal input range is 4.5 V to 36 V.
6
BST
Connection for bootstrap capacitor
Connect a 0.033 µF capacitor from SW pin to this pin. An internal diode charges the capacitor during
the high-side switch off-time.
7
GND
Analog Ground
Ground for all internal circuitry other than the synchronous switches.
8
SS
Soft-start
An internal 8 µA current source charges an external capacitor to provide the soft- start function.
11
TST
Test mode enable pin
Force the device into test mode. Must be connected to ground for normal operation.
13
FB
Feedback
Internally connected to the regulation and over-voltage comparators. The regulation setting is 0.8 V at
this pin. Connect to feedback divider.
14
EN
Enable pin
Connect a voltage higher than 1.26 V to enable the regulator.
15
RON
On-time Control
An external resistor from VIN to this pin sets the high-side switch on-time.
16
VCC
Start-up regulator Output
Nominally regulated to 6 V. Connect a capacitor of not less than 680 nF between VCC and GND for
stable operation.
17, 18
PGND
DAP
EP
Power Ground
Synchronous rectifier MOSFET source connection. Tie to power ground plane.
Exposed Pad
Thermal connection pad, connect to GND.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
MAX
UNIT
VIN, RON to GND
–0.3
40
V
SW to GND
–0.3
40
V
–2
(< 100 ns)
V
VIN to SW
–0.3
40
V
BST to SW
–0.3
7
V
All Other Inputs to GND
–0.3
7
V
Junction Temperature, TJ
–65
150
°C
150
°C
SW to GND (Transient)
Storage temperature, Tstg
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
6.2 ESD Ratings
V(ESD)
(1)
(2)
Electrostatic discharge
VALUE
UNIT
±2
kV
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Supply Voltage Range VIN
4.5
36
UNIT
V
Junction Temperature Range TJ
–40
125
°C
6.4 Thermal Information
LM3100
THERMAL METRIC (1)
PWP (HTSSOP)
UNIT
20 PINS
RθJC
(1)
4
Junction-to-case thermal resistance
6.5
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at TJ = 25°C, and VIN = 18 V, VOUT = 3.3 V (unless otherwise noted). (1)
PARAMETER
TEST CONDITIONS
MIN
TYP
5.0
MAX
UNIT
START-UP REGULATOR, VCC
VCC
Output voltage
CCC = 680 nF, no load
TJ = –40°C to 125°C
6.0
7.2
ICC = 2 mA
TJ = –40°C to 125°C
50
140
ICC = 20 mA
TJ = –40°C to 125°C
350
570
V
VIN - VCC
Dropout voltage
mV
IVCCL
Current limit (1)
VCC = 0 V
TJ = –40°C to 125°C
40
65
VCC-UVLO
Under-voltage lockout
threshold
VIN increasing
TJ = –40°C to 125°C
3.6
3.75
VCC-UVLO-HYS
UVLO hysteresis
VIN decreasing
tVCC-UVLO-D
UVLO filter delay
IIN
Operating current
No switching, VFB = 1 V
TJ = –40°C to 125°C
0.7
1
mA
IIN-SD
Operating current,
Device shutdown
VEN = 0 V
TJ = –40°C to 125°C
17
30
µA
mA
3.85
130
V
mV
3
µs
SWITCHING CHARACTERISTICS
RDS-UP-ON
Main MOSFET
Rds(on)
TJ = –40°C to 125°C
0.18
0.35
Ω
RDS- DN-ON
Syn. MOSFET
Rds(on)
TJ = –40°C to 125°C
0.11
0.2
Ω
VG-UVLO
Gate drive voltage
UVLO
VBST - VSW increasing
TJ = –40°C to 125°C
3.3
4
V
SS pin source current
VSS = 0.5 V
TJ = –40°C to 125°C
8
9.8
µA
SOFT-START
ISS
6
CURRENT LIMIT
Syn. MOSFET current
limit threshold
ICL
1.9
A
ON/OFF TIMER
VIN = 10 V, RON = 100 kΩ
1.38
VIN = 30 V, RON = 100 kΩ
0.47
tON
ON timer pulse width
µs
tON-MIN
ON timer minimum
pulse width
200
ns
tOFF
OFF timer pulse width
260
ns
ENABLE INPUT
VEN
EN Pin input threshold VEN rising
VEN-HYS
Enable threshold
hysteresis
TJ = –40°C to 125°C
1.236
VEN falling
1.26
1.285
90
V
mV
REGULATION and OVER-VOLTAGE COMPARATOR
VFB
In-regulation feedback
VSS ≥ 0.8 V
voltage
TJ = –40°C to 125°C
0.784
VSS ≥ 0.8 V
TJ = –40°C to 125°C
0.788
VFB-OV
Feedback overvoltage threshold
TJ = –40°C to 125°C
0.894
IFB
0.8
0.816
V
0.812
0.920
0.940
V
5
100
nA
TJ = –40°C to 125°C
THERMAL SHUTDOWN
TSD
Thermal shutdown
temperature
TJ rising
165
°C
TSD-HYS
Thermal shutdown
temperature
hysteresis
TJ falling
20
°C
(1)
VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.
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6.6 Typical Characteristics
All curves taken at VIN = 18 V with configuration in typical application circuit for VOUT = 3.3 V shown in this datasheet. TA =
25°C, unless otherwise specified.
1000
7
-40oC
VIN = 36V
6
800
25oC
VIN = 7V
5
125 C
VEN = 2V ; VFB = 1V
Active mode, no switching
600
VCC (V)
IIN (PA)
o
VEN = 0V
Shut-down mode
400
125oC
200
3
2
-40oC
25oC
VIN = 18V
4
VCC Externally Loaded
CVCC = 680 nF
1
VFB = 1V, no switching
0
0
0
10
20
30
40
0
20
40
VIN (V)
60
80
ICC (mA)
Figure 1. Quiescent Current, IIN vs VIN
Figure 2. VCC vs ICC
7
4000
6.5
RON = 100 k:
RON = 100 k:
3000
RON = 50 k:
5.5
TON (ns)
VCC (V)
6
RON = 20 k:
RON = 25 k:
2000
RON = 10 k:
RON = 50 k:
5
1000
VCC not loaded externally
4.5
ILOAD = 700 mA
4
4.5
6
7.5
9
0
10.5
0
5
10
15
VIN (V)
Figure 3. VCC vs VIN
600
ILOAD = 1.5A
0.825
ILOAD = 1.5A
ILOAD = 0.5A
RON = 100 k:
L = 14 PH
200
40
RON = 50 k:
L = 4.7 PH
ILOAD = 0.4A
RON = 50 k:
L = 8.2 PH
400
35
VOUT = 3.3V
ILOAD = 0.5A
VIN = 36V
0.8
VIN = 4.5V
ILOAD = 1.5A
VIN = 18V
0.775
ILOAD = 0.5A
VOUT = 3.3A
0
0
10
20
30
40
VIN (V)
0.75
-50
-20
10
40
70
100
130
TEMPERATURE (ºC)
Figure 5. Switching Frequency, FSW vs VIN
6
30
0.85
RON = 25 k:
L = 3.8 PH
800
25
Figure 4. TON vs VIN
VFB (V)
SWITCHING FREQUENCY, FSW (kHz)
1000
20
VIN (V)
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Figure 6. VFB vs Temperature
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Typical Characteristics (continued)
All curves taken at VIN = 18 V with configuration in typical application circuit for VOUT = 3.3 V shown in this datasheet. TA =
25°C, unless otherwise specified.
100
0.4
VIN = 8V
90
EFFICIENCY (%)
0.3
RDS(ON) (:)
Main MOSFET
0.2
0.1
Syn. MOSFET
0
-50
80
VIN = 18V
VIN = 36V
70
60
50
40
-20
10
40
70
100
0
130
0.3
0.6
0.9
1.2
1.5
LOAD CURRENT (A)
TEMPERATURE (ºC)
VOUT = 3.3 V
Figure 7. RDS(ON) vs Temperature
Figure 8. Efficiency vs Load Current
3
100
2
90
VIN = 4.5V
'VOUT (%)
1
EFFICIENCY (%)
VIN = 8V
VIN = 18V
0
-1
VIN = 36V
-2
80
70
VIN = 12V
60
VIN = 24V
50
VOUT = 0.8V
RON = 30 k:
L = 6.8 PH
VOUT = 3.3V
-3
40
0
0.3
0.6
0.9
1.2
1.5
LOAD CURRENT (A)
0
0.3
0.6
0.9
1.2
1.5
LOAD CURRENT (A)
VOUT = 3.3 V
VOUT = 0.8 V
Figure 9. VOUT Regulation vs Load Current
Figure 10. Efficiency vs Load Current
3
2
'VOUT (%)
1
VIN = 12V
VIN = 24V
0
-1
VIN = 4.5V
VOUT = 0.8V
-2
RON = 30 k:
L = 6.8 PH
-3
0
0.3
0.6
0.9
1.2
1.5
VOUT = 3.3 V, 1.5 A Loaded
LOAD CURRENT (A)
VOUT = 0.8 V
Figure 11. VOUT Regulation vs Load Current
Figure 12. Power Up
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Typical Characteristics (continued)
All curves taken at VIN = 18 V with configuration in typical application circuit for VOUT = 3.3 V shown in this datasheet. TA =
25°C, unless otherwise specified.
VOUT = 3.3 V, 1.5 A Loaded
VOUT = 3.3 V, 1.5 A Loaded
Figure 13. Enable Transient
Figure 14. Shutdown Transient
VOUT = 3.3 V, 1.5 A Loaded
VOUT = 3.3 V, 0.15 A Loaded
Figure 15. Continuous Mode Operation
Figure 16. Discontinuous Mode Operation
VOUT = 3.3 V, 0.15 A - 1.5 A Load
VOUT = 3.3 V, 0.15 A - 1.5 A Load
Figure 17. CCM to DCM Transition
8
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Current slew-rate: 2.5 A/µs
Figure 18. Load Transient
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7 Detailed Description
7.1 Overview
The LM3100 Step Down Switching Regulator features all functions needed to implement a cost effective, efficient
buck power converter capable of supplying 1.5 A to a load. This voltage regulator contains Dual 40-V N-Channel
buck synchronous switches and is available in a thermally enhanced HTSSOP-20 package. The Constant ONTime (COT) regulation scheme requires no loop compensation, results in fast load transient response, and
simplifies circuit implementation. It will work correctly even with an all ceramic output capacitor network and does
not rely on the output capacitor’s ESR for stability. The operating frequency remains constant with line and load
variations due to the inverse relationship between the input voltage and the on-time. The valley current limit
detection circuit, internally set at 1.9 A, inhibits the high-side switch until the inductor current level subsides.
Please refer to the functional block diagram with a typical application circuit.
The LM3100 can be applied in numerous applications and can operate efficiently from inputs as high as 36 V.
Protection features include: Thermal shutdown, VCC under-voltage lockout, gate drive under-voltage lockout.
7.2 Functional Block Diagram
LM 3100
EN
11 EN
VIN
AVDD
6V LDO
4,5 VIN
1.26V
0.92V
0.8V
VREF
VDD
VCC 16
VCC
CIN
THERMAL
SHUTDOWN
UVLO
C VCC
1.26V
GND
R ON
ON TIMER
15 RON
START
COMPLETE
Ron
BST 6
260 ns
OFF TIMER
START
VIN
Gate Drive SD
UVLO
COMPLETE
CBST
VDD
8 PA
DrvH
8 SS
LOGIC
DrvL
CSS
REGULATION
COMPARATOR
0.8V
13 FB
PMOS
input
LEVEL
SHIFT
L
DRIVER
SW 2,3
Vout
VCC
DRIVER
1200
Zero Coil
Current
Detect
CFB *
1
PGND
R FB1
80
R ILIM
0.92V
7
OVER-VOLTAGE
COMPARATOR
CURRENT LIMIT
COMPARATOR
RFB2
200:
32 mV
0.26:
C OUT
PGND 17,18
*optional
7.3 Feature Description
7.3.1
Hysteretic Control Circuit Overview
The LM3100 buck DC-DC regulator employs a control scheme in which the high-side switch on-time varies
inversely with the line voltage (VIN). Control is based on a comparator and the one-shot on-timer, with the output
voltage feedback (FB) compared with an internal reference of 0.8 V. If the FB level is below the reference the
buck switch is turned on for a fixed time determined by the input voltage and a programming resistor (RON).
Following the on-time, the switch remains off for a minimum of 260 ns. If FB is below the reference at that time
the switch turns on again for another on-time period. The switching will continue until regulation is achieved.
The regulator will operate in discontinuous conduction mode at light load currents, and continuous conduction
mode with heavy load current. In discontinuous conduction mode (DCM), current through the output inductor
starts at zero and ramps up to a peak during the on-time, then ramps back to zero before the end of the off-time.
The next on-time period starts when the voltage at FB falls below the internal reference. Until then the inductor
current remains zero and the load is supplied entirely by the output capacitor. In this mode the operating
frequency is lower than in continuous conduction mode, and varies with load current. Conversion efficiency is
maintained since the switching losses are reduced with the reduction in load and switching frequency. The
discontinuous operating frequency can be calculated approximately as follows:
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Feature Description (continued)
FSW =
VOUT (VIN - 1) x L x 1.18 x 1020 x IOUT
(VIN ± VOUT) x RON2
(1)
In continuous conduction mode (CCM), current always flows through the inductor and never reaches zero during
the off-time. In this mode, the operating frequency remains relatively constant with load and line variations. The
CCM operating frequency can be calculated approximately as follows:
FSW =
VOUT
1.3 x 10-10 x RON
(2)
The output voltage is set by two external resistors (RFB1, RFB2). The regulated output voltage is calculated as
follows:
VOUT = 0.8 V x (RFB1 + RFB2)/RFB2
(3)
7.4 Device Functional Modes
7.4.1 Start-up Regulator (VCC)
The start-up regulator is integrated within LM3100. The input pin (VIN) can be connected directly to line voltage
up to 36 V, with transient capability of 40 V. The VCC output regulates at 6 V, and is current limited to 65 mA.
Upon power up, the regulator sources current into the external capacitor at VCC (CVCC). CVCC must be at least
680 nF for stability. When the voltage on the VCC pin reaches the under-voltage lockout threshold of 3.75 V, the
buck switch is enabled and the Soft-start pin is released to allow the soft-start capacitor (CSS) to charge.
The minimum input voltage is determined by the dropout voltage of VCC regulator, and the VCC UVLO falling
threshold (≊3.7 V). If VIN is less than ≊4.0 V, the VCC UVLO activates to shut off the output.
7.4.2 Regulation Comparator
The feedback voltage at FB pin is compared to the internal reference voltage of 0.8 V. In normal operation (the
output voltage is regulated), an on-time period is initiated when the voltage at FB falls below 0.8 V. The buck
switch stays on for the on-time, causing the FB voltage to rise above 0.8 V. After the on-time period, the buck
switch stays off until the FB voltage falls below 0.8 V again. Bias current at the FB pin is nominally 100 nA.
7.4.3 Over-Voltage Comparator
The voltage at FB pin is compared to an internal 0.92 V reference. If the feedback voltage rises above 0.92 V the
on-time pulse is immediately terminated. This condition can occur if the input voltage, or the output load, changes
suddenly. Once the OVP is activated, the buck switch remains off until the voltage at FB pin falls below 0.92 V.
The low side switch will stay on to discharge the inductor energy until the inductor current decays to zero. The
low side switch will be turned off.
7.4.4 ON-Time Timer, Shutdown
The ON-Time of LM3100 main switch is determined by the RON resistor and the input voltage (VIN), and is
calculated from:
tON =
1.3 x 10-10 x RON
VIN
(4)
The inverse relationship of tON and VIN results in a nearly constant switching frequency as VIN is varied. RON
should be selected for a minimum on-time (at maximum VIN) greater than 200 ns for proper current limit
operation. This requirement limits the maximum frequency for each application, depending on VIN and VOUT,
calculated from Equation 5:
FSW(MAX) =
VOUT
VIN(MAX) x 200 ns
(5)
The LM3100 can be remotely shut down by taking the EN pin below 1.1 V. Refer to Figure 19. In this mode the
SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the EN pin
allows normal operation to resume.
10
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Device Functional Modes (continued)
For normal operation, the voltage at the EN pin is set between 1.5 V and 3.0 V, depending on VIN and the
external pull-up resistor. For all cases, this voltage must be limited not to exceed 7 V.
VIN
VIN
LM3100
EN
STOP
RUN
Figure 19. Shutdown Implementation
7.4.5 Current Limit
Current limit detection occurs during the off-time by monitoring the re-circulating current through the low-side
synchronous switch. Referring to Functional Block Diagram, when the buck switch is turned off, inductor current
flows through the load, into PGND, and through the internal low-side synchronous switch. If that current exceeds
1.9 A the current limit comparator toggles, forcing a delay to the start of the next on-time period. The next cycle
starts when the re-circulating current falls back below 1.9 A and the voltage at FB is below 0.8 V. The inductor
current is monitored during the low-side switch on-time. As long as the overload condition persists and the
inductor current exceeds 1.9 A, the high-side switch will remain inhibited. The operating frequency is lower during
an over-current due to longer than normal off-times.
Figure 20 illustrates an inductor current waveform, the average inductor current is equal to the output current,
IOUT in steady state. When an overload occurs, the inductor current will increase until it exceeds the current limit
threshold, 1.9 A. Then the control keeps the high-side switch off until the inductor current ramps down below 1.9
A. Within each on-time period, the current ramps up an amount equal to:
'I =
(VIN - VOUT) x tON
L
(6)
During this time the LM3100 is in a constant current mode, with an average load current (IOCL) equal to 1.9 A
+ΔI/2.
IPK
'I
IOCL
Inductor Current
ICL
IOUT
Normal Operation
Load Current
Increases
Current Limited
Figure 20. Inductor Current - Current Limit Operation
7.4.6 N-Channel Buck Switch and Driver
The LM3100 integrates an N-Channel buck (high-side) switch and associated floating high voltage gate driver.
The gate drive circuit works in conjunction with an external bootstrap capacitor and an internal high voltage
diode. A 33 nF capacitor (CBST) connected between BST and SW pins provides voltage to the high-side driver
during the buck switch on-time. During each off-time, the SW pin falls to approximately –1 V and CBST charges
from the VCC supply through the internal diode. The minimum off-time of 260 ns ensures adequate time each
cycle to recharge the bootstrap capacitor.
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Device Functional Modes (continued)
7.4.7 Soft-Start
The soft-start feature allows the converter to gradually reach a steady state operating point, thereby reducing
start-up stresses and current surges. Upon turn-on, after VCC reaches the under-voltage threshold, an internal 8
µA current source charges up the external capacitor at the SS pin. The ramping voltage at SS (and the noninverting input of the regulation comparator) ramps up the output voltage in a controlled manner.
An internal switch grounds the SS pin if any of the following cases happen: (i) VCC falls below the under-voltage
lock-out threshold; (ii) a thermal shutdown occurs; or (iii) the EN pin is grounded. Alternatively, the converter can
be disabled by connecting the SS pin to ground using an external switch. Releasing the switch allows the SS pin
return to pull high and the output voltage returns to normal. The shut-down configuration is shown in Figure 21 .
VIN
VIN
LM3100
SS
STOP
+
RUN
Figure 21. Alternate Shutdown Implementation
7.4.8 Thermal Protection
The LM3100 should be operated so the junction temperature does not exceed the maximum limit. An internal
Thermal Shutdown circuit, which activates (typically) at 165°C, takes the controller to a low power reset state by
disabling the buck switch and the on-timer, and grounding the SS pin. This feature helps prevent catastrophic
failures from accidental device overheating. When the junction temperature falls back below 145°C (typical
hysteresis = 20°C), the SS pin is released and normal operation resumes.
12
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8 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Applications Information
8.1.1 External Components
The following guidelines can be used to select the external components.
8.1.1.1 RFB1 and RFB2
The ratio of these resistors is calculated from:
RFB1
RFB2
=
VOUT
0.8V
-1
(7)
RFB1 and RFB2 should be chosen from standard value resistors in the range of 1.0 kΩ - 10 kΩ which satisfy the
above ratio.
For VOUT = 0.8 V, the FB pin can be connected to the output directly. However, the converter operation needs a
minimum inductor current ripple to maintain good regulation when no load is connected. This minimum load is
about 10 µA and can be implemented by adding a pre-load resistor to the output.
8.1.1.2 RON
The minimum value for RON is calculated from:
RON t
200 ns x VIN(MAX)
1.3 x 10-10
(8)
Equation 2 in Hysteretic Control Circuit Overview section can be used to select RON if a specific frequency is
desired as long as the above limitation is met.
8.1.1.3 L
The main parameter affected by the inductor is the output current ripple amplitude (IOR). The maximum allowable
(IOR) must be determined at both the minimum and maximum nominal load currents. At minimum load current,
the lower peak must not reach 0 A. At maximum load current, the upper peak must not exceed the current limit
threshold (1.9 A). The allowable ripple current is calculated from the following equations:
IOR(MAX1) = 2 x IO(min)
(9)
or
IOR(MAX2) = 2 x (1.9 A - IO(max))
(10)
The lesser of the two ripple amplitudes calculated above is then used in the following equation:
L=
VOUT x (VIN - VOUT)
IOR x FS x VIN
(11)
where VIN is the maximum input voltage and Fs is determined from Equation 1. This provides a value for L. The
next larger standard value should be used. L should be rated for the IPK current level shown in Figure 20.
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Applications Information (continued)
25.0
RON = 100 k:
INDUCTANCE (PH)
20.0
15.0
RON = 50 k:
10.0
5.0
RON = 25 k:
0.0
0
10
20
30
40
VIN (V)
Figure 22. Inductor Selector for VOUT = 3.3 V
25
RON = 100 k:
INDUCTANCE (PH)
20
15
RON = 50 k:
10
RON = 25 k:
5
0
0
10
20
30
40
VIN (V)
Figure 23. Inductor Selector for VOUT = 0.8 V
8.1.1.4 CVCC
The capacitor on the VCC output provides not only noise filtering and stability, but also prevents false triggering of
the VCC UVLO at the buck switch on/off transitions. For this reason, CVCC should be no smaller than 680 nF for
stability, and should be a good quality, low ESR, ceramic capacitor.
8.1.1.5 CO and CO3
CO should generally be no smaller than 10 µF. Experimentation is usually necessary to determine the minimum
value for CO, as the nature of the load may require a larger value. A load which creates significant transients
requires a larger value for CO than a fixed load.
CO3 is a small value ceramic capacitor to further suppress high frequency noise at VOUT. A 47 nF is
recommended, located close to the LM3100.
8.1.1.6 CIN and CIN3
CIN’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple at VIN,
assume the voltage source feeding VIN has an output impedance greater than zero. If the source’s dynamic
impedance is high (effectively a current source), CIN supplies the average input current, but not the ripple current.
At maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower
peak of the inductor’s ripple current, ramps up to the peak value, then drop to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, CIN must supply this average load
current during the maximum on-time. CIN is calculated from:
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Applications Information (continued)
CIN =
IOUT x tON
'V
(12)
where IOUT is the load current, tON is the maximum on-time, and ΔV is the allowable ripple voltage at VIN.
CIN3’s purpose is to help avoid transients and ringing due to long lead inductance at VIN. A low ESR, 0.1 µF
ceramic chip capacitor is recommended, located close to the LM3100.
8.1.1.7 CBST
The recommended value for CBST is 33 nF. A high quality ceramic capacitor with low ESR is recommended as
CBST supplies a surge current to charge the buck switch gate at turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
8.1.1.8 CSS
The capacitor at the SS pin determines the soft-start time, i.e. the time for the reference voltage at the regulation
comparator, and the output voltage, to reach their final value. The time is determined from the following:
tSS =
CSS x 0.8V
8 PA
(13)
8.1.1.9 CFB
If output voltage is higher than 1.6 V, this feedback capacitor is needed for Discontinuous Conduction Mode to
improve the output ripple performance, the recommended value for CFB is 10 nF.
8.2 Typical Application
CFB CO3
10 nF 47 nF
L 15 mH
CBST
33 nF
VIN = 8V – 36V
CIN1, CIN2
2 x 10 mF
CIN3
0.1 mF
CSS
10 nF
N/C
SW
SW
VIN
VIN
BST
GND
SS
N/C
N/C
LM3100
RON
100k
REN
200k
N/C
N/C
PGND
PGND
VCC
RON
EN
FB
N/C
TST
VOUT = 3.3V
IOUT = 1.5A
RFB1
6.8k
RFB2
2.2k
CO1, CO2
2 x 22 mF
CVCC
680 nF
Figure 24. Typical Application Schematic for VOUT = 3.3 V
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Typical Application (continued)
CBST
33 nF
VIN = 4.5V – 24V
CIN1, CIN2
2 x 10 mF
CIN3
0.1 mF
CSS
10 nF
N/C
SW
SW
VIN
VIN
BST
GND
SS
N/C
N/C
LM3100
L 6.8 mH
N/C
N/C
PGND
PGND
VCC
RON
EN
FB
N/C
TST
RON
30k
REN
200k
CO3
47 nF
RFB2
40k
VOUT = 0.8V
I OUT = 1.5A
CO1, CO2
2 x 22 mF
CVCC
680 nF
Figure 25. Typical Application Schematic for VOUT = 0.8 V
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9 Layout
9.1 Layout Guidelines
9.1.1 PC Board Layout
The LM3100 regulation, over-voltage, and current limit comparators are very fast, and will respond to short
duration noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be
as neat and compact as possible, and all external components must be as close as possible to their associated
pins. Refer to the functional block diagram, the loop formed by CIN, the high and low-side switches internal to the
IC, and the PGND pin should be as small as possible. The PGND connection to Cin should be as short and
direct as possible. There should be several vias connecting the Cin ground terminal to the ground plane placed
as close to the capacitor as possible. The boost capacitor should be connected as close to the SW and BST pins
as possible. The feedback divider resistors and the CFB capacitor should be located close to the FB pin. A long
trace run from the top of the divider to the output is generally acceptable since this is a low impedance node.
Ground the bottom of the divider directly to the GND (pin 7). The output capacitor, COUT, should be connected
close to the load and tied directly into the ground plane. The inductor should connect close to the SW pin with as
short a trace as possible to help reduce the potential for EMI (electro-magnetic interference) generation.
If it is expected that the internal dissipation of the LM3100 will produce excessive junction temperatures during
normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The
exposed pad on the bottom of the IC package can be soldered to a ground plane and that plane should extend
out from beneath the IC to help dissipate the heat. The exposed pad is internally connected to the IC substrate.
Additionally the use of thick copper traces, where possible, can help conduct heat away from the IC. Using
numerous vias to connect the die attach pad to an internal ground plane is a good practice. Judicious positioning
of the PC board within the end product, along with the use of any available air flow (forced or natural convection)
can help reduce the junction temperature.
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10 Device and Documentation Support
10.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
10.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
10.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
10.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
10.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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PACKAGE OPTION ADDENDUM
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30-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM3100MH
NRND
HTSSOP
PWP
20
73
Non-RoHS
& Green
Call TI
Level-1-260C-UNLIM
-40 to 125
LM3100
MH
LM3100MH/NOPB
ACTIVE
HTSSOP
PWP
20
73
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
LM3100
MH
LM3100MHX/NOPB
ACTIVE
HTSSOP
PWP
20
2500
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
LM3100
MH
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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