User's Guide
SNVA415C – June 2010 – Revised May 2013
AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
1
Introduction
This wide range evaluation board showcases the LM3423 NFET controller used with a buck-boost current
regulator. It is designed to drive 4 to 8 LEDs at a maximum average LED current of 700mA from a DC
input voltage of 10 to 70V.
The evaluation board showcases most features of the LM3423 including PWM dimming, fault and LED
status flags, output overvoltage protection and input under-voltage lockout. Note that there are two
revisions of this PCB. The documentation for the latest revision (551600305-002 RevA) is shown first. The
schematic, layout and bill of materials for the first revision (551600305-001 Rev1) can be found at the end
of this document.
The buck-boost circuit can be easily redesigned for different specifications by changing only a few
components (see the Alternate Designs section found at the end of this application note). Note that design
modifications can change the system efficiency. See the LM3421/21Q1/21Q0 LM3423/23Q1/23Q0 N-Ch
Controllers for Constant Current LED Drivers (SNVS574) data sheet for a comprehensive explanation of
the device and application information.
100
EFFICIENCY (%)
95
Q1 is FDD3682
90
85
Q1 is IPD200N15N3
80
75
70
0
16
32
48
VIN (V)
64
80
Figure 1. Efficiency with 6 Series LEDS at 700mA
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1
Schematic for 551600305-002 REVA
2
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Schematic for 551600305-002 REVA
TP1
LED+
D1
L1
J4
VIN
J1
R3
C2, C3
1
VIN
LM3423
HSN
20
R7
19
R8
C1
J3
2
TP10
R10
C8
R2
GND
3
EN
HSP
COMP
RPD
18
RPD
LED-
J2
R1
J5
4
CSH
IS
17
DIM
Q2
C12
R9
VCC
5
RCT
VCC
16
C9
C7
6
GATE
AGND
VIN
R20
15
Q1
R17
7
R13
OVP
PGND
nDIM
DDRV
14
8
DIM
R5
VIN
RPD
9
FLT
DPOL
Q6
R18
Q4
13
D2
R19
R14
Q7
R6
VCC
R4
C4,
C6(a-d)
Q5
12
DAP
C10
TP5
Q3
10
TIMR
LRDY
11
C11
R15
R11
VIN
PWM
R12
TP6
GND
Figure 2. Board Schematic
2
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Pin Descriptions
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3
Pin Descriptions
LM3423
LM3421
Name
Description
Function
Bypass with 100 nF capacitor to AGND as close to
the device as possible in the circuit board layout.
1
1
VIN
Input Voltage
2
2
EN
Enable
3
3
COMP
Compensation
4
4
CSH
Current Sense High
5
5
RCT
Resistor Capacitor Timing
External RC network sets the predictive “off-time”
and thus the switching frequency.
6
6
AGND
Analog Ground
Connect to PGND through the DAP copper pad to
provide ground return for CSH, COMP, RCT, and
TIMR.
7
7
Connect to AGND for zero current shutdown or
apply > 2.4V to enable device.
Connect a capacitor to AGND to set the
compensation.
Connect a resistor to AGND to set the signal current.
For analog dimming, connect a controlled current
source or a potentiometer to AGND as detailed in
the Analog Dimming section.
OVP
Over-Voltage Protection
Connect to a resistor divider from VO to program
output over-voltage lockout (OVLO). Turn-off
threshold is 1.24V and hysteresis for turn-on is
provided by 23 µA current source.
Connect a PWM signal for dimming as detailed in
the PWM Dimming section and/or a resistor divider
from VIN to program input under-voltage lockout
(UVLO). Turn-on threshold is 1.24V and hysteresis
for turn-off is provided by 23 µA current source.
8
8
nDIM
Dimming Input /
Under-Voltage Protection
9
-
FLT
Fault Flag
Connect to pull-up resistor from VIN and N-channel
MosFET open drain output is high when a fault
condition is latched by the timer.
10
-
TIMR
Fault Timer
Connect a capacitor to AGND to set the time delay
before a sensed fault condition is latched.
11
-
LRDY
LED Ready Flag
Connect to pull-up resistor from VIN and N-channel
MosFET open drain output pulls down when the
LED current is not in regulation.
12
-
DPOL
Dim Polarity
Connect to AGND if dimming with a series Pchannel MosFET or leave open when dimming with
series N-channel MosFET.
13
9
DDRV
Dim Gate Drive Output
14
10
PGND
Power Ground
15
11
GATE
Main Gate Drive Output
16
12
VCC
Internal Regulator Output
17
13
IS
Main Switch Current Sense
Connect to the drain of the main N-channel MosFET
switch for RDS-ON sensing or to a sense resistor
installed in the source of the same device.
18
14
RPD
Resistor Pull Down
Connect the low side of all external resistor dividers
(VIN UVLO, OVP) to implement “zero-current”
shutdown.
19
15
HSP
LED Current Sense Positive
Connect through a series resistor to the positive side
of the LED current sense resistor.
20
16
HSN
LED Current Sense Negative
Connect through a series resistor to the negative
side of the LED current sense resistor.
DAP (21)
DAP (17)
DAP
Thermal PAD on bottom of IC
Star ground, connecting AGND and PGND.
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Connect to the gate of the dimming MosFET.
Connect to AGND through the DAP copper pad to
provide ground return for GATE and DDRV.
Connect to the gate of the main switching MosFET.
Bypass with 2.2 µF–3.3 µF ceramic capacitor to
PGND.
AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
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3
Bill of Materials for 551600305-002 REVA
4
Bill of Materials for 551600305-002 REVA
Qty
4
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Part ID
Part Value
Manufacturer
Part Number
2
C1, C12
0.1 µF X7R 10% 50V
TDK
C1608X5R1H104K
2
C2, C8
1.0 µF X7R 10% 50V
MURATA
GRM21BR71H105KA12L KA01L
1
C3
68 µF 20% 100V
UCC
EMVY101ARA680MKE
1
C4
0.1 µF X7R 10% 100V
TDK
C2012X7R2A104M
4
C6(a-d)
10 µF X7R 10% 50V (4
installed for a total of 40 µF)
TDK
C5750X7R1H106
1
C7
1000 pF X5R 5% 100V
MURATA
C2012X5R2E102K
1
C9
2.2 µF X7R 10% 16V
MURATA
GRM21BR71C225KA01L
1
C10
10 nF X7R 10% 50V
PANASONIC
ECJ2VB1H103 KA12L
1
C11
47 pF COG/NPO 5% 50V
PANASONIC
ECJ2VG1H470 KA01L
1
D1
Schottky 100V 12A (or 6A)
VISHAY
12CWQ10FNPBF (or 6CWQ10FNPBF)
1
D2
Zener 10V
ON-SEMI
BZX84C10-V
4
J1, J2, J4, J5
banana jack
KEYSTONE
575-8
1
J3
1x2 male header (with shunt
tab)
SAMTEC
TSW-102-07-T-S
1
L1
47 µH 20% 6.3A
COILCRAFT
MSS1260-473MLB
2
Q1, Q2
NMOS 150V 50A (or 100V
32A)
INFINEON (or
FAIRCHILD)
IPD200N15N3 (or FDD3682)
2
Q3, Q7
NMOS 60V 260 mA
ON-SEMI
2N7002ET1G
1
Q4
PNP 40V 200 mA
FAIRCHILD
MMBT3906
1
Q5
PNP 150V 600 mA
FAIRCHILD
MMBT5401
1
Q6
NPN 300V 500 mA
FAIRCHILD
MMBTA42
2
R1, R11
12.4 kΩ 1%
VISHAY
CRCW080512k4FKEA
1
R2
0Ω 1%
VISHAY
CRCW08050000Z0EA
2
R3, R20
10Ω 1%
VISHAY
CRCW080510R0FKEA
1
R4
16.9 kΩ 1%
VISHAY
CRCW080516k9FKEA
3
R5, R7, R8
1.40 kΩ 1%
VISHAY
CRCW08051k40FKEA
1
R6
0.06Ω 1% 1W
VISHAY
WSL2512R0600FEA
1
R9
0.2Ω 1% 1W
PANASONIC
ERJ12RSFR20U
1
R10
35.7 kΩ 1%
VISHAY
CRCW080535k7FKEA
3
R12, R13, R19
10.0 kΩ 1%
VISHAY
CRCW080510k0FKEA
3
R14, R15, R17
100 kΩ 1%
VISHAY
CRCW0805100kFKEA
1
R18
432 kΩ 1%
VISHAY
CRCW0805432kFKEA
5
TP1, TP5, TP6,
TP10
turret
KEYSTONE
1502-2
1
U1
Buck-boost controller
TI
LM3423
AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
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PCB Layout for 551600305-002 REVA
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5
PCB Layout for 551600305-002 REVA
Figure 3. Top Layer
Figure 4. Bottom Layer
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Design Procedure
6
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Design Procedure
Refer to the LM3421/21Q1/21Q0 LM3423/23Q1/23Q0 N-Ch Controllers for Constant Current LED Drivers
(SNVS574 data sheet for design considerations.
6.1
Specifications
N=6
VLED = 3.5V
rLED = 325 mΩ
VIN = 24V
VIN-MIN = 10V; VIN-MAX = 70V
fSW = 700 kHz
VSNS = 150 mV
ILED = 700 mA
ΔiL-PP = 350 mA
ΔiLED-PP = 50 mA
ΔvIN-PP = 100 mV
ILIM = 4A
VTURN-ON = 10V; VHYS = 3.4V
VTURN-OFF =44V; VHYSO = 10V
6.2
Operating Point
Solve for VO and rD:
VO = N x VLED = 6 x 3.5V = 21V
rD = N x rLED = 6 x 325 m: = 1.95:
(1)
(2)
Solve for D, D', DMAX, and DMIN:
D=
6.3
VO
VO + VIN
=
21V
= 0.467
21V + 24V
(3)
D' = 1 - D = 1 - 0.467 = 0.533
(4)
VO
21V
=
= 0.231
DMIN =
VO + VIN-MAX 21V + 70V
(5)
VO
21V
=
= 0.677
DMAX =
VO + VIN-MIN 21V + 10V
(6)
Switching Frequency
Assume C7 = 1 nF and solve for R10:
R10 =
25
25
=
= 35.7 k:
fSW x C7 700 kHz x 1 nF
(7)
The closest standard resistor is actually 35.7 kΩ therefore the fSW is:
fSW =
6
25
25
= 700 kHz
=
R10 x C7 35.7 k: x 1 nF
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Design Procedure
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The chosen components from Section 6.3 are:
C7 = 1 nF
R10 = 35.7 k:
6.4
(9)
Average LED Current
Solve for R9:
R9 =
VSNS 150 mV
=
= 0.214:
ILED
700 mA
(10)
Assume R1 = 12.4 kΩ and solve for R8:
30107715
R8 =
ILED x R1 x R9 700 mA x 12.4 k: x 0.2:
=
= 1.4 k:
1.24V
1.24V
(11)
The closest standard resistor for R9 is 0.2Ω and the closest for R8 (and R7) is actually 1.4 kΩ therefore
ILED is:
30107716
ILED =
1.24V x R8 1.24V x 1.4 k:
=
= 700 mA
0.2: x 12.4 k:
R9 x R1
(12)
The chosen components from Section 6.4 are:
R9 = 0.2:
R1 = 12.4 k:
R8 = R7 = 1.4 k:
6.5
(13)
Inductor Ripple Current
Solve for L1:
L1 =
24V x 0.467
VIN x D
=
= 46 PH
'iL-PP x fSW 350 mA x 700 kHz
(14)
The closest standard inductor is 47 µH therefore the actual ΔiL-PP is:
'iL-PP =
24V x 0.467
VIN x D
=
= 340 mA
L1 x fSW 47 PH x 700 kHz
(15)
Determine minimum allowable RMS current rating:
IL-RMS =
IL-RMS =
§ 'I
x D' ·
¸
x 1 + 1 x ¨¨ L-PP
¸
12 © ILED
D'
¹
ILED
2
1 §¨340 mA x 0.533·¸
700 mA x
1+
x
¸
12 ¨©
0.533
700 mA
¹
2
IL-RMS = 1.32A
(16)
The chosen component from Section 6.5 is:
L1 = 47 PH
6.6
(17)
Output Capacitance
Solve for CO:
CO =
ILED x D
rD x 'iLED-PP x fSW
CO =
700 mA x 0.467
= 4.79 PF
1.95: x 50 mA x 700 kHz
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Design Procedure
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A total value of 40 µF (using 4 10 µF X7R ceramic capacitors) is chosen therefore the actual ΔiLED-PP is:
'iLED-PP =
ILED x D
rD x CO x fSW
'iLED-PP =
700 mA x 0.467
= 6 mA
1.95: x 40 PF x 700 kHz
(19)
Determine minimum allowable RMS current rating:
ICO-RMS = ILED x
DMAX
0.677
= 1.01A
= 700 mA x
1- 0.677
1 - DMAX
(20)
The chosen components from Section 6.6 are:
C6 = 4 x 10 PF
6.7
(21)
Peak Current lmit
Solve for R6:
R6 =
245 mV 245 mV
= 0.061:
=
ILIM
4A
(22)
The closest standard resistor is 0.06 Ω therefore ILIM is:
ILIM =
245 mV 245 mV
= 4.1A
=
R6
0.06:
(23)
The chosen component from Section 6.7 is:
R6 = 0.06:
6.8
(24)
Loop Compensation
ωP1 is approximated:
ZP1 =
1.467
1+D
rad
=
= 19k sec
rD x CO 1.95: x 40 PF
(25)
ωZ1 is approximated:
ZZ1 =
rD x D'2 1.95: x 0.5332
rad
=
= 25k sec
D x L1
0.467 x 47 PH
(26)
TU0 is approximated:
TU0 =
D' x 620V
0.533 x 620V
=
= 5360
(1 + D) x ILED x R6 1.467 x 700 mA x 0.06:
(27)
To ensure stability, calculate ωP2:
ZP2 =
min(ZP1, ZZ1)
5 x TU0
=
ZP1
5 x 5360
=
rad
19k sec
5 x 5360
rad
= 0.709 sec
(28)
Solve for C8:
C8 =
1
1
=
= 0.28 PF
ZP2 x 5e6: 0.709 rad x 5e6:
sec
(29)
To attenuate switching noise, calculate ωP3:
ZP3 = max (ZP1, ZZ1) x 10 = ZZ1 x 10
ZP3 = 25k
8
rad
rad
x 10 = 250k
sec
sec
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Assume R20 = 10Ω and solve for C12:
C12 =
1
1
= 0.4 PF
=
10: x ZP3 10: x 250k rad
sec
(31)
Since PWM dimming can be evaluated with this board, a much larger compensation capacitor C8 = 1.0 µF
is chosen and a smaller high frequency capacitor C12 = 0.1 µF is chosen.
The chosen components from Section 6.8 are:
C8 = 1.0 PF
R20 = 10:
C12 = 0.1 PF
6.9
(32)
Input Capacitance
Solve for the minimum CIN:
CIN =
ILED x D
700 mA x 0.467
=
= 4.67 PF
'VIN-PP x fSW 100 mV x 700 kHz
(33)
To minimize power supply interaction a much larger capacitance of 68 µF is used, therefore the actual
ΔvIN-PP is much lower.
Determine minimum allowable RMS current rating:
ICO-RMS = ILED x
DMAX
0.677
= 1.01A
= 700 mA x
1 - DMAX
1- 0.677
(34)
The chosen components from Section 6.9 are:
C3 = 68 PF
(35)
6.10 NFET
Determine minimum Q1 voltage rating and current rating:
VT-MAX = VIN-MAX + VO = 70V + 21V = 91V
(36)
0.677
IT-MAX =
x 700 mA = 1.46A
1 - 0.677
(37)
A 100V NFET is chosen with a current rating of 40A due to the low RDS-ON = 50 mΩ. Determine IT-RMS and
PT:
ILED
700 mA
x 0.467 = 897 mA
x D=
0.533
D'
(38)
PT = IT-RMS2 x RDSON = 897 mA2 x 50 m: = 40 mW
(39)
IT-RMS =
The chosen component from Section 6.10 is:
Q1 o 40A, 100V, DPAK
(40)
6.11 DIODE
Determine minimum D1 voltage rating and current rating:
VRD-MAX = VIN-MAX + VO = 70V + 21V = 91V
(41)
ID-MAX = ILED = 700 mA
(42)
A 100V diode is chosen with a current rating of 12A and VD = 600 mV. Determine PD:
PD = ID x VFD = 700 mA x 600 mV = 420 mW
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Design Procedure
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The chosen component from Section 6.11 is:
D1 o 12A, 100V, DPAK
(44)
6.12 Input UVLO
Since PWM dimming will be evaluated, a three resistor network will be used. Assume R13 = 10 kΩ and
solve for R5:
R5 =
1.24V x R13
1.24V x 10 k:
= 1.42 k:
=
10V - 1.24V
VTURN-ON - 1.24V
(45)
The closest standard resistor is 1.4 kΩ therefore VTURN-ON is:
VTURN-ON =
1.24V x (R5 + R13)
R5
1.24V x (1.4 k: + 10 k:)
= 10.1V
1.4 k:
VTURN-ON =
(46)
Solve for R4:
R4 =
R5 x (VHYS - 23 PA x R13)
23 PA x (R5 + R13)
R4 =
1.4 k: x (3.4V - 23 PA x 10 k:)
= 16.9 k:
23 PA x (1.4 k: + 10 k:)
(47)
The closest standard resistor is 16.9 kΩ making VHYS:
VHYS =
VHYS =
23 PA x R4 x (R5 + R13)
+ 23 PA x R13
R5
23 PA x 16.9 k: x (1.4 k: + 10 k:)
1.4 k:
+ 23 PA x 10 k: = 3.4V
(48)
The chosen components from Section 6.12 are:
R5 = 1.4 k:
R13 = 10 k:
R4 = 16.9 k:
(49)
6.13 Output OVLO
Solve for R18:
R18 =
VHYSO
10V
= 435 k:
=
23 PA 23 PA
(50)
The closest standard resistor is 432 kΩ therefore VHYSO is:
VHYSO = R18 x 23 PA = 432 k: x 23 PA = 9.9V
(51)
Solve for R11:
R11 =
1.24V x R18
1.24V x 432 k:
= 12.3 k:
=
44V ± 620 mV
VTURN-OFF ± 620 mV
(52)
The closest standard resistor is 12.4 kΩ making VTURN-OFF:
10
VTURN-OFF =
1.24V x (R11 + R18)
R11
VTURN-OFF =
1.24V x (0.5 x 12.4 k: + 432 k:)
= 44V
12.4 k:
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The chosen components from Section 6.13 are:
R11 = 12.4 k:
R18 = 432 k:
(54)
6.14 PWM Dimming
The LM3423 Buck-boost Evaluation board is configured to demonstrate PWM dimming of the LEDs. For
best operation, use a PWM signal that has greater than 3V amplitude at a frequency between 120Hz and
5kHz. Apply the PWM signal to the BNC connector (J6) and the inverted signal (seen by the nDIM pin)
can be monitored at TP5.
The output PWM drive signal (DDRV) is level shifted to the floating LED stack using several components
(R19, R17, Q4, Q6, Q7, and D2) and ultimately controls the series dimming FET (Q2). This level shift
adds a several microsecond delay from input to output as seen in the Typical Waveforms section. This
delay, along with the time it takes to slew the LED current from zero to its nominal value, limits the
contrast ratio for a given dimming frequency.
Using the evaluation board (24V input, 21V output), at 5kHz dimming frequency the best case contrast
ratio is approximately 40:1, but at 200Hz the same system is more like 1000:1 ratio. In general, contrast
ratios much above 2000:1 are not possible for any operating point using the LM3423 buck-boost
evaluation board.
6.15 Fault and LED Current Monitoring
The LM3423 has a fault detection flag in the form of an open-drain NFET at the FLT pin. Using the
external pull-up resistor (R14) to VIN, the fault status can be monitored at the FLT pin (high = fault). The
fault timer interval is set with the capacitor (C10) from TIMR to GND (10nF yields roughly 1ms). If a fault is
detected that exceeds the programmed timer interval, such as an output over-voltage condition, the FLT
pin transitions from high to low and internally GATE and DDRV are latched off. To reset the device once
the fault is removed, either the input power must be cycled or the EN pin must be toggled.
This can be tested directly with the evaluation board by opening the LED load. An OVP fault will occur
which disables GATE and DDRV. Then if the LEDs are reconnected, the EN pin jumper (J3) can be
removed and reinserted to restart normal operation of the LM3423.
The LED status flag (LRDY) can be seen by monitoring TP4. LRDY is also an open-drain NFET
connection which has an external pull-up resistor (R15) to VIN. If the LED current is in regulation the
voltage at TP4 will be high, but when it falls out of regulation the NFET turns on and pulls TP4 low. The
LM3423 datasheet lists all of the conditions that affect LRDY, FLT, and TIMR.
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Typical Waveforms
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Typical Waveforms
TA = +25°C, VIN = 24V and VO = 21V.
1.0
ILED (A)
0.5
1.0
ILED
0.5
4
VDIM
2
0
12
0.0
VDIM (V)
VDIM (V)
0.0
ILED (A)
ILED
4
VDIM
2
0
400 és/DIV
2 és/DIV
Figure 5. 1kHz 50% PWM DIMMING
TP5 dim voltage (VDIM)
LED current (ILED)
Figure 6. 1kHz 50% PWM DIMMING (Rising Edge)
TP5 dim voltage (VDIM)
LED current (ILED)
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Schematic for 551600305-001 REV1
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8
Schematic for 551600305-001 REV1
LED+
J4
J7
TP1
L1
VIN
J1
R3
C2, C3
1
VIN
LM3423
8
7
D1
HSN
R7
20
9
6
10
5
11
4
12
3
13
2
14
1
C1
J3
2
TP10
R10
C8
R2
GND
3
EN
HSP
COMP
RPD
R8
19
18
LEDJ5
RPD
J2
TP7
R1
4
CSH
IS
RCT
VCC
Q2
C12
R9
C4, C6
17
VCC
5
DIM
VIN
16
R20
C9
C7
6
GATE
AGND
15
R17
Q1
Q7
C5
DIM
7
R13
PGND
OVP
14
R6
VCC
R4
8
nDIM
DDRV
R18
R16
Q4
Q6
D2
13
Q5
R19
R14
R5
9
VIN
RPD
FLT
DPOL
12
TP4
DAP
C10
10
TIMR
LRDY
11
C11
R15
R11
VIN
TP5
BNC
PWM
Q3
R12
J6
SNVA415C – June 2010 – Revised May 2013
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AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
Copyright © 2010–2013, Texas Instruments Incorporated
13
PCB Layout for 551600305-001 REV1
9
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PCB Layout for 551600305-001 REV1
Figure 7. Top Layer
Figure 8. Bottom Layer
14
AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
Copyright © 2010–2013, Texas Instruments Incorporated
SNVA415C – June 2010 – Revised May 2013
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Bill of Materials for 551600305-001 REV1
www.ti.com
10
Bill of Materials for 551600305-001 REV1
Qty
Part ID
Part Value
Manufacturer
Part Number
2
C1, C12
0.1 µF X7R 10% 50V
TDK
C1608X5R1H104K
2
C2, C8
1.0 µF X7R 10% 50V
MURATA
GRM21BR71H105KA12L KA01L
1
C3
68 µF 20% 100V
UCC
EMVY101ARA680MKE
1
C4
0.1 µF X7R 10% 100V
TDK
C2012X7R2A104M
1
C5
DNP
4
C6
10 µF X7R 10% 50V (4 installed
for a total of 40 µF)
TDK
C5750X7R1H106
1
C7
1000 pF X5R 5% 100V
MURATA
C2012X5R2E102K
1
C9
2.2 µF X7R 10% 16V
MURATA
GRM21BR71C225KA01L
1
C10
10 nF X7R 10% 50V
PANASONIC
ECJ2VB1H103 KA12L
1
C11
47 pF COG/NPO 5% 50V
PANASONIC
ECJ2VG1H470 KA01L
1
D1
Schottky 100V 7A
VISHAY
6CWQ10FNPBF
1
D2
Zener 10V
ON-SEMI
BZX84C10-V
4
J1, J2, J4, J5
banana jack
KEYSTONE
575-8
1
J3
1x2 male header (with shunt tab) SAMTEC
TSW-102-07-T-S
1
J6
BNC connector
AMPHENOL
112536
1
J7
DNP
1
L1
47 µH 20% 6.3A
COILCRAFT
MSS1260-473MLB
2
Q1, Q2
NMOS 100V 40A
VISHAY
SUD40N10-25
2
Q3, Q7
NMOS 60V 260 mA
ON-SEMI
2N7002ET1G
1
Q4
PNP 40V 200 mA
FAIRCHILD
MMBT3906
1
Q5
PNP 150V 600 mA
FAIRCHILD
MMBT5401
1
Q6
NPN 300V 500 mA
FAIRCHILD
MMBTA42
2
R1, R11
12.4 kΩ 1%
VISHAY
CRCW080512k4FKEA
1
R2
0Ω 1%
VISHAY
CRCW08050000Z0EA
2
R3, R20
10Ω 1%
VISHAY
CRCW080510R0FKEA
1
R4
16.9 kΩ 1%
VISHAY
CRCW080516k9FKEA
3
R5, R7, R8
1.40 kΩ 1%
VISHAY
CRCW08051k40FKEA
1
R6
0.06Ω 1% 1W
VISHAY
WSL2512R0600FEA
1
R9
0.2Ω 1% 1W
PANASONIC
ERJ12RSFR20U
1
R10
35.7 kΩ 1%
VISHAY
CRCW080535k7FKEA
3
R12, R13, R19
10.0 kΩ 1%
VISHAY
CRCW080510k0FKEA
3
R14, R15, R17
100 kΩ 1%
VISHAY
CRCW0805100kFKEA
1
R16
DNP
1
R18
432 kΩ 1%
VISHAY
CRCW0805432kFKEA
5
TP1, TP4, TP5,
TP7, TP10
turret
KEYSTONE
1502-2
1
U1
Buck-boost controller
TI
LM3423
SNVA415C – June 2010 – Revised May 2013
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AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
Copyright © 2010–2013, Texas Instruments Incorporated
15
Alternate Designs
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Alternate Designs
Alternate designs with the LM3423 evaluation board are possible with very few changes to the existing
hardware. The evaluation board FETs and diodes are already rated higher than necessary for design
flexibility. The input UVLO, output OVP, input and output capacitance can remain the same for the designs
shown below. These alternate designs can be evaluated by changing only R9, R10, and L1.
Table 1 gives the main specifications for four different designs and the corresponding values for R9, R10,
and L1. PWM dimming can be evaluated with any of these designs.
Table 1. Alternate Designs Specifications
16
Specification /
Component
Design 1
Design 2
Design 3
Design 4
VIN
10V - 45V
15V - 50V
20V - 55V
25V - 60V
VO
14V
21V
28V
35V
700kHz
fSW
600kHz
700kHz
500kHz
ILED
2A
500mA
2.5A
1.25A
R9
0.05Ω
0.2Ω
0.04Ω
0.08Ω
R10
41.2 kΩ
35.7 kΩ
49.9 kΩ
35.7 kΩ
L1
22µH
68µH
15µH
33µH
AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
Copyright © 2010–2013, Texas Instruments Incorporated
SNVA415C – June 2010 – Revised May 2013
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