LM3424BKBSTEVAL/NOPB

User's Guide SNVA397A – August 2009 – Revised May 2013 AN-1967 LM3424 Buck-Boost Evaluation Board 1 Introduction This wide range evaluation board showcases the LM3424 NFET controller used with a buck-boost current regulator. It is designed to drive 4 to 10 LEDs at a maximum average LED current of 1A from a DC input voltage of 10 to 70V. The evaluation board showcases many of the LM3424 features including thermal foldback, analog dimming, external switching frequency synchronization, and high frequency PWM dimming, among others. There are many external connection points to facilitate the full evaluation of the LM3424 device including inputs, outputs and test points. Refer to Table 1 for a summary of the connectors and test points. The buck-boost circuit can be easily redesigned for different specifications by changing only a few components (see the Alternate Designs section). Note that design modifications can change the system efficiency for better or worse. This application note is designed to be used in conjunction with the LM3424 datasheet as a reference for the LM3424 buck-boost evaluation board. Refer to the LM3424 Constant Current N-Channel Controller with Thermal Foldback for Driving LEDs (SNVS603) data sheet for a comprehensive explanation of the device, design procedures, and application information. 2 Key Features • • • • • • Input: 10V to 70V Output: 4 to 10 LEDs at 1A Thermal Foldback / Analog Dimming PWM Dimming up to 10 kHz External Synchronization > 500 kHz Input Under-voltage and Output Over-voltage Protection 100 EFFICIENCY (%) 95 90 85 80 75 70 0 16 32 48 64 80 VIN (V) Figure 1. Efficiency with 9 Series LEDS AT 1A All trademarks are the property of their respective owners. SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback AN-1967 LM3424 Buck-Boost Evaluation Board Copyright © 2009–2013, Texas Instruments Incorporated 1 External Connection Descriptions 3 www.ti.com External Connection Descriptions Table 1. Connectors and Test Points 2 Qty Name Description Application Information J1 VIN Input Voltage Connect to positive terminal of supply voltage. J2 GND Input Ground Connect to negative terminal of supply voltage (GND). J3 EN Enable On/Off Jumper connected enables device. J4 LED+ LED Positive Connect to anode (top) of LED string. J5 LED- LED Negative Connect to cathode (bottom) of LED string. J6 BNC Dimming Input Connect a 3V to 10V PWM input signal up to 10 kHz for PWM dimming the LED load. J7 OUT Output with NTC Alternative connector for LED+ and LED-. Pins 4 and 11 are used for connecting an external NTC thermistor. Refer to schematic for detailed connectivity. TP1 SW Switch Node Voltage Test point for switch node (where Q1, D1, and L1 connect). TP3 SGND Signal Ground Connection for GND when applying signals to TP5, TP8, and TP9. TP4 LED+ LED Positive Voltage Test point for anode (top) of LED string. TP5 nDIM Inverted Dim Signal Test point for dimming input (inverted from input signal). TP6 VIN Input Voltage Test point for input voltage. TP8 SYNC Synchronization Input Connect a 3V to 6V PWM clock signal > 500 kHz (pulse width of 100ns) to synchronize the LM3424 switching frequency to the external clock. TP9 NTC Temp Sense Input Connect a 0V to 1.24V DC voltage to analog dim the LED current. TP10 PGND Power Ground Test point for GND when monitoring TP1, TP4, or TP6. AN-1967 LM3424 Buck-Boost Evaluation Board SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Schematic www.ti.com 4 Schematic TP6 TP1 TP4 D1 VIN GND J7 L1 C2, C3, C16, C18, C23 J1 LED+ J4 J2 LEDJ5 8 7 9 6 10 5 11 4 12 3 13 2 14 1 NTC C4, C5, C6, C17, C19 R3 1 J3 VIN LM3424 HSP R8 20 DIM C1 2 C8 R1 R9 VIN R20 R2 C10 R13 HSN EN C12 R7 19 Q2 3 4 COMP SLOPE CSH IS R14 18 R26 17 Q7 R24 R10 TP8 C14 C13 C20 DIM 5 RT/SYNC VCC 16 Q6 R17 Q4 C9 R25 R4 C7 R5 R15 C21 6 GATE nDIM 15 VIN TP3 TP10 7 8 9 GND SS TGAIN DDRV OVP TSENSE D2 Q1 R6 14 Q5 R23 13 12 DAP R19 C11 10 TREF VS R21 C15 R11 11 R22 TP5 NTC J6 C22 PWM Q3 R12 SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback AN-1967 LM3424 Buck-Boost Evaluation Board Copyright © 2009–2013, Texas Instruments Incorporated 3 LM3424 Pin Descriptions 5 www.ti.com LM3424 Pin Descriptions Pin Name Application Information 1 VIN Input Voltage Bypass with 100 nF capacitor to GND as close to the device as possible in the circuit board layout. 2 EN Enable Connect to > 2.4V to enable the device or to < 0.8V for low power shutdown. 3 COMP Compensation Connect a capacitor to GND to compensate control loop. Current Sense High Connect a resistor to GND to set the signal current. Can also be used to analog dim as explained in the Thermal Foldback / Analog Dimming section of the datasheet. 4 CSH 5 4 Description RT Resistor Timing Connect a resistor to GND to set the switching frequency. Can also be used to synchronize external clock as explained in the Switching Frequency section of the datasheet. 6 nDIM Not DIM input Connect a PWM signal for dimming as detailed in the PWM Dimming section of the datasheet and/or a resistor divider from VIN to program input under-voltage lockout (UVLO). Turn-on threshold is 1.24V and hysteresis for turnoff is provided by 20 µA current source. 7 SS Soft-start Connect a capacitor to GND to extend start-up time. 8 TGAIN Temperature Foldback Gain Connect a resistor to GND to set the foldback slope. 9 TSENSE Temperature Sense Input Connect a resistor/ thermistor divider from VS to sense the temperature as explained in the Thermal Foldback / Analog Dimming section of the datasheet. 10 TREF Temperature Foldback Reference Connect a resistor divider from VS to set the temperature foldback reference voltage. 11 VS Voltage Reference 2.45V reference for temperature foldback circuit and other external circuitry. Connect to a resistor divider from VO to program output over-voltage lockout (OVLO). Turn-off threshold is 1.24V and hysteresis for turn-on is provided by 20 µA current source. 12 OVP Over-Voltage Protection 13 DDRV Dimming Gate Drive Output Connect to gate of dimming MosFET. 14 GND Ground Connect to DAP to provide proper system GND 15 GATE Gate Drive Output AN-1967 LM3424 Buck-Boost Evaluation Board Connect to gate of main switching MosFET. SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Bill of Materials www.ti.com 6 Pin Name Description 16 VCC Internal Regulator Output Application Information Bypass with a 2.2 µF–3.3 µF, ceramic capacitor to GND. Connect to the drain of the main N-channel MosFET switch for RDS-ON sensing or to a sense resistor installed in the source of the same device. 17 IS Main Switch Current Sense 18 SLOPE Slope Compensation 19 HSN High-Side LED Current Sense Negative Connect through a series resistor to the negative side of the LED current sense resistor. 20 HSP High-Side LED Current Sense Positive Connect through a series resistor to the positive side of the LED current sense resistor. DAP (21) DAP Thermal pad on bottom of IC Connect to GND and place 6 9 vias to bottom layer ground pour. Connect a resistor to GND to set slope of additional ramp. Bill of Materials Qty Part ID Part Value Manufacturer Part Number 4 C1, C5, C20, C23 0.1 µF X7R 10% 100V TDK C2012X7R2A104K 4 C2, C3, C16, C18 4.7 µF X7R 10% 100V TDK C5750X7R2A475K 4 C4, C6, C17, C19 10 µF X7R 10% 50V TDK C5750X7R1H106K 2 C7, C22 0.47 µF X7R 10% 16V MURATA GRM21BR71C474KA01L 0 C8 DNP 1 C9 2.2 µF X7R 10% 16V MURATA GRM21BR71C225KA12L 1 C10 1 µF X7R 10% 16V MURATA GRM21BR71C105KA01L 1 C11 47 pF COG/NPO 5% 50V AVX 08055A470JAT2A 1 C12 0.22 µF X7R 10% 16V MURATA GRM219R71C224KA01D 3 C13, C14, C21 100 pF COG/NPO 5% 50V MURATA GRM2165C1H101JA01D 1 C15 1 µF X7R 10% 16V MURATA GRM21BR71C105MA01L 1 D1 Schottky 100V 12A VISHAY 12CWQ10FNPBF 1 D2 Zener 10V ON-SEMI BZX84C10LT1G 4 J1, J2, J4, J5 Banana Jack KEYSTONE 575-8 1 J3 1x2 Header Male SAMTEC TSW-102-07-T-S 1 J6 BNC connector AMPHENOL 112536 1 J7 2x7 Header Male Shrouded RA SAMTEC TSSH-107-01-SDRA 1 L1 33 µH 20% 6.3A COILCRAFT MSS1278-333MLB 2 Q1, Q2 NMOS 100V 32A FAIRCHILD FDD3682 1 Q3 NMOS 60V 260mA ON-SEMI 2N7002ET1G 1 Q4 PNP 40V 200mA FAIRCHILD MMBT5087 1 Q5 PNP 150V 600 mA FAIRCHILD MMBT5401 1 Q6 NPN 300V 600mA FAIRCHILD MMBTA42 1 Q7 NPN 40V 200mA FAIRCHILD MMBT6428 2 R1, R11 12.4 kΩ 1% VISHAY CRCW080512K4FKEA 0 R2 DNP 3 R3, R20, R26 10Ω 1% VISHAY CRCW080510R0FKEA 1 R4 17.4 kΩ 1% VISHAY CRCW080517K4FKEA 1 R5 1.43 kΩ 1% VISHAY CRCW08051K43FKEA SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback AN-1967 LM3424 Buck-Boost Evaluation Board Copyright © 2009–2013, Texas Instruments Incorporated 5 Bill of Materials 6 www.ti.com 1 R6 0.04Ω 1% 1W VISHAY WSL2512R0400FEA 2 R7, R8 1.0 kΩ 1% VISHAY CRCW08051K00FKEA 1 R9 0.1Ω 1% 1W VISHAY WSL2512R1000FEA 1 R10 14.3 kΩ 1% VISHAY CRCW080514K3FKEA 4 R12, R13, R14, R15 10.0 kΩ 1% VISHAY CRCW080510K0FKEA 1 R17 499 kΩ 1% VISHAY CRCW0805499KFKEA 3 R19, R21, R22 49.9 kΩ 1% VISHAY CRCW080549K9FKEA 1 R23 499Ω 1% VISHAY CRCW0805499RFKEA 1 R24 4.99 kΩ 1% VISHAY CRCW08054K99FKEA 1 R25 150Ω 1% VISHAY CRCW0805150RFKEA 8 TP1, TP3, TP4, TP5, TP6, TP8, TP9, TP10 Turret Keystone 1502-2 1 U1 Buck-boost controller TI LM3424 AN-1967 LM3424 Buck-Boost Evaluation Board SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated PCB Layout www.ti.com 7 PCB Layout Figure 2. Top Layer Figure 3. Bottom Layer SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback AN-1967 LM3424 Buck-Boost Evaluation Board Copyright © 2009–2013, Texas Instruments Incorporated 7 Design Procedure www.ti.com 8 Design Procedure 8.1 Specifications N=6 VLED = 3.5V rLED = 325 mΩ VIN = 24V VIN-MIN = 10V VIN-MAX = 70V fSW = 500 kHz VSNS = 100 mV ILED = 1A ΔiL-PP = 700 mA ΔiLED-PP = 12 mA ΔvIN-PP = 100 mV ILIM = 6A VTURN-ON = 10V VHYS = 3V VTURN-OFF = 50V VHYSO = 10V TBK = 45°C TEND= 125°C tTSU = 40 ms 8.2 Operating Point Solve for VO and rD: VO = N x VLED = 6 x 3.5V = 21V (1) rD = N x rLED = 6 x 325 m: = 1. 95: (2) Solve for D, D', DMAX, and DMIN: D= VO 21V = = 0.467 VO + VIN 21V + 24V (3) D' = 1 - D = 1 - 0. 467 = 0. 533 DMIN = (4) VO 21V = = 0.231 VO + VIN-MAX 21V + 70V (5) VO 21V DMAX = = = 0.677 VO + VIN-MIN 21V + 10V 8.3 (6) Switching Frequency Solve for RT: R10 = 8 1 + 1.95e-8 x fSW 1.40e -10 x fSW = 1 + 1.95e-8 x 500 kHz = 14.4 k: 1.40e-10 x 500 kHz AN-1967 LM3424 Buck-Boost Evaluation Board (7) SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Design Procedure www.ti.com The closest standard resistor is 14.3 kΩ therefore fSW is: fSW = 1 1.40e-10 x R10 - 1.95e-8 fSW = 1 = 504 kHz 1.40e-10 x 14.3 k: - 1.95e-8 (8) The chosen component from step 2 is: R10 = 14.3 k: 8.4 (9) Average LED Current Solve for RSNS: R9 = VSNS ILED = 100 mV = 0.1: 1A (10) Assume RCSH = 12.4 kΩ and solve for RHSP: ILED x R1 x R9 R8 = 1.24V = 1A x 1.24 k: x 0.1: = 1.0 k: 1.24V (11) The closest standard resistor for RSNS is actually 0.1Ω and for RHSP is actually 1 kΩ therefore ILED is: ILED = 1.24V x R8 1.24V x 1.0 k: = = 1.0A 0.1: x 1.24 k: R9 x R1 (12) The chosen components from step 3 are: R9 = 0.1: R1 = 12.4 k: R8 = R7 = 1 k: 8.5 (13) Thermal Foldback Using a standard 100k NTC thermistor (connected to pins 4 and 11 of J7), find the resistances corresponding to TBK and TEND (RNTC-BK = 243 kΩ and RNTC-END = 71.5 kΩ) from the manufacturer's datasheet. Assuming RREF1 = RREF2 = 49.9 kΩ, then RBIAS = RNTC-BK= 243 kΩ. Solve for RGAIN: ICSH · ¸ ¸ ¹ RGAIN = · ¸ ¸ ¹ RGAIN = RNTC-END · R19 ¸ x 2.45V R19 + R21 RNTC-END + R22 ¹¸ · 6.34 k: 1¸ x 2.45V 2 6.34 k: + 49.9 k: ¹¸ 100 PA = 9.49 k: (14) The chosen components from step 4 are: R15 = 10 k: R19 = R21 = R22 = 49.9 k: 8.6 (15) Inductor Ripple Current Solve for L1: L1 = VIN x D 24V x 0. 467 = = 32 PH 'iL- PP x fSW 700 mA x 504 kHz (16) The closest standard inductor is 33 µH therefore ΔiL-PP is: 'iL- PP = VIN x D 24V x 0. 467 = 674 mA = L1 x fSW 33 PH x 504 kHz SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback (17) AN-1967 LM3424 Buck-Boost Evaluation Board Copyright © 2009–2013, Texas Instruments Incorporated 9 Design Procedure www.ti.com Determine minimum allowable RMS current rating: 2 I 1 §¨ 'iL - PP x Dc·¸ x IL - RMS = LED x 1+ 12 ¨© ILED ¸¹ Dc 2 IL - RMS = 1 §674 mA x 0.533· 1.89A 1A x¨ ¸¸ = x 1+ 12 ¨© 1A 0. 533 ¹ (18) The chosen component from step 5 is: L1 = 33 PH 8.7 (19) Output Capacitance Solve for CO: ILED x D rD x 'iLED- PP x fSW CO = CO = 1A x 0. 467 = 39.6 PF 1.95: x 12 mA x 5 04 kHz (20) The closest capacitance totals 40 µF therefore ΔiLED-PP is: 'iLED- PP = ILED x D rD x CO x fSW 'iLED- PP = 1A x 0. 467 = 12 mA 1.95 : x 40 PF x 5 04 kHz (21) Determine minimum allowable RMS current rating: ICO- RMS = ILED x DMAX 0.677 = 1.45A = 1A x 1- DMAX 1- 0.677 (22) The chosen components from step 6 are: C4 = C6 = C17 = C19 = 10 PF 8.8 (23) Peak Current Limit Solve for RLIM: R6 = 245 mV 245 mV = = 0.041: ILIM 6A (24) The closest standard resistor is 0.04 Ω therefore ILIM is: ILIM = 245 mV 245 mV = = 6.13A R6 0.04: (25) The chosen component from step 7 is: R6 = 0.04: 8.9 (26) Slope Compensation Solve for RSLP: R15 = R15 = 1.5e13 x L1 VO x R10 x R9 1.5e13 x 33 PH 35V x 14.3 k: x 0.1: = 9.9 k: (27) The chosen component from step 8 is: 10 AN-1967 LM3424 Buck-Boost Evaluation Board SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Design Procedure www.ti.com RSLP = 10 k: (28) 8.10 Loop Compensation ωP1 is approximated: ZP1 = rad 1.467 1+ D = = 19 k sec rD x CO 1.95: x 40 PF (29) ωZ1 is approximated: ZZ1 = rD x Dc2 1.95: x 0.5332 rad = = 36k D x L1 0.467 x 33 PH sec (30) TU0 is approximated: TU0 = D' x 620V 0.533 x 620V = = 5630 (1 + D) x ILED x R6 1.467 x 1A x 0.04: (31) To ensure stability, calculate ωP2: rad 19k min(ZP1, ZZ1) ZZ1 sec rad ZP2 = = = = 0. 675 5 x 5630 5 x 5630 5 x TU0 sec (32) Solve for CCMP: C10 = 1 ZP2 x 5e6: = 1 = 0.30 PF rad 0.675 sec x 5e6: (33) To attenuate switching noise, calculate ωP3: ZP3 = (max ZP1, ZZ1) x 10 = ZP1 x 10 ZP3 = 36 k rad rad x 10 = 360k sec sec (34) Assume RFS = 10Ω and solve for CFS: C12 = 1 = 10: x ZP3 1 10: x 360k rad sec = 0.28 PF (35) The chosen components from step 9 are: C10 = 1 PF R20 = 10: C12 = 0.22 PF (36) 8.11 Input Capacitance Solve for the minimum CIN: CIN = ILED x D 1A x 0. 467 = = 9.27 PF 'vIN- PP x fSW 100 mV x 504 kHz (37) To minimize power supply interaction a 200% larger capacitance of approximately 20 µF is used, therefore the actual ΔvIN-PP is much lower. Since high voltage ceramic capacitor selection is limited, four 4.7 µF X7R capacitors are chosen. Determine minimum allowable RMS current rating: IIN- RMS = ILED x DMAX 0.677 = 1.45A = 1A x 1- DMAX 1- 0.677 (38) The chosen components from step 10 are: C2 = C3 = C16 = C18 = 4.7 PF SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback (39) AN-1967 LM3424 Buck-Boost Evaluation Board Copyright © 2009–2013, Texas Instruments Incorporated 11 Design Procedure www.ti.com 8.12 NFET Determine minimum Q1 voltage rating and current rating: VT - MAX = VIN - MAX + VO = 70V + 21V = 91V IT- MAX = (40) 0. 677 x 1A = 2.1A 1- 0.677 (41) A 100V NFET is chosen with a current rating of 32A due to the low RDS-ON = 50 mΩ. Determine IT-RMS and PT: IT - RMS = PT = ILED 1A x D= x 0.467 = 1. 28A 0. 533 Dc 2 IT- RMS (42) 2 x RDSON = 1. 28A x 50 m: = 82 mW (43) The chosen component from step 11 is: Q1 o 32A, 100V, DPAK (44) 8.13 Diode Determine minimum D1 voltage rating and current rating: VRD - MAX = VIN - MAX + VO = 70V + 21V = 91V (45) ID - MAX = ILED = 1A (46) A 100V diode is chosen with a current rating of 12A and VD = 600 mV. Determine PD: PD = ID x VFD = 1A x 600 mV = 600 mW (47) The chosen component from step 12 is: D1 o 12A, 100V, DPAK (48) 8.14 Input UVLO Solve for RUV2: R4 = R5 x (VHYS - 20 PA x R13) 20 PA x (R5 + R13) 1.43 k: x (3V - 20 PA x 10 k:) = 17.5 k: 20 PA x (1.43 k: + 10 k:) R4 = (49) The closest standard resistor is 150 kΩ therefore VHYS is: VHYS = VHYS = 20 PA x R4 x (R5 + R13) + 20 PA x R13 R5 20 PA x 17.4 k: x (1.43 k: + 10 k:) 1.43 k: + 20 PA x 10 k: = 2.98V (50) Solve for RUV1: R5 = 1.24V x R13 1.24V x 10 k: = 1.42 k: = 10V - 1.24V VTURN-ON - 1.24V (51) The closest standard resistor is 21 kΩ making VTURN-ON: 12 VTURN-ON = 1.24V x (R5 + R13) R5 VTURN-ON = 1.24V x (1.43 k: + 10 k:) = 9.91V 1.43 k: AN-1967 LM3424 Buck-Boost Evaluation Board (52) SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Design Procedure www.ti.com The chosen components from step 13 are: R5 = 1.43 k: R13 = 10 k: R4 = 17.4 k: (53) 8.15 Output OVLO Solve for ROV2: R17 = VHYSO = 20 PA 10V = 500 k: 20 PA (54) The closest standard resistor is 499 kΩ therefore VHYSO is: VHYSO = R17 x 20 PA = 499 k: x 20 PA = 9.98V (55) Solve for ROV1: R11 = 1.24V x 499 k: 1.24V x R17 = = 12.5 k: 50V - 620 mV VTURN-OFF - 1.24V (56) The closest standard resistor is 15.8 kΩ making VTURN-OFF: VTURN-OFF = VTURN-OFF = 1.24V x (R11 + R17) R11 1.24V x (12.4 k: + 499 k:) = 51.1V 12.4 k: (57) The chosen components from step 14 are: R11 = 12.4 k: R17 = 499 k: (58) 8.16 Soft-Start Solve for tSU: tSU = 168: x C9 + 36 k: x C10 + VO ILED x CO tSU = 168: x 2.2 PF + 36 k: x 1.0 PF + 21V x 40 PF 1A tSU = 37.2 ms (59) If tSU is less than tTSU, solve for tSU-SS-BASE: tSU-SS-BASE = 168: x C9 + 28 k: x C10 + VO ILED x CO tSU-SS-BASE = 168: x 2.2 PF + 28 k: x 1.0 PF + 21V x 40 PF 1A tSU-SS-BASE = 29.2 ms (60) Solve for CSS: (tTSU - tSU-SS-BASE) CSS = 20 k: = (40 ms - 29.2 ms) 20 k: = 540 nF (61) The chosen component from step 15 is: CSS = 0.47 PF (62) SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback AN-1967 LM3424 Buck-Boost Evaluation Board Copyright © 2009–2013, Texas Instruments Incorporated 13 Typical Waveforms 9 www.ti.com Typical Waveforms TA = +25°C, VIN = 24V and VO = 21V. 40 0.0 ILED (A) 0.5 ILED 20 -1.0 5 0 0 10 0.0 10 VDIM (V) VSW (V) 60 ILED (A) 1.0 1.0 ILED VSW VDIM 2 Ps/DIV Figure 4. Standard Operation TP1 Switch Node Voltage (VSW) LED Current (ILED) 4 ms/DIV Figure 5. 200Hz 50% PWM Dimming TP5 Dim Voltage (VDIM) LED Current (ILED) Alternate Designs Alternate designs with the LM3429 evaluation board are possible with very few changes to the existing hardware. The evaluation board FETs and diodes are already rated higher than necessary for design flexibility. The input UVLO, output OVP, input and output capacitance can remain the same for the designs shown below. These alternate designs can be evaluated by changing only R9, R10, and L1. Table 2 gives the main specifications for four different designs and the corresponding values for R9, R10, and L1. PWM dimming can be evaluated with any of these designs. Table 2. Alternate Design Specifications 14 Specification / Component Design 1 Design 2 Design 3 Design 4 VIN 10V - 45V 15V - 50V 20V - 55V 25V - 60V VO 14V 21V 28V 35V 700kHz fSW 600kHz 700kHz 500kHz ILED 2A 500mA 2.5A 1.25A R9 0.05Ω 0.2Ω 0.04Ω 0.08Ω R10 12.1 kΩ 10.2 kΩ 14.3 kΩ 10.2 kΩ L1 22µH 68µH 15µH 33µH AN-1967 LM3424 Buck-Boost Evaluation Board SNVA397A – August 2009 – Revised May 2013 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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