LM34904
www.ti.com
SNVS803E – APRIL 2012 – REVISED APRIL 2013
500mA Current Limited Power Switch
Check for Samples: LM34904
FEATURES
DESCRIPTION
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The LM34904 is a 0.5A PFET switch used to control
the input voltage of electronic devices. It is easily
integrated into system designs that have a 2.8V to
5.3V voltage rail. Besides the 0.4Ω PFET switch, the
LM34904 can be enabled or disabled by a logic
signal. The IC monitors the presence of a
downstream electronic device via a dedicated pin to
decide whether to turn on the PFET switch. A power
good signal generated by the IC can be used by
system control to determine the status of the switch.
The LM34904 also provides over-current and overtemperature protection. The IC comes in a tiny 6bump thin DSBGA package.
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Input Voltage of 2.8V to 5.3V
0.5A Maximum Switch Current
0.4Ω Typical Total On-Resistance
Load Detection
Enable/Disable
Switch On Indicator
Peak Current Limit
Thermal Shutdown
6-bump Thin DSBGA Package
APPLICATIONS
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Handsets, Tablets, Notebooks
Portable Devices
Typical Application Circuit
VCC Main: 2.8V to 5.3V
1.8V
220k
220k
VCC
GND
POK
B1
C1
A2
LM34904
PC
A1
B2
C2
ACC_PWR
VIN
Accessory
Device
ENABLE
ACC_DET
1M
Accessory
Detection
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012–2013, Texas Instruments Incorporated
LM34904
SNVS803E – APRIL 2012 – REVISED APRIL 2013
www.ti.com
Connection Diagram
Figure 1. Top View - 6-Bump Thin DSBGA Package
See Package Number YFQ
PIN DESCRIPTIONS
Name
Pin
Number
Function
VCC
A1
Power input of the PFET switch. It also provides power to the entire IC. Connect to the voltage rail that the
accessory device is expected to work off.
GND
B1
Common Ground (device substrate).
POK
C1
Open-drain PFET status indicator. When the PFET is off, this pin floats. When PFET is on, it is grounded.
ACC_DET
C2
Pull this pin low to tell the IC that the downstream accessory device is plugged in.
ENABLE
B2
When this pin is low, the PFET will be turned off and POK will be open-drained. Current limit circuitry will
also be disabled. The IC will be in a low-power state. This pin should be held low until VCC is established
to ensure proper initial state of internal logic. When ENABLE is high, the PFET switch will be allowed to
turn on.
ACC_PWR
A2
Power output terminal of the PFET switch. Connect to input rail of accessory device.
Truth Table (1)
Input
ACC_DET
TJ Limit
Exceeded
0
x
No
x
1
No
0 to 1
0
No
0 to 1
0
Yes
x
x
x
0
x
x
No
ENABLE
(1)
Output
Current Limit
Detected
2.8V < VCC < 5.3V
PFET Switch
Status
POK
No
Yes
Open
Open Drain
No
Yes
Open
Open Drain
No
Yes
On
Grounded
No
Yes
Current Limited
Grounded
Yes
2.2V < VCC < 5.3V
Open
Open Drain
2.2V < VCC < 2.8V
Open
Open Drain
Note: "x" stands for "don't care".
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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LM34904
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SNVS803E – APRIL 2012 – REVISED APRIL 2013
Absolute Maximum Ratings (1) (2)
VCC
-0.3V to 6V
ENABLE, POK, ACC_DET, ACC_PWR (3)
-0.3V to 6V
Junction Temperature (TJ)
+150°C
−65°C to +150°C
Storage Temperature Range
ESD Susceptibility, Human Body Model (4)
(1)
2kV
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and
associated test conditions, see the Electrical Characteristics table.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The voltages on these pins should never exceed VCC+0.3V.
The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD-22-A114.
(2)
(3)
(4)
Operating Ratings
VCC Voltage (1)
2.8V to 5.3V
Junction Temperature (TJ), LM34904
(1)
-40°C to +85°C
For VCC between 2.2V and 2.8V, if ENABLE is a logic low, the LM34904 will not turn on the PFET switch.
Electrical Characteristics
Unless otherwise stated, the following conditions apply: VCC = 3V. Limits in standard type are for TJ = 25°C only; limits in
boldfacetype apply over the operating junction temperature (TJ) range. Minimum and maximum limits are ensured through
test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C and are provided
for reference purposes only.
Symbol
Parameter
Conditions
VIL
Input Low Voltage, ACC_DET,
ENABLE
VIH
Input High Voltage, ACC_DET,
ENABLE
VIHS
Input Hysteresis, ACC_DET,
ENABLE
ILK
Input Current, ACC_DET, ENABLE ACC_DET, ENABLE between 0V and VCC
Min
Typ
Max
Units
0.45
V
1.35
V
55
mV
1
µA
0.005
1
µA
ISD
VCC Current in Shutdown Mode
VENABLE = 0V
VVCC = 5.3V
IQ
VCC Quiescent Current
VENABLE = 1.8V
VVCC = 5.3V, IACC_PWR = 0A
47
100
µA
RON
Total On Resistance Between
VCC and ACC_PWR Pins
VVCC = 2.8V to 5.3V
IACC_PWR = 0.5A
0.4
0.6
Ω
ILK_ACC
ACC_PWR Leakage Current
When PFET is Off
VACC_PWR = 0V to VCC
VVCC = 5.3V
VENABLE = 0V
1
µA
ILIMIT
PFET Switch Current Limit
VVCC = 2.8V to 5.3V
VACC_PWR = 0V
0.76
A
VPOK
POK Current Sink Capability
POK asserted. 1mA sink current
0.4
V
IPOK
POK Leakage Current
POK de-asserted
VPOK = 3.3V
1
µA
T1
ACC_DET Response Time
ACC_DET rising to either PFET or POK FET
turn-off
107
ns
T2
ENABLE Response Time
ENABLE rising to either PFET or POK FET
turn-on
10
µs
T3
Minimum ENABLE Cycle Time (1)
ACC_DET tied to ground. ENABLE logic high =
1.8V. VCC = 2.8V to 5.3V.
300
ns
(1)
0.50
0.59
If ENABLE toggles low from a high state, it needs to stay low for at least T3 long before toggling back to high. Otherwise the internal flipflop may not be set and the PFET switch may not turn on.
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LM34904
SNVS803E – APRIL 2012 – REVISED APRIL 2013
www.ti.com
Thermal Characteristics
Symbol
Description
Conditions
Typical Value
Unit
104
°C/W
θJA1
Junction-to-Ambient
Thermal Resistance
Mount device on a standard 4-layer 4" x 3" JEDEC board. Apply known
amount of power to the package. Measure junction temperature and
surrounding air temperature. No air flow. Refer to JESD51-7 for more
information.
θJA2
Junction-to-Ambient
Thermal Resistance
Mount device on a 2-layer 2.19" x 2.9" board. Copper thickness is 1 oz per
layer. No air flow. Power dissipation is 0.5W.
136
°C/W
TSD
Thermal Shutdown
Threshold
Raise TJ from below 120°C until POK is de-asserted. No load is connected
at ACC_PWR.
135
°C
4
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LM34904
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SNVS803E – APRIL 2012 – REVISED APRIL 2013
Typical Performance Characteristics
Unless indicated otherwise, VCC = 3.0V and TJ = 25°C.
Total ON Resistance vs Temperature
Total ON Resistance vs Switch Current
450
500
400
RON(m )
RON(m )
450
400
350
350
300
250
-40
300
-20
0
20
40
60
TEMPERATURE (°C)
80
0
100
Figure 2.
Total ON Resistance vs VCC
500
Current Limit vs Temperature
650
400
625
ILIMIT(mA)
RON(m )
400
Figure 3.
450
350
600
300
575
250
2.5
200
300
IACC_PWR(mA)
550
3.0
3.5
4.0
4.5
VCC (V)
5.0
5.5
-40
-20
0
20
40
60
TEMPERATURE (°C)
80
Figure 4.
Figure 5.
Input Logic High Threshold vs Temperature
Input Logic Low Threshold vs Temperature
1.1
1.1
VCC = 5.3V
1.0
1.0
0.8
VCC = 2.8V
0.7
0.8
0.7
0.6
VCC = 2.8V
0.6
0.5
-20
VCC = 5.3V
0.9
VIL(V)
0.9
0.5
0
20
40
60
80
Figure 6.
-20
0
20
40
60
TEMPERATURE (°C)
80
Figure 7.
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LM34904
SNVS803E – APRIL 2012 – REVISED APRIL 2013
www.ti.com
BLOCK DIAGRAM
APPLICATION HINTS
To turn on the PFET switch, both the ENABLE and the ACC_DET pins need to be asserted. In addition,
ACC_DET needs to be asserted no later than the rising edge of the ENABLE signal. De-assertion of either the
ENABLE or the ACC_DET will result in turned-off PFET switch and de-asserted POK signal.
To prevent a glitch in the otherwise asserted ACC_DET from keeping the FETs turned off, it is a good practice to
cycle the ENABLE following every falling edge in the ACC_DET signal. When cycling the ENABLE, make sure it
stays low for at least T3 long before toggling back high. If ENABLE logic high level is not 1.8V, make sure
ENABLE stays low for at least 1µs.
When laying out the PCB, try to keep the ENABLE and ACC_DET traces as short as possible and away from
noisy traces.
6
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Product Folder Links: LM34904
LM34904
www.ti.com
SNVS803E – APRIL 2012 – REVISED APRIL 2013
REVISION HISTORY
Changes from Revision D (April 2013) to Revision E
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Changed layout of National Data Sheet to TI format ............................................................................................................ 6
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM34904ITM/NOPB
ACTIVE
DSBGA
YFQ
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
L
LM34904ITMX/NOPB
ACTIVE
DSBGA
YFQ
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
L
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of