LM34917A
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SNOSAX7D – DECEMBER 2007 – REVISED MARCH 2013
LM34917A Ultra Small 33V, 1.25A Constant On-Time Buck Switching Regulator with
Intelligent Current Limit
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FEATURES
PACKAGE
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2
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Functional Input Voltage Range: 8V to 33V
DSBGA package
Input Over-Voltage Shutdown at ≊35V
Transient Capability to 50V
Integrated N-Channel buck switch
Valley current limit varies with VIN and VOUT to
reduce excessive inductor current
On-time is reduced when in current limit
Integrated start-up regulator
No loop compensation required
Ultra-Fast transient response
Maximum switching frequency: 2 MHz
Operating frequency remains nearly constant
with load current and input voltage variations
Programmable soft-start
Precision internal reference
Adjustable output voltage
Thermal shutdown
TYPICAL APPLICATIONS
•
•
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High Efficiency Point-Of-Load (POL) Regulator
Non-Isolated Buck Regulator
Secondary High Voltage Post Regulator
12-Bump DSBGA Package
DESCRIPTION
The LM34917A Step-Down Switching Regulator
features all the functions needed to implement a low
cost, efficient, buck bias regulator capable of
supplying at least 1.25A to the load. To reduce
excessive switch current due to the possibility of a
saturating inductor the valley current limit threshold
changes with input and output voltages, and the ontime is reduced when current limit is detected. This
buck regulator contains an N-Channel Buck Switch,
and is available in the 12 pin DSBGA package. The
constant on-time feedback regulation scheme
requires no loop compensation, results in fast load
transient
response,
and
simplifies
circuit
implementation. The operating frequency remains
constant with line and load variations due to the
inverse relationship between the input voltage and
the on-time. The valley current limit results in a
smooth transition from constant voltage to constant
current mode when current limit is detected, reducing
the frequency and output voltage, without the use of
foldback. Additional features include: VCC undervoltage lock-out, input over-voltage shutdown,
thermal shutdown, gate drive under-voltage lock-out,
and maximum duty cycle limit.
Basic Step Down Regulator
8V - 33V
Input
VIN
C1
VCC
C3
LM34917A
RON
BST
RON/SD
SHUT
DOWN
L1
C4
VOUT
SW
D1
SS
ISEN
C6
R3
C8
R1
C2
C7
FB
RTN
SGND
R2
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
SNOSAX7D – DECEMBER 2007 – REVISED MARCH 2013
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Connection Diagram
D1
SW
D2
D3
BST
D3
D2
D1
C3
VCC
C3
C2
C1
B3
SS
B3
B2
B1
A3
FB
A3
A2
A1
SW
VIN
C1
C2
VIN
B1
ISEN
B2
RON
A1
SGND
A2
RTN
Figure 1. Bump Side
Package Number YZR0012UNA
Figure 2. Top View
Package Number YZR0012UNA
PIN DESCRIPTIONS
Pin Number
Name
Description
A1
SGND
Sense Ground
Re-circulating current flows into this pin to the current sense
resistor.
Application Information
A2
RTN
Circuit Ground
Ground for all internal circuitry other than the current limit
detection.
A3
FB
Feedback input from the regulated
output
Internally connected to the regulation and over-voltage
comparators. The regulation level is 2.5V.
B1
ISEN
Current sense
The re-circulating current flows out of this pin to the freewheeling diode.
B2
RON/SD
On-time control and shutdown
An external resistor from VIN to this pin sets the buck switch
on-time. Grounding this pin shuts down the regulator.
B3
SS
Softstart
An internal current source charges an external capacitor to
2.5V, providing the softstart function.
C1,C2
VIN
Input supply voltage
Operating input range is 8.0V to 33V, with over-voltage
shutdown internally set at ≊35V. Transient capability is 50V.
C3
VCC
Output from the startup regulator
Nominally regulated at 7.0V. Connect a 0.1 µF capacitor from
this pin to RTN. An external voltage (8V to 14V) can be
applied to this pin to reduce internal dissipation. An internal
diode connects VCC to VIN.
D1,D2
SW
Switching Node
Internally connected to the buck switch source. Connect to
the inductor, diode, and bootstrap capacitor.
D3
BST
Boost pin for bootstrap capacitor
Connect a 0.022 µF capacitor from SW to this pin. The
capacitor is charged each off-time via an internal diode.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum Ratings (1) (2)
VIN to RTN
50V
BST to RTN
64V
SW to RTN (Steady State)
-1.5V
BST to VCC
50V
VIN to SW
50V
BST to SW
14V
VCC to RTN
14V
SGND to RTN
-0.3V to +0.3V
Current out of ISEN
See text
SS to RTN
-0.3V to 4V
All Other Inputs to RTN
ESD Rating
-0.3 to 7V
(3)
Human Body Model
2kV
Storage Temperature Range
-65°C to +150°C
Junction Temperature
150°C
(1)
(2)
(3)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Operating Ratings
(1)
VIN Voltage
8.0V to 33V
−40°C to + 125°C
Junction Temperature
(1)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
Electrical Characteristics
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the
following conditions apply: VIN = 12V, RON = 200kΩ. See (1) and (2).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
6.6
7.0
7.4
V
Start-Up Regulator, VCC
VCCReg
VCC regulated output
Vin > 9V
VIN-VCC dropout voltage
ICC = 0 mA,
VCC = UVLOVCC + 250 mV
VCC output impedance
(0 mA ≤ ICC ≤ 5 mA)
VCC current limit
UVLOVCC
(3)
1.3
V
VIN = 8V
150
Ω
VIN = 12V
0.75
VCC = 0V
11
mA
VCC under-voltage lockout
threshold
VCC increasing
5.45
V
UVLOVCC hysteresis
VCC decreasing
145
mV
UVLOVCC filter delay
100 mV overdrive
IIN operating current
Non-switching, FB = 3V
IIN shutdown current
RON/SD = 0V
3
µs
0.68
0.95
mA
85
160
µA
0.33
0.7
Ω
4
4.62
V
Switch Characteristics
(1)
(2)
(3)
Rds(on)
Buck Switch Rds(on)
ITEST = 200 mA
UVLOGD
Gate Drive UVLO
VBST - VSW Increasing
2.65
For detailed information on soldering DSBGA packages, refer to Application Note AN-1112 (SNVA009).
Typical specifications represent the most likely parametric norm at 25°C operation.
VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading
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Electrical Characteristics (continued)
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the
following conditions apply: VIN = 12V, RON = 200kΩ. See (1) and (2).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
UVLOGD hysteresis
450
mV
VSS
Pull-up voltage
2.5
V
ISS
Internal current source
11.6
µA
Restart threshold after OVP
shutdown
0.18
V
Softstart Pin
VRES
Current Limit
ILIM
Threshold
VIN = 8V, VFB = 2.4V
1.15
1.35
1.55
VIN = 30V, VFB = 2.4V
1.05
1.2
1.45
VIN = 30V, VFB = 1.0V
0.95
1.15
1.35
Response time
150
A
ns
On Timer
tON - 1
On-time (normal operation)
VIN = 10V, RON = 200 kΩ
2.1
tON - 2
On-time (normal operation)
VIN = 32V, RON = 200 kΩ
860
ns
tON - 3
On-time (current limit)
VIN = 10V, RON = 200 kΩ
1.13
µs
Shutdown threshold at RON/SD
Voltage at RON/SD rising
Shutdown Threshold hysteresis
Voltage at RON/SD falling
0.3
2.8
0.65
3.5
1.0
µs
V
40
mV
90
ns
Off Timer
tOFF
Minimum Off-time
Regulation and Over-Voltage Comparators (FB Pin)
VREF
FB regulation threshold
SS pin = steady state
2.445
FB over-voltage threshold
FB bias current
FB = 3V
2.50
2.550
V
2.9
V
10
nA
Input Over-Voltage Shutdown
VIN(OV)
Shutdown voltage threshold at
VIN
VIN increasing
33.0
34.8
36.9
V
Thermal Shutdown
TSD
Thermal shutdown temperature
Junction temperature rising
Thermal shutdown hysteresis
175
°C
20
°C
58
°C/W
Thermal Resistance
θJA
4
Junction to Ambient
0 LFPM Air Flow
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Typical Performance Characteristics
Unless otherwise specified the following conditions apply: TJ = 25°C
Efficiency at 1.5 MHz
Efficiency at 2 MHz
Figure 3.
Figure 4.
VCC vs. VIN
ON-Time vs. VIN and RON
10
7.5
RON = 600 k:
200 k:
7.0
FS = 94 kHz
ON-TIME (Ps)
FS = 350 kHz
6.5
VCC (V)
3.0
6.0
FS = 700 kHz
100 k:
400 k:
1.0
0.3
50 k:
5.5
0.1
5.0
6.5
7.0
7.5
8.0
8.5
5
9.0
10
15
20
VIN (V)
30
35
VIN (V)
Figure 5.
Figure 6.
Valley Current Limit Threshold vs. VFB and VIN
Voltage at the RON/SD Pin
1.5
3.0
RON/SD PIN VOLTAGE (V)
1.4
VALLEY CURRENT
LIMIT THRESHOLD (A)
25
VIN = 8V
1.3
15V
1.2
24V
33V
1.1
1.0
RON = 50k
100k
2.0
600k
200k
1.0
0
0
0.5
1.0
1.5
2.0
2.5
5
10
15
20
VFB (V)
VIN (V)
Figure 7.
Figure 8.
25
30
35
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Typical Performance Characteristics (continued)
Unless otherwise specified the following conditions apply: TJ = 25°C
VCC vs. ICC
ICC vs Externally Applied VCC
10
8
VIN
7
8 10V
8
6
VIN = 8V
4
ICC (mA)
VCC (V)
5
VIN = 9V
3
2
350 kHz
4
2
VCC Externally Loaded
1
700 kHz
6
FS = 94 kHz
FS = 350 kHz
0
0
0
2
4
6
8
10
7
12
8
9
10
11
12
ICC (mA)
APPLIED VCC (V)
Figure 9.
Figure 10.
13
14
Shutdown and Operating Current Into VIN
Figure 11.
6
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Typical Application Circuit and Block Diagram
Input
8V - 33V
LM34917A
VCC
C5
VCC
34.8V
RON
RON/SD
ON TIMER
RON
START
' Ton FINISH
C3
UVLO
0V SHUTDOWN
+
C1
GND
7V START-UP
REGULATOR
VIN
MINIMUM
OFF TIMER
START FINISH
0.65V
BST
THERMAL
SHUTDOWN
2.5V
SS
11.6 PA
Gate Drive SD
UVLO
VIN
C4
LOGIC
L1
LEVEL
SHIFT
Driver
C6
SW
FB
REGULATION
COMPARATOR
R3
C8
C7
D1
2.9V
OVER-VOLTAGE
COMPARATOR
CURRENT LIMIT
COMPARATOR
R1
+
-
RTN
VIN
FB
CL
Threshold
Adjust
RSENSE
+
ISEN
C2
41 m:
R2
SGND
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VOUT
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VIN
7.0V
UVLO
VCC
SW Pin
Inductor
Current
2.5V
SS Pin
VOUT
t1
t2
Figure 12. Startup Sequence
8
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FUNCTIONAL DESCRIPTION
The LM34917A Step Down Switching Regulator features all the functions needed to implement a low cost,
efficient buck bias power converter capable of supplying at least 1.25A to the load. This high voltage regulator
contains an N-Channel buck switch, is easy to implement, and is available in the DSBGA package. The
regulator’s operation is based on a constant on-time control scheme where the on-time is inversely proportional
to the input voltage. This feature results in the operating frequency remaining relatively constant with load and
input voltage variations. The feedback control scheme requires no loop compensation resulting in very fast load
transient response. The valley current limit scheme protects against excessively high currents if the output is
short circuited when VIN is high. To aid in controlling excessive switch current due to a possible saturating
inductor the valley current limit threshold changes with input and output voltages, and the on-time is reduced by
approximately 50% when current limit is detected. An over-voltage detection at VIN stops the circuit's switching
when the input voltage exceeds 34.8V. The LM34917A can be applied in numerous applications to efficiently
regulate down higher voltages. Additional features include: Thermal shutdown, VCC under-voltage lock-out, gate
drive under-voltage lock-out, and maximum duty cycle limit.
Control Circuit Overview
The LM34917A buck DC-DC regulator employs a control scheme based on a comparator and a one-shot ontimer, with the output voltage feedback (FB) compared to an internal reference (2.5V). If the FB voltage is below
the reference the buck switch is switched on for a time period determined by the input voltage and a
programming resistor (RON). Following the on-time the switch remains off until the FB voltage falls below the
reference, but for a time not less than the minimum off-time forced by the LM34917A. The buck switch is then
switched on for another on-time period.
When in regulation, the LM34917A operates in continuous conduction mode at heavy load currents and
discontinuous conduction mode at light load currents. In continuous conduction mode the inductor’s current is
always greater than zero, and the operating frequency remains relatively constant with load and line variations.
The minimum load current for continuous conduction mode is one-half the inductor’s ripple current amplitude.
The approximate operating frequency is calculated as follows:
fSW =
VOUT x (VIN ± 1.35V)
VIN x 1.16 x 10
-10
x (RON + 1.4k)
(1)
The buck switch duty cycle is equal to:
DC =
tON
tON + tOFF
= tON x fSW =
VOUT
VIN
(2)
In discontinuous conduction mode, where the inductor’s current reaches zero during the off-time forcing a longerthan-normal off-time, the operating frequency is lower than in continuous conduction mode, and varies with load
current. Conversion efficiency is maintained at light loads since the switching losses reduce with the reduction in
load and frequency. The approximate discontinuous operating frequency can be calculated as follows:
2
fSW =
VOUT x L1 x 1.48 x 10
RL x RON
20
2
(3)
where RL = the load resistance, and L1 is the circuit’s inductor.
The output voltage is set by the two feedback resistors (R1, R2 in the Block Diagram). The regulated output
voltage is calculated as follows:
VOUT = 2.5 x (R1 + R2) / R2
(4)
Output voltage regulation is based on supplying ripple voltage to the feedback input (FB pin) in phase with the
SW pin. The LM34917A requires a minimum of 25 mVp-p of ripple voltage at the FB pin. The ripple is generated
as a triangle wavefrom at the junction of R3 and C8 as the SW pin switches high and low, and fed to the FB pin
by C7.
If the voltage at FB rises above 2.9V, due to a transient at VOUT or excessive inductor current which creates
higher than normal ripple at VOUT, the internal over-voltage comparator immediately shuts off the internal buck
switch. The next on-time starts when the voltage at FB falls below 2.5V and the inductor current falls below the
current limits threshold.
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ON-Time Timer
The on-time for the LM34917A is determined by the RON resistor and the input voltage (VIN), calculated from:
tON =
1.16 x 10
-10
x (RON + 1.4 k:)
VIN - 1.35V
+ 100 ns
(5)
The inverse relationship with VIN results in a nearly constant frequency as VIN is varied. To set a specific
continuous conduction mode switching frequency (fSW), the RON resistor is determined from the following:
RON =
VOUT x (VIN - 1.35V)
VIN x 1.16 x 10-10 x fSW
-1.4k:
(6)
Equation 1, Equation 5 and Equation 6 are valid only during normal operation - i.e., the circuit is not in current
limit. When the LM34917A operates in current limit, the on-time is reduced by approximately 50%. This feature
reduces the peak inductor current which may be excessively high if the load current and the input voltage are
simultaneously high. This feature operates on a cycle-by-cycle basis until the load current is reduced and the
output voltage resumes its normal regulated value. Equation 1, Equation 5 and Equation 6 have a ±25%
tolerance.
Remote Shutdown
The LM34917A can be remotely shut down by taking the RON/SD pin below 0.65V. See Figure 13. In this mode
the SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the RON/SD
pin allows the circuit to resume operation after the SS pin voltage is below 0.18V. The voltage at the RON/SD pin
is normally between 1.4V and 3.5V, depending on VIN and the RON resistor.
VIN
Input
Voltage
RON
LM34917A
RON/SD
STOP
RUN
Figure 13. Remote Shutdown
Input Over-Voltage Shutdown
If the input voltage at VIN increases above 34.8V an internal comparator disables the buck switch and the ontimer, and grounds the soft-start pin. Normal operation resumes when the VIN voltage reduces below 34.8V, and
when the soft-start voltage (at the SS pin) has reduced below 0.18V.
Current Limit
Current limit detection occurs during the off-time by monitoring the recirculating current flowing out of the ISEN
pin. Referring to the Block Diagram, during the off-time the inductor current flows through the load, into SGND,
through the internal sense resistor, out of ISEN and through D1 to the inductor. If that current exceeds the
current limit threshold the current limit comparator output delays the start of the next on-time period. The next ontime starts when the current out of ISEN is below the threshold and the voltage at FB falls below 2.5V. The
operating frequency is typically lower due to longer-than-normal off-times.
The valley current limit threshold is a function of the input voltage (VIN) and the output voltage sensed at FB, as
shown in the graph “Valley Current Limit Threshold vs. VFB and VIN”. This feature reduces the inductor current’s
peak value at high line and load. To further reduce the inductor’s peak current, the next cycle’s on-time is
reduced by approximately 50% if the voltage at FB is below its threshold when the inductor current reduces to
the current limit threshold (VOUT is low due to current limiting).
10
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Figure 14 illustrates the inductor current waveform during normal operation and in current limit. During the first
“Normal Operation” the load current is IOUT1, the average of the ripple waveform. As the load resistance is
reduced, the inductor current increases until it exceeds the current limit threshold. During the “Current Limited”
portion of Figure 14, the current limit threshold lowers since the high load current causes VOUT (and the voltage
at FB) to reduce. The on-time is reduced by approximately 50%, resulting in lower ripple amplitude for the
inductor’s current. During this time the LM34917A is in a constant current mode, with an average load current
equal to the current limit threshold + ΔI/2 (IOUT2). Normal operation resumes when the load current is reduced to
IOUT3, allowing VOUT, the current limit threshold, and the on-time to return to their normal values. Note that in the
second period of “Normal Operation”, even though the inductor’s peak current exceeds the current limit threshold
during part of each cycle, the circuit is not in current limit since the current falls below the threshold before the
feedback voltage reduces to its threshold to initiate the next on-time.
The peak current allowed through the buck switch, and the ISEN pin, is 2A, and the maximum allowed average
current is 1.5A.
Inductor Current
IOUT2
Current Limit
Threshold
IOUT3
TON
'I
2
IOUT1
Feedback
Voltage
@ FB Pin
TON
2.5V
Normal
Operation
Load
Current
Increases
Current
Limited
Normal
Operation
Load Current
Decreases
Figure 14. Inductor Current - Normal and Current Limit Operation
N - Channel Buck Switch and Driver
The LM34917A integrates an N-Channel buck switch and associated floating high voltage gate driver. The gate
driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.022
µF capacitor (C4) connected between BST and SW provides the voltage to the driver during the on-time. During
each off-time, the SW pin is at approximately -1V, and C4 is recharged for the next on-time from VCC through the
internal diode. The minimum off-time ensures a minimum time each cycle to recharge the bootstrap capacitor.
Softstart
The softstart feature allows the converter to gradually reach a steady state operating point, thereby reducing
start-up stresses and current surges. Upon turn-on, after VCC reaches the under-voltage threshold, an internal
11.6 µA current source charges up the external capacitor at the SS pin to 2.5V (t2 in Figure 12). The ramping
voltage at SS (and the non-inverting input of the regulation comparator) ramps up the output voltage in a
controlled manner.
An internal switch grounds the SS pin if VCC is below the under-voltage lockout threshold, if the RON/SD pin is
grounded, or if VIN exceeds the overvoltage threshold.
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Thermal Shutdown
The LM34917A should be operated so the junction temperature does not exceed 125°C. If the junction
temperature increases above that, an internal Thermal Shutdown circuit activates (typically) at 175°C, taking the
controller to a low power reset state by disabling the buck switch. This feature helps prevent catastrophic failures
from accidental device overheating. When the junction temperature reduces below 155°C (typical hysteresis =
20°C), normal operation resumes.
Applications Information
EXTERNAL COMPONENTS
The procedure for calculating the external components is illustrated with the following design example. Referring
to the Block Diagram, the circuit is to be configured for the following specifications:
• VOUT = 5V
• VIN = 8V to 33V
• Minimum load current = 200 mA
• Maximum load current = 1000 mA
• Switching Frequency = 1.5 MHz
• Soft-start time = 5 ms
• Output voltage ripple level: Minimum
R1 and R2: These resistors set the output voltage. The ratio of the feedback resistors is calculated from:
R1/R2 = (VOUT/2.5V) - 1
(7)
For this example, R1/R2 = 1. R1 and R2 should be chosen from standard value resistors in the range of 1.0 kΩ –
10 kΩ which satisfy the above ratio. For this example, 2.49 kΩ is chosen for R1 and R2.
RON: This resistor sets the on-time, and (by default) the switching frequency. Since the maximum frequency is
limited by the minimum off-time forced by the LM34917A, first check that the desired frequency is less than:
VIN - VOUT
fSW <
VIN x 105 ns
= 3.57 MHz at VIN = 8V
(8)
The RON resistor is calculated from Equation 6 using the minimum input voltage:
RON =
VOUT x (VIN(min) - 1.35V)
VIN(min) x 1.16 x 10
-10
- 1.4 k: = 22.49 k:
x fSW
(9)
Equation 5 is used to verify that this value resistor does not set an on-time less than 120 ns at maximum input
voltage. A standard value 22.1 kΩ resistor is used, resulting in a nominal frequency of 1.49 MHz. The minimum
on-time is 188 ns at Vin = 33V, and the maximum on-time is 510 ns at Vin = 8V.
L1: The main parameter affected by the inductor is the inductor current ripple amplitude (IOR). The minimum load
current is used to determine the maximum allowable ripple in order to maintain continuous conduction mode,
where the lower peak does not reach 0 mA. This is not a requirement of the LM34917A, but serves as a
guideline for selecting L1. For this example, the maximum ripple current should be less than:
IOR(MAX) = 2 x IOUT(min) = 400 mAp-p
(10)
For other applications, if the minimum load current is zero, use 20% of IOUT(max) for IOUT(min) in Equation 10. The
ripple amplitude calculated in Equation 10 is then used in the following equation:
L1(min) =
ton(min) x (VIN(max) ± VOUT)
IOR(max)
= 13.2 PH
(11)
A standard value 15 µH inductor is selected. The maximum ripple amplitude, which occurs at maximum VIN,
calculates to 351 mA p-p, and the peak current is 1175 mA at maximum load current. Ensure the selected
inductor is rated for this peak current.
C2: C2 should typically be no smaller than 3.3 µF, although that is dependent on the frequency and the desired
output characteristics. C2 should be a low ESR good quality ceramic capacitor. Experimentation is usually
necessary to determine the minimum value for C2, as the nature of the load may require a larger value. A load
which creates significant transients requires a larger value for C2 than a non-varying load.
12
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C1 and C5: C1’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple
at VIN, since it is assumed the voltage source feeding VIN has some amount of source impedance.
At maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower
peak of the inductor’s ripple current, ramps up to the upper peak, then drops to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, C1 must supply this average load
current during the maximum on-time, without letting the voltage at VIN drop below ≊7.5V. The minimum value for
C1 is calculated from:
C1 =
IOUT (max) x tON
'V
= 1.02 PF
(12)
where tON is the maximum on-time, and ΔV is the allowable ripple voltage at VIN (0.5V at VIN = 8V). C5’s purpose
is to minimize transients and ringing due to long lead inductance leading the VIN pin. A low ESR 0.1 µF ceramic
chip capacitor must be located close to the VIN and RTN pins.
C3: The capacitor at the VCC pin provides noise filtering and stability for the VCC regulator. C3 should be no
smaller than 0.1 µF, and should be a good quality, low ESR ceramic capacitor. C3’s value, and the VCC current
limit, determine a portion of the turn-on-time (t1 in Figure 12).
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies a surge current to charge the buck switch gate at each turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
C6: The capacitor at the SS pin determines the soft-start time, i.e. the time for the output voltage to reach its final
value (t2 in Figure 12). The capacitor value is determined from:
C6 =
t2 x 11.6 PA
= 0.023 PF
2.5V
(13)
R3, C7, C8: The ripple amplitude at VOUT is determined by C2’s characteristics and the inductor’s ripple current
amplitude, and typically ranges from 5 mV to 30 mV over the Vin range. Since the LM34917A’s regulation
comparator requires a minimum of 25 mVp-p ripple at the FB pin, these three components are added to generate
and provide the necessary ripple to FB in phase with the waveform at SW. R3 and C8 are chosen to generate a
sawtooth waveform at their junction, and that voltage is AC coupled to the FB pin via C7. To determine the
values for R3, C7 and C8, the following procedure is used:
Calculate VA = VOUT – (VSW x (1 – (VOUT/VIN(min)))
(14)
where VSW is the absolute value of the voltage at the SW pin during the off-time (typically 1V). VA, the DC
voltage at the R3/C8 junction, calculates to 4.63V, and is used in the next equation.
R3 x C8 =
(VIN (min) - VA) x tON
'V
= 17.5 X 10-6
(15)
where tON is the maximum on-time (at minimum input voltage), and ΔV is the desired ripple amplitude at the
R3/C8 junction, typically 100 mV. R3 and C8 are chosen from standard value components to satisfy the above
product. For this example, 3300 pF is chosen for C8, and 5.23 kΩ is chosen for R3. C7 is chosen large
compared to C8, typically 0.1 µF.
D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode
must be rated for the maximum input voltage, the maximum load current, and the peak current which occurs
when the current limit and maximum ripple current are reached simultaneously. The diode’s average power
dissipation is calculated from:
PD1 = VF x IOUT x (1-D)
(16)
where VF is the diode’s forward voltage drop, and D is the on-time duty cycle.
FINAL CIRCUIT
The final circuit is shown in Figure 15, and its performance is shown in Figure 16 and Figure 17. Current limit
measured approximately 1.34A at Vin = 8V, and 1.27A at Vin = 33V. The output ripple amplitude measured 4
mVp-p at Vin = 8V, and 14 mVp-p at Vin = 33V.
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LM34917A
SNOSAX7D – DECEMBER 2007 – REVISED MARCH 2013
8V to 33V
Input
C5
0.1 PF
C1
2 PF
www.ti.com
VIN
VCC
C3
0.1 PF
LM34917A
BST
RON
C4
0.022 PF
22.1 k:
L1 15 PH
R3
SW
VOUT
5V
C8
RON/SD
SHUT
DOWN
C6
0.022 PF
ISEN
SS
RTN
FB
D1
5.23 k:
3300 pF
C7
0.1 PF
SGND
R1
2.49 k:
C2
20 PF
R2
2.49 k:
Figure 15. Example Circuit
Figure 16. Efficiency vs. Load Current and VIN (Circuit of Figure 15)
Figure 17. Frequency vs. VIN (Circuit of Figure 15)
ALTERNATE OUTPUT RIPPLE CONFIGURATIONS
For applications which can accept higher levels of ripple at VOUT, the following configurations are simpler and a
bit more economical.
a) Alternate #1: In Figure 18, R3, C7 and C8 are removed, and Cff and R4 are installed, resulting in a higher
ripple level than the circuit of Figure 15. Ripple is created at VOUT by the inductor’s ripple current passing through
R4. That ripple voltage is AC coupled to the FB pin through Cff, allowing the minimum ripple at VOUT to be set at
25 mVp-p. The minimum ripple current amplitude (IOR(min)) is calculated by re-arranging Equation 11 using tON(max)
and VIN(min). The minimum value for R4 is calculated from:
R4 =
14
25 mV
IOR (min)
(17)
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The next larger standard value resistor should be selected for R4 to allow for tolerances. The minimum value for
Cff is determined from:
Cff =
tON (max)
(R1//R2)
(18)
The next larger standard value capacitor should be used for Cff.
L1
SW
VOUT
LM34917A
Cff
R1
R4
FB
R2
C2
Figure 18. Reduced Ripple Configuration
b) Alternate #2: In Figure 19, R3, C7 and C8 are removed, and R4 is installed, resulting in a higher ripple level
than the circuits of Figure 15 and Figure 18. Ripple is created at VOUT by the inductor’s ripple current passing
through R4. That ripple voltage is coupled to the FB pin through the feedback resistors (R1, R2). Since the
LM34917A requires a minimum of 25 mVp-p ripple at the FB pin, the ripple required at VOUT is higher than 25
mVp-p by the gain of the feedback resistors. The minimum ripple current (IOR(min)) is calculated by re-arranging
Equation 11 using tON(max) and VIN(min). The minimum value for R4 is calculated from:
R4(min) =
25 mV x (R1 + R2)
R2 x IOR (min)
(19)
The next larger standard value resistor should be used for R4.
L1
SW
LM34917A
VOUT
R1
R4
FB
R2
C2
Figure 19. Maximum Ripple Configuration
c) Alternate minimum ripple configuration: The circuit in Figure 20 is the same as that in Figure 19, except
the output voltage is taken from the junction of R4 and C2. The ripple at VOUT is determined by the inductor’s
ripple current and C2’s characteristics. However, R4 slightly degrades the load regulation. This circuit may be
suitable if the load current is fairly constant. R4 is calculated as described in Alternate #2 above.
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LM34917A
SNOSAX7D – DECEMBER 2007 – REVISED MARCH 2013
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L1
SW
LM34917A
R1
R4
FB
VOUT
R2
C2
Figure 20. Alternate Minimum Output Ripple Configuration
Minimum Load Current
The LM34917A requires a minimum load current of 1 mA. If the load current falls below that level, the bootstrap
capacitor (C4) may discharge during the long off-time, and the circuit will either shutdown, or cycle on and off at
a low frequency. If the load current is expected to drop below 1 mA in the application, R1 and R2 should be
chosen low enough in value so they provide the minimum required current at nominal VOUT.
PC BOARD LAYOUT
Refer to application note AN-1112 for PC board guidelines for the DSBGA package.
The LM34917A regulation, over-voltage, and current limit comparators are very fast, and respond to short
duration noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be
as neat and compact as possible, and all of the components must be as close as possible to their associated
pins. The two major current loops have currents which switch very fast, and so the loops should be as small as
possible to minimize conducted and radiated EMI. The first loop is that formed by C1, through the VIN to SW
pins, L1, C2, and back to C1.The second current loop is formed by D1, L1, C2 and the SGND and ISEN pins.
The power dissipation within the LM34917A can be approximated by determining the total conversion loss (PIN POUT), and then subtracting the power losses in the free-wheeling diode and the inductor. The power loss in the
diode is approximately:
PD1 = Iout x VF x (1-D)
(20)
where Iout is the load current, VF is the diode’s forward voltage drop, and D is the on-time duty cycle. The power
loss in the inductor is approximately:
PL1 = Iout2 x RL x 1.1
(21)
where RL is the inductor’s DC resistance, and the 1.1 factor is an approximation for the AC losses. If it is
expected that the internal dissipation of the LM34917A will produce excessive junction temperatures during
normal operation, good use of the PC board’s ground plane can help to dissipate heat. Additionally the use of
wide PC board traces, where possible, can help conduct heat away from the IC. Judicious positioning of the PC
board within the end product, along with the use of any available air flow (forced or natural convection) can help
reduce the junction temperatures.
16
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SNOSAX7D – DECEMBER 2007 – REVISED MARCH 2013
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM34917ATL/NOPB
ACTIVE
DSBGA
YZR
12
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
SRHA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
