LM34930
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SNVS571B – MAY 2008 – REVISED APRIL 2013
Ultra Small 33V, 1A Constant On-Time Buck Switching Regulator with Intelligent Current
Limit
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FEATURES
DESCRIPTION
•
•
•
•
•
•
•
The LM34930 constant On-Time Step Down
Switching Regulator features all the functions needed
to implement a low cost, efficient, buck bias regulator
capable of supplying in excess of 1A load current.
This high voltage regulator contains an N-Channel
Buck Switch, and is available in a DSBGA bumped
package. The constant on-time regulation principle
requires no loop compensation, results in fast load
transient
response,
and
simplifies
circuit
implementation. The operating frequency remains
constant with line and load. The valley current limit
results in a smooth transition from constant voltage to
constant current mode when current limit is detected
without the use of current limit foldback. To reduce
the possibility of saturating the inductor the valley
current limit threshold reduces as the input voltage
increases, and the on-time is reduced when current
limit is detected. Additional features include: Overvoltage indicator, Input over-voltage shutdown, Vcc
under-voltage lock-out, thermal shutdown, and
maximum duty cycle limiting.
1
2
•
•
•
•
•
•
•
Operating Input Voltage Range: 8V to 33V
Input Over-Voltage Shutdown at 36V
Input Absolute Maximum Rating of 44V
Integrated 1A N-Channel Buck Switch
Adjustable Output Voltage From 2.5V
Switching Frequency Adjustable to 2 MHz
Switching Frequency Remains Nearly
Constant With Load Current and Input Voltage
Ultra-Fast Transient Response
No Loop Compensation Required
Adjustable Soft-Start Timing
Thermal Shutdown
Precision 2% Feedback Reference
Input Over-Voltage Indicator at 19V
Current Limit Scheme Helps Prevent Inductor
From Saturation in Load Fault Conditions
PACKAGE
•
DSBGA-12, 1.77 mm x 2.1 mm
Typical Application, Basic Step-Down Regulator
8V - 33V
Input
VIN
BST
C4
C1
LM34930
RT
L1
SW
D1
RT
R4
VOUT
ISEN
nOV
OV
C6
SS
R1
C2
C5
FB
VCC
GND
R2
C3
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM34930
SNVS571B – MAY 2008 – REVISED APRIL 2013
www.ti.com
Connection Diagram
D1
D2
D3
SW
SW
BST
C1
C2
C3
VIN
VIN
VCC
B1
B2
B3
ISEN
RT
SS
A1
A2
A3
SGND
nOV
FB
Figure 1. Bump Side
D3
D2
D1
C3
C2
C1
B3
B2
B1
A3
A2
A1
Figure 2. Top View
PIN DESCRIPTIONS
2
Pin No.
Name
Description
Application Information
A1
GND
Ground
Ground for all internal circuitry
A2
nOV
Input over-voltage indicator
Open drain output switches low when Vin exceeds the over-voltage
indicator threshold
A3
FB
Output voltage feedback
Internally connected to the regulation comparator. The regulation level is
2.52V.
B1
ISEN
Current sense
The re-circulating current flows out of this pin to the free-wheeling diode.
B2
RT
On-time control
An external resistor from VIN to this pin sets the buck switch on-time,
and the switching frequency.
B3
SS
Soft-Start
An internal current source charges an external capacitor to provide the
soft-start function.
C1, C2
VIN
Input supply voltage
Operating input range is 8V to 33V, with over-voltage shutdown
internally set at 36V. Absolute maximum transient capability is 44V.
C3
VCC
Output of the internal bias regulator
Nominally regulated at 7V.
D1, D2
SW
Switching node
Internally connected to the buck switch source. Connect to the external
inductor, free wheeling diode, and bootstrap capacitor.
D3
BST
Bootstrap capacitor connection of the
buckswitch gate driver
Connect a 0.022 µF capacitor from SW to this pin. The capacitor is
charged during the buck switch off-time via an internal diode.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
VIN to GND
44V
BST to GND
52V
SW to GND (Steady State)
-1.5V to 44V
BST to SW
14V
VCC to GND
-0.3V to 8V
All Other Inputs to GND
-0.3 to 7V
Current out of ISEN
(See text)
ESD Rating (3)
Human Body Model
2kV
Storage Temperature Range
-65°C to +150°C
Junction Temperature
(1)
(2)
(3)
150°C
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Operating Ratings (1)
VIN Voltage
8V to 33V
−40°C to + 125°C
Junction Temperature
(1)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical Characteristics.
Electrical Characteristics
Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the Operating Junction
Temperature (TJ) range of −40°C to + 125°C. Minimum and Maximum limits are specified through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes
only. Unless otherwise stated the following conditions apply: VIN = 12V, RT = 50 kΩ.
Symbol
Parameter
Start-Up Regulator, VCC
VCCReg
UVLOVCC
IQ
Conditions
Min
Typ
Max
Units
6.6
7.0
7.4
V
(1)
VCC regulated voltage
VIN - VCC dropout voltage
ICC = 0 mA,
VCC = UVLOVCC + 250 mV
1.3
V
VCC output impedance
VIN = 8V
155
Ω
VCC current limit
VCC = 0V
15
mA
VCC under-voltage lockout threshold
VCC increasing
5.25
V
UVLOVCC hysteresis
VCC decreasing
150
mV
UVLOVCC filter delay
100 mV overdrive
IIN operating current
Non-switching, FB = 3V
2
µs
0.8
1.5
mA
0.33
0.7
Ω
3.7
4.5
V
Switch Characteristics
Rds(on)
Buck Switch Rds(on)
UVLOGD
Gate Drive UVLO
ITEST = 200 mA
2.7
UVLOGD hysteresis
300
mV
Softstart Pin
VSS
Pull-up voltage
2.52
V
ISS
Internal current source
10
µA
Shutdown Threshold
70
mV
VSS-SH
(1)
SS open
VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading
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Electrical Characteristics (continued)
Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the Operating Junction
Temperature (TJ) range of −40°C to + 125°C. Minimum and Maximum limits are specified through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes
only. Unless otherwise stated the following conditions apply: VIN = 12V, RT = 50 kΩ.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VIN = 8V
0.95
1.15
1.35
A
VIN = 30V
0.90
1.1
1.30
Current Limit
ILIM
Threshold
Resistance from ISEN to SGND
98
mΩ
Over-Voltage Indicator
nOVTH
Threshold voltage at VIN
VIN increasing
17.5
19
20.0
V
nOVHYS
Threshold hysteresis
nOVVOL
Output low voltage
InoV = 1 mA, VIN = 22V
100
200
mV
nOVLKG
Off state leakage
VnoV = 7V
0.1
tON - 1
On-time
VIN = 10V, RT = 50 kΩ
tON - 2
On-time
VIN = 33V, RT = 50 kΩ
127
ns
tON - 3
On-time (current limit)
VIN = 10V, RT = 50 kΩ
150
ns
90
ns
1.95
V
µA
On Timer
190
292
430
ns
Off Timer
tOFF
Minimum Off-time
Regulation Comparator (FB Pin)
VREF
FB regulation threshold
SS Pin = steady state
2.470
FB bias current
2.52
2.575
1
V
nA
Input Over-voltage Shutdown
VIN(OV)
VIN(OV)-HYS
Threshold voltage at VIN
VIN increasing
Hysteresis
34.0
36
38.3
V
0.4
V
155
°C
20
°C
65
°C/W
Thermal Shutdown
TSD
Thermal shutdown
TJ increasing
Thermal shutdown hysteresis
Thermal Resistance
θJA
(2)
4
Junction to Ambient
0 LFPM Air Flow
JEDEC 4 layer board (2)
JEDEC test board description can be found in JESD 51-7.
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Typical Performance Characteristics
Efficiency at 1.5 MHz
Efficiency at 2 MHz
Figure 3.
Figure 4.
VCC vs VIN
VCC vs ICC
Figure 5.
Figure 6.
ON-TIME vs VIN and RT
Voltage at the RT Pin
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
6
Shutdown Current into VIN
Operating Current into VIN
Figure 9.
Figure 10.
Current Limit Valley Threshold vs VIN
nOV Low Voltage vs Sink Current
Figure 11.
Figure 12.
Reference Voltage vs Temperature
Current Limit Threshold vs Temperature
Figure 13.
Figure 14.
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Typical Performance Characteristics (continued)
VCC Voltage vs Temperature
On-Time vs Temperature
Figure 15.
Figure 16.
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LM34930
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TYPICAL APPLICATION CIRCUIT AND BLOCK DIAGRAM
8V to 33V
VIN
LM34930
7V REGULATOR
Input
C1 C7
Over Voltage
Indicator
RT
Over Voltage
Shutdown
19V/17V
CL
VCC
UVLO
VCC
36V
C3
RT
OV
ON TIMER
R4
OFF TIMER
FINISH START
nOV
BST
START FINISH
2.52V
Gate
Drive
UVLO
10
PA
SS
SD
VIN
C4
LOGIC
C5
LEVEL
SHIFT
THERMAL
SHUTDOWN
CL
D1
FB
VDD
REGULATION
COMPARATOR
CURRENT LIMIT
COMPARATOR
Current Limit
Threshold Adjust
+
-
VIN
VOUT
L1
SW
ISEN
+
R1
C6
R3
C2
GND
R2
35 mV
VIN
7.0V
UVLO
VCC
SW Pin
Inductor
Current
2.52V
SS Pin
VOUT
t1
t2
Figure 17. Start Up Sequence
8
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FUNCTIONAL DESCRIPTION
The LM34930 Constant On-Time Step Down Switching Regulator features all the functions needed to implement
a low cost, efficient buck bias power converter capable of supplying at least 1.0A to the load. This high voltage
regulator contains an N-Channel buck switch, is easy to implement, and is available in a 12 bump DSBGA
package. The regulator’s operation is based on a constant on-time control principle where the on-time is
inversely proportional to the input voltage. This feature results in the operating frequency remaining relatively
constant with load and input voltage variations. The constant on-time feedback control principle requires no loop
compensation resulting in very fast load transient response. The valley current limit detection results in a smooth
transition from constant voltage to constant current when current limit is reached. To aid in controlling excessive
switch current due to a possible saturating inductor the valley current limit threshold reduces as the input voltage
increases, and the on-time is reduced by ≊50% when current limit is detected.
The LM34930 can be applied in numerous applications to efficiently step down higher voltages in non-isolated
applications. Additional features include: Thermal shutdown, VCC under-voltage lock-out, gate driver undervoltage lock-out, maximum duty cycle limiting, input over-voltage shutdown, and input over-voltage indicator.
Control Circuit Overview
The LM34930 buck regulator employs a control principle based on a comparator and a one-shot on-timer, with
the output voltage feedback (FB) compared to an internal reference (2.52V). If the FB voltage is below the
reference the buck switch is switched on for the one-shot timer period which is a function of the input voltage and
the programming resistor (RT). Following the on-time the switch remains off until the FB voltage falls below the
reference, but never less than the minimum off-time forced by the off-time one-shot timer. When the FB pin
voltage falls below the reference and the off-time one-shot period expires, the buckswitch is then turned on for
another on-time one-shot period.
When in regulation, the LM34930 operates in continuous conduction mode at heavy load currents and
discontinuous conduction mode at light load currents. In continuous conduction mode the inductor’s current is
always greater than zero, and the operating frequency remains relatively constant with load and line variations.
The minimum load current for continuous conduction mode is one-half the inductor’s ripple current amplitude.
The approximate operating frequency is calculated as follows:
FS =
VOUT x (VIN - 0.8V)
[(4.15 x 10
-11
x (RT + 0.5 k)) + ((VIN - 0.8V) x 65 ns)] x VIN
(1)
The buck switch duty cycle is approximately equal to:
tON
VOUT
= tON x FS =
VIN
tON + tOFF
DC =
(2)
In discontinuous conduction mode, the inductor’s current reaches zero during the off-time because of the longerthan-normal off-time. The operating frequency is lower than in continuous conduction mode, and varies with load
current. Conversion efficiency is maintained at light loads since the switching losses are reduced with the
reduction in load and frequency. The approximate discontinuous operating frequency can be calculated as
follows:
2
FS =
VOUT x L1 x 1.16 x 10
21
2
RL x R T
where
•
•
RL = the load resistance
L1 is the circuit’s inductor
(3)
The output voltage is set by the two feedback resistors (R1, R2 in the Block Diagram). The regulated output
voltage is calculated as follows:
VOUT = 2.52 x (R1 + R2) / R2
(4)
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Output voltage regulation requires a minimum of 25 mVp-p ripple voltage be supplied to the feedback pin (FB). In
the typical application circuit shown with the Block Diagram, ripple is generated by the inductor’s ripple current
passing through R3 in series with the output capacitor. The output ripple is passed to the FB pin by C6, avoiding
attenuation by resistors R1 and R2.
On-Time Timer
The on-time for the LM34930 is determined by the RT resistor and the input voltage (VIN), calculated from:
tON =
4.15 x 10
-11
x (RT + 0.5 k)
VIN - 0.8V
+ 65 ns
(5)
The inverse relationship with VIN results in a nearly constant frequency as VIN is varied. To set a specific
continuous conduction mode switching frequency (FS), the RT resistor is determined from the following:
RT =
(VIN - 0.8V)
VOUT
- 65 ns x
- 0.5 k:
VIN x FS
4.15 x 10-11
(6)
The on-time must be chosen greater than 90 ns for proper operation. Equation 1, Equation 5, and Equation 6 are
valid only when the regulator is not in current limit. When the LM34930 operates in current limit, the on-time is
reduced by ≊50%. This feature reduces the peak inductor current which may be excessively high if the load
current and the input voltage are simultaneously high. This feature operates on a cycle-by-cycle basis until the
load current is reduced and the output voltage resumes its normal regulated value.
The maximum continuous current into the RT pin must be less than 2 mA. For high frequency applications, the
maximum switching frequency is limited at the maximum input voltage by the minimum on-time one-shot period.
At minimum input voltage the maximum switching frequency is limited by the minimum off-time one-shot period,
which may prevent achievement of the proper duty cycle.
Current Limit
Current limit detection occurs during the off-time by monitoring the recirculating diode current flowing out of the
ISEN pin. Referring to the Block Diagram, during the off-time the inductor current flows through the load, into the
GND pin, through the internal sense resistor, out of ISEN and through D1 to the inductor. If that current exceeds
the current limit threshold the current limit comparator delays the start of the next on-time period. The next ontime starts when the current out of ISEN reduces to the threshold and the voltage at FB is below 2.52V. The
operating frequency is typically lower in the current limited condition due to longer-than-normal off-times.
The valley current limit threshold is a function of the input voltage (VIN) as shown in the graph “Current Limit
Valley Threshold vs. VIN”. This feature reduces the inductor current’s peak value at high line and load. To further
reduce the inductor’s peak current, the next on-time after current limit detection is reduced by ≊50% if the voltage
at the FB comparator is below its threshold when the inductor current falls below the current limit threshold (VOUT
is low due to current limiting).
Figure 18 illustrates the inductor current waveform during normal operation and in current limit. During the first
“Normal Operation” interval the load current is IO1, the average of the inductor current waveform. As the load
resistance is reduced, the inductor current increases until the lower peak of the inductor ripple current exceeds
the current limit threshold. During the “Current Limited” portion of Figure 18, each on-time is reduced by ≊50%,
resulting in lower ripple amplitude for the inductor’s current. During this time the LM34930 is in a constant current
mode with an average load current equal to the current limit threshold plus half the ripple current (IOCL), and the
output voltage is below the normal regulated value. Normal operation resumes when the load current is reduced
to IO2, allowing VOUT and the on-time to return to their normal values. Note that in the second period of “Normal
Operation”, even though the inductor’s peak current exceeds the current limit threshold during part of each cycle,
the circuit is not in current limit since the inductor current falls below the current limit threshold during each off
time.
The peak current allowed through the buck switch, and the ISEN pin, is 2A, and the maximum allowed average
current is 1.5A.
10
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IPK
IOCL
Current
Limit
Threshold
'I
Io2
Inductor Current
Io1
Voltage at FB Pin
2.5V
Normal Operation
Load
Current
Increases
Current Limited
Load
Current
Decreases
Normal
Operation
Figure 18. Inductor Current - Normal and Current Limit Operation
Startup Regulator, VCC
The startup bias regulator is integral to the LM34930. The input pin (VIN) can be connected directly to the main
power source, and has transient capability to 44V. The VCC output is regulated at 7.0V, and is current limited to
approximately 15 mA. Upon power up, the regulator sources current into the external capacitor at VCC. When
the voltage on the VCC pin reaches the under-voltage lock-out (UVLO) threshold, the buck switch is enabled and
the Soft-start pin is released to allow the Soft-start capacitor to charge. The minimum input voltage is determined
by the regulator’s dropout voltage, the VCC UVLO falling threshold, and the switching frequency. When VCC falls
below the falling threshold the VCC UVLO activates to shut off the buck switch.
Over-Voltage Indicator
The nOV pin, an open drain logic output, switches low when the voltage at VIN exceeds 19V. The over-voltage
indicator comparator provides 1.95V hysteresis to reject noise and ripple on the VIN pin. A pull-up resistor is
required at the nOV output pin to a voltage that does not exceed 7 volts. The pull-up voltage can exceed the
voltage at VIN. When nOV is low, the current into the pin must not exceed 10 mA.
Input Over-Voltage Shutdown
If the input voltage at VIN increases above 36V an internal comparator disables the buck switch, and grounds the
soft-start pin. The over-voltage shutdown comparator provides 400 mV hysteresis to reject noise and ripple on
the VIN pin. Normal operation resumes when the voltage at VIN is reduced below the lower threshold.
N-Channel Buck Switch and Driver
The LM34930 integrates an N-Channel buck switch and associated floating high voltage gate driver. The gate
driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.022
µF capacitor (C4) connected between BST and SW provides the voltage to the driver during the on-time. During
each off-time, the SW pin is at approximately -1V, and C4 is recharged from VCC through the internal diode. The
minimum off-time ensures a sufficient time each cycle to recharge the bootstrap capacitor.
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Soft-Start, Remote Shutdown
The soft-start feature allows the converter to gradually reach a steady state operating point, thereby reducing
start-up stresses and current surges. Upon turn-on, when VCC reaches its under-voltage threshold, an internal 10
µA current source charges the external capacitor at the SS pin to 2.52V (t2 in Figure 17). The ramping voltage at
SS ramps the non-inverting input of the regulation comparator, and the output voltage, in a controlled manner.
An internal switch grounds the SS pin if VCC is below its under-voltage lockout threshold, or if the input voltage at
VIN is above the Over-Voltage Shutdown threshold. The SS pin can be used to shutdown the LM34930 by
grounding the pin as shown in Figure 19. Releasing the pin allows normal operation to resume.
SS
STOP
C5
RUN
LM34930
Figure 19. Shutdown Implementation
Thermal Shutdown
The LM34930 should be operated such that the junction temperature does not exceed 125°C. If the junction
temperature increases above that, an internal Thermal Shutdown circuit activates typically at 155°C. In thermal
shutdown the controller enters a low power non-switching state by disabling the buck switch. This feature helps
prevent catastrophic failures from accidental device overheating. When the junction temperature reduces below
135°C (typical hysteresis = 20°C) normal operation resumes.
APPLICATIONS INFORMATION
EXTERNAL COMPONENTS
The procedure for calculating the external components is illustrated with the following design example. Referring
to the Block Diagram, the circuit is to be configured for the following specifications:
• VOUT = 5V
• VIN = 8V to 30V
• Minimum load current for continuous conduction mode (IOUT(min)) = 200 mA
• Maximum load current (IOUT(max)) = 1000 mA
• Switching Frequency (FS) = 1.5 MHz
• Soft-start time = 5 ms
R1 and R2: These resistors set the output voltage. The ratio of the feedback resistors is calculated from:
R1/R2 = (VOUT/2.52V) - 1
(7)
For this example, R1/R2 = 0.98. R1 and R2 should be chosen from standard value resistors in the range of
1.0 kΩ – 10 kΩ which satisfy the above ratio. For this example, 2.32 kΩ is chosen for R1 and 2.37 kΩ is chosen
for R2.
RT: This resistor sets the on-time, and (by default) the switching frequency. First check that the desired
frequency does not require an on-time or off-time shorter than the minimum allowed (90 ns each). The minimum
on-time occurs at the maximum VIN:
VOUT
tON(min) =
VIN(max) x FS
=
5V
30V x 1.5 MHz
= 111 ns
(8)
The minimum off-time occurs at the minimum VIN. For this example
VIN(min) -VOUT
8V - 5V
= 250 ns
=
tOFF(min) =
8V x 1.5 MHz
VIN(min) x FS
(9)
This off-time is acceptable since it is significantly greater than the 90 ns minimum off-time. The RT resistor is
calculated from Equation 6 using the minimum input voltage:
12
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5V
RT =
8V x 1.5 MHz
- 65 ns x
(8V - 0.8V)
4.15 x 10-11
- 0.5 k: = 60.5 k:
(10)
A standard value 60.4 kΩ resistor is selected, resulting in a nominal frequency of 1.50 MHz. The minimum ontime calculates to 152 ns at Vin = 30V, which is acceptably longer than the minimum allowed 90 ns. The
maximum on-time calculates to 416 ns at Vin = 8V.
L1: The main parameter controlled by the inductor is the inductor current ripple amplitude (IOR). The minimum
load current is used to determine the maximum allowable ripple in order to maintain continuous conduction mode
(the lower peak does not reach 0 mA). This is not a requirement of the LM34930, but serves as a guideline for
selecting L1. For this example, the maximum ripple current should be less than:
IOR(MAX) = 2 x IOUT(min) = 400 mAp-p
(11)
For applications where the minimum load current is zero, a good starting point for allowable ripple is 20% of the
maximum load current. In this case substitute 20% of IOUT(max) for IOUT(min) in Equation 11. The ripple amplitude
calculated in Equation 11 is then used in the following equation:
ton(min) x (VIN(max) ± VOUT)
= 9.5 PH
L1(min) =
IOR(max)
(12)
A standard value 10 µH inductor is chosen. The maximum ripple amplitude, which occurs at maximum VIN,
calculates to 379 mAp-p, and the peak current is 1190 mA at maximum load current. Ensure the selected
inductor is rated for this peak current.
C2, R3 and C6: C2 should typically be no smaller than 3.3 µF, although that is dependent on the frequency and
the desired output characteristics. C2 should be a low ESR good quality ceramic capacitor. Experimentation is
usually necessary to determine the minimum value for C2, as the nature of the load may require a larger value. A
load which creates significant transients requires a larger value for C2 than a non-varying load. Ripple voltage is
created at VOUT as the inductor’s ripple current passes through R3 into C2. That ripple voltage is AC coupled
directly to the FB pin by C6 without the attenuation of R1 and R2, allowing the minimum ripple at VOUT to be set
at 25 mVp-p. The minimum inductor ripple current occurs at minimum VIN, and is calculated by re-arranging
Equation 12 to the following:
IOR(min) =
tON(max) x (VIN(min) - VOUT)
L1
= 125 mAp-p
(13)
The minimum value for R3 is then equal to 25 mV/125 mA = 0.2Ω. The next larger standard value resistor should
be used for R3 to allow for tolerances. The minimum value for C6 is equal to:
C6 =
3 x tON (max)
(R1//R2)
= 1064 pF
(14)
The next larger standard value capacitor should be used for C6.
C1 and C7: The purpose of C1 is to supply most of the switch current during the on-time, and limit the voltage
ripple at VIN, since it is assumed the voltage source feeding VIN has some amount of source impedance. At
maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower peak
of the inductor’s ripple current, then ramps up to the upper peak, then drops to zero at turn-off. The average
current during the on-time is the average load current. For a worst case calculation, C1 must supply this average
load current during the maximum on-time, without letting the voltage at the VIN pin drop below a minimum
operating level of 7.5V. The minimum value for C1 is calculated from:
C1 =
IOUT (max) x tON
'V
= 0.83 PF
where
•
•
tON is the maximum on-time
ΔV is the allowable ripple voltage at VIN (0.5V at VIN = 8V)
(15)
The purpose of C7 is to minimize transients and ringing due to long lead inductance leading to the VIN pin. A low
ESR 0.1 µF ceramic chip capacitor is recommended, and C7 must be located close to the VIN and GND pins.
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C3: The capacitor at the VCC pin provides noise filtering and stability for the VCC regulator. C3 should be no
smaller than 0.1 µF, and should be a good quality, low ESR ceramic capacitor. The value of C3, and the VCC
current limit, determine a portion of the turn-on-time (t1 in Figure 17).
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies a surge current to charge the buck switch gate at each turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
C5: The capacitor at the SS pin determines the soft-start time, i.e. the time for the output voltage to reach its final
value (t2 in Figure 17). For soft-start time of 5 ms, the capacitor value is determined from the following:
C5 =
5 ms x 10 PA
= 0.02 PF
2.52V
(16)
D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may affect the regulator’s operation due to the diode’s reverse recovery transients. The
diode must be rated for the maximum input voltage, the maximum load current, and the peak current which
occurs when the current limit and maximum ripple current are reached simultaneously. The diode’s average
power dissipation is calculated from:
PD1 = VF x IOUT x (1-D)
where
•
•
VF is the diode’s forward voltage drop
D is the on-time duty cycle
(17)
FINAL CIRCUIT
The final circuit is shown in Figure 20, and its performance is shown in Figure 21 and Figure 22. The current limit
measured approximately 1.28A at Vin = 8V, and 1.18A at Vin = 30V. The output voltage ripple amplitude
measured 32 mVp-p at Vin = 8V, and 87 mVp-p at Vin = 30V.
8V - 30V Input
VIN
C1
2.2 PF
C7
0.1 PF
RT
60.4 k:
VCC
C3
0.1 PF
LM34930
BST
RT
C4
0.022 PF
VOUT
5V
L1 10 PH
R4
100 k:
OV
SW
D1
nOV
C6
1000 pF
R1
2.32 k:
R3
0.22:
R2
2.37 k:
C2
22 PF
ISEN
SS
C5
0.022 PF
FB
GND
Figure 20. Example Circuit
14
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LM34930
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SNVS571B – MAY 2008 – REVISED APRIL 2013
Figure 21. Efficiency vs. Load Current and VIN
(Circuit of Figure 20)
Figure 22. Frequency vs. VIN (Circuit of Figure 20)
ALTERNATE OUTPUT RIPPLE CONFIGURATIONS
For applications which require lower levels of ripple at VOUT, or for those which can accept higher levels of ripple
while using one less capacitor, the following two alternatives are available.
a) Minimum ripple configuration: If the application requires a lower value of ripple at VOUT (
