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LM3550
SNVS569C – MAY 2009 – REVISED OCTOBER 2016
LM3550 5-A Super-Capacitor Flash LED Driver
1 Features
3 Description
•
•
The LM3550 device is a low-noise, switchedcapacitor DC-DC converter designed to operate as a
current-limited and adjustable (up to 5.3 V) supercapacitor charger. The LM3550 features userselectable termination voltages and provides one
adjustable constant current output (up to 200 mA)
and one NFET controller ideal for driving one or more
high-current LEDs in a high-power flash mode or a
low-power torch mode.
1
•
•
•
•
•
•
•
•
Up to 5 A Flash Current
4 Selectable Super-Capacitor Charge Voltage
Levels (4.5 V, 5 V, 5.3 V, Optimized)
Adjustable Torch Current (60 mA to 200 mA)
Ambient Light or LED Thermal Sensing With
Current Scaleback
Dedicated Indicator LED Current Source
No Inductor Required
Programmable Flash Pulse Duration, and Torch
and Flash Currents via I2C-Compatible Interface
True Shutdown (LED Disconnect)
Flash Timeout Protection
Low Profile 20-Pin UQFN Package
(3 mm × 2.5 mm × 0.8 mm)
The LED current and flash pulse duration of the
LM3550 can be programmed via an I2C-compatible
interface. The STROBE pin allows the flash to be
toggled via a flash-enable signal from a controller or
camera module. The EOC pin sinks current when the
output voltage reaches 95% of the final value.
The ALD/TEMP input pin allows either a light sensor
to adjust the flash-current level based on the ambient
light conditions, or it allows for overtemperature
detection and protection of the LED during highpower operation or high ambient-temperature
conditions.
2 Applications
•
•
•
•
•
•
•
Digital Still Camera
Voltage Rail Management
Fire Alarm Notification
Emergency Strobe Lighting
Intruder Alert Notification
Barcode Scanner
Handheld Data Terminal
Device Information(1)
PART NUMBER
LM3550
PACKAGE
UQFN (16)
BODY SIZE (NOM)
3.00 mm × 2.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
C1
C2
1 PF
C1+
1 PF
C1-
C2+ C2-
2.7 V to 5.5 V
CIN
VIN
VOUT
COUT
4.7 PF
2.2 PF
LM3550
SCL
BAL
SDA
VIO
SuperCapacitor
EOC
STROBE
NTC
LED-
ALD/TEMP
FET_CON
IND
FB
GND
RSENSE
C1 = C2 = 1 PF, CIN = 4.7 PF, COUT = 2.2 PF
10 V X5R or X7R
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM3550
SNVS569C – MAY 2009 – REVISED OCTOBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
Detailed Description ............................................ 13
7.1
7.2
7.3
7.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
13
13
13
16
7.5 Programming........................................................... 23
7.6 Register Maps ......................................................... 25
8
Application and Implementation ........................ 28
8.1 Application Information............................................ 28
8.2 Typical Application ................................................. 28
9 Power Supply Recommendations...................... 35
10 Layout................................................................... 36
10.1 Layout Guidelines ................................................. 36
10.2 Layout Example .................................................... 36
11 Device and Documentation Support ................. 37
11.1
11.2
11.3
11.4
11.5
11.6
11.7
Device Support ....................................................
Related Documentation .......................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
37
37
37
38
38
38
38
12 Mechanical, Packaging, and Orderable
Information ........................................................... 38
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (May 2013) to Revision C
Page
•
Changed title from "5-A Flash LED Driver With Automatic VLED and ESR Detection for Mobile Camera Systems" to "
5-A Super-Capacitor Flash LED Driver"; add top nav icon for reference design ................................................................... 1
•
Added new Applications: delete 'camera phones" ................................................................................................................ 1
•
Deleted redundant text from "Features" and "Description" so required content fits on page 1 ............................................ 1
•
Added "controller or"............................................................................................................................................................... 1
•
Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information
tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply
Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable
Information sections................................................................................................................................................................ 1
•
Deleted footnotes 1, 3, 4 from ROC table rows - no longer necessary ................................................................................ 4
•
Changed value for RθJA from "57°C/W" to "60.1°C/W"; add additional thermal values .......................................................... 4
•
Added "a controller" .............................................................................................................................................................. 13
•
Deleted "in the microcontroller/microprocessor.".................................................................................................................. 13
Changes from Revision A (May 2013) to Revision B
•
2
Page
Changed layout of National Semiconductor data sheet to TI format.................................................................................... 32
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LM3550
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SNVS569C – MAY 2009 – REVISED OCTOBER 2016
5 Pin Configuration and Functions
5
13
12
12
11
11
20
18
19
17
16
14
13
1
Die-Attach
Pad (DAP)
2
3
GND
4
5
9
10
7
8
6
6
GND
4
15
14
8
3
15
7
Die-Attach
Pad (DAP)
10
17
16
18
19
20
1
2
NHU Package
16-Pin UQFN
Bottom View
9
NHU Package
16-Pin UQFN
Top View
Pin Functions
PIN
NAME
NUMBER
TYPE
DESCRIPTION
Ambient light sensor or temperature monitoring pin. For ambient light sensing, connect a
light sensor or photo-diode and a resistor to this pin. For temperature monitoring, connect a
NTC thermistor from VCC to the NTC pin and a resistor from the NTC pin to ground.
ALD/TEMP
12
Input
BAL
2
Power
Super-capacitor active balance pin
C1+
20
C1–
18
C2+
15
Power
Flying capacitor pins. Connect a 1-µF ceramic capacitor from C1+ to C1− and C2+ to C2−.
C2–
16
EOC
6
Output
End-of-charge output/ flash ready. The EOC pin transitions from high to low when an end of
charge flash ready. The EOC pin transitions from high to low when an end of charge state
has been reached
FB
5
Input
FET_CON
4
Output
External FET controller. Connect gate of flash NFET to this pin.
IND
13
Output
Indicator LED current source. Drives one red LED with a 5-mA current
LED-
3
Input
Regulated current sink input for torch mode
SCL
10
Input
I2C serial clock pin
SDA
8
STROBE
11
Input
Manual flash enable pin. The STROBE pin can be configured to be rising-edge sensitive with
the flash timing controlled internally, or level sensitive with the flash timing being controlled
externally.
VIN
14
Input
Input voltage connection. A 1-μF ceramic capacitor is required from VIN to GND.
VOUT
1
Output
Charge pump output. A 1-μF ceramic capacitor is required from VOUT to GND. Connect the
flash LED anodes and super-capacitor to this pin.
GND
7,9,17,19, DAP
Ground
Ground pins – these pins should be connected directly to a low-impedance ground plane.
Programmable feedback voltage pin
Input/Outp 2
I C serial data I/O pin
ut
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LM3550
SNVS569C – MAY 2009 – REVISED OCTOBER 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2) (3)
MIN
MAX
UNIT
VIN to GND
–0.3
6
V
VOUT, LED−, FB to GND
–0.3
6
V
SDA, SCL, STROBE, FET_CON, EOC, ALD/TEMP, IND to GND
–0.3
6
V
Continuous power dissipation (4)
Internally limited
Junction temperature, TJ-MAX
Storage temperature, Tstg
(1)
(2)
(3)
(4)
–65
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to the potential at the GND pin.
If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 145°C (typical) and
disengages at TJ = 125°C (typical). The thermal shutdown is specified by design.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Machine model (2)
±200
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
The LED pin has a machine model ESD rating of 150 V.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
NOM
MAX
UNIT
Input voltage
2.7
5.5
V
Junction temperature, TJ
–30
125
°C
Ambient temperature, TA
–30
85
°C
(1)
All voltages are with respect to the potential at the GND pin.
6.4 Thermal Information
LM3550
THERMAL METRIC (1)
NHU (UQFN)
UNIT
16 PINS
RθJA
Junction-to-ambient thermal resistance
60.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
30.5
°C/W
RθJB
Junction-to-board thermal resistance
28.1
°C/W
ψJT
Junction-to-top characterization parameter
0.7
°C/W
ψJB
Junction-to-board characterization parameter
28.3
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
17.8
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SNVS569C – MAY 2009 – REVISED OCTOBER 2016
6.5 Electrical Characteristics
Typical imits are for TJ = 25°C; minimum and maximum limits apply over the full ambient junction temperature range (−30°C ≤
TA ≤ 85°C). Unless otherwise noted, specifications apply to Typical Application with: : VIN = 3.6 V, CIN = 4.7 µF, COUT = 2.2
µF, C1 = C2 = 1 µF. (1) (2)
PARAMETER
ILED–
Current sink accuracy
TEST CONDITION
MIN (3)
TYP
MAX (3)
54
60
66
90
100
110
180
2.7 V ≤ VIN ≤ 5.5 V
3 V ≤ VIN ≤ 5.5 V
2.7 V ≤ VIN ≤ 5.5 V
200
220
Going into OVP
5.3
5.479
Hysteresis
0.2
VOVP
Output overvoltage protection
VOUT
Output voltage regulation
2.7 V ≤ VIN ≤ 5.5 V, IOUT = 0 mA
VBAL
BAL pin voltage regulation
2.7 V ≤ VIN ≤ 5.5 V
IIND
IND pin current regulation
2.7 V ≤ VIN ≤ 5.5 V, VIND = 2 V
ƒSW
Switching frequency
2.7 V ≤ VIN ≤ 5.5 V
VFB
FEEDBACK pin regulation
voltage
2.7 V ≤ VIN ≤ 5.5 V, VOUT = 4.6 V
VALD/TEMP
ALD/TEMP pin reference voltage
2.7 V ≤ VIN ≤ 5.5 V
VEOC
EOC pin output logic load
ILOAD = 3 mA
IIN-CL
Input current limit
VOUT = 0 V
ISD
4.275
4.5
4.666
4.75
5
5169
5.3
5.479
5.035
UNIT
mA
V
V
VOUT / 2
3.3
4.8
6.3
mA
0.882
1
1.153
MHz
94
100
106
mV
095
1
1.05
V
400
mV
534
610
mA
Shutdown supply current
Device disabled, 2.7 V ≤ VIN ≤ 5.5 V
1.8
4
µA
IQ
Quiescent supply current
2.7 V ≤ VIN ≤ 5.5 V, IOUT = 0 mA
5-V charge mode, non switching
168
240
µA
VSTROBE
STROBE logic thresholds
2.7 V ≤ VIN ≤ 5.5 V
High
1.23
VIN
Low
0
0.7
V
I2C-COMPATIBLE VOLTAGE SPECIFICATIONS (SCL, SDA)
VIL
Input logic low
2.7 V ≤ VIN ≤ 5.5 V
0
0.7
VIH
Input logic high
2.7 V ≤ VIN ≤ 5.5 V
1.23
VIN
V
VOL
Output logic low
ILOAD = 3 mA
400
mV
(1)
(2)
(3)
V
All voltages are with respect to the potential at the GND pin.
Junction-to-ambient thermal resistance (RθJA) is taken from a thermal modeling result, performed under the conditions and guidelines set
forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm × 76 mm × 1.6 mm with a 2 × 1
array of thermal vias. The ground plane on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm
(1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1 W.
Minimum (MIN) and maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers are not ensured,
but do represent the most likely norm. Unless otherwise specified, conditions for TYP specifications are: VIN = 3.6 V and TA = 25°C.
6.6 Timing Requirements
MIN
NOM
MAX
UNIT
t1
SCK (clock period)
294
ns
t2
Data in setup time to SCL high, ƒSCL = 400 kHz
100
ns
t3
Data out stable after SCL low, ƒSCL = 400 kHz
0
ns
t4
SDA low setup time to SCL low (start), fSCL = 400 kHz
100
ns
t5
SDA igh hold time after SCL high (stop), fSCL = 400 kHz
100
ns
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LM3550
SNVS569C – MAY 2009 – REVISED OCTOBER 2016
www.ti.com
Figure 1. LM3550 Timing
6.7 Typical Characteristics
Unless otherwise specified: TA = 25°C; VIN = 3.6 V; CIN = 4.7 µF, COUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F
TDK EDLC272020-501-2F-50.
5.25
5.50
VIN = 3.6V
5.20
TA = -30°C, +25°C
0.00
0.05
0.10
0.15
5.10
5.50
5.40
5.30
5.00
5.20
5.10
5.00
4.90
4.90
4.80
4.70
4.80
4.60
4.50
4.40
4.70
4.30
4.20
4.60
VIN = 4.2V, 3.6V, 3.3V
VIN = 3.0V
4.50
4.40
TA = 85°C
4.80
0.20
4.30
4.20
0.25
VIN = 2.7V
0.00
0.05
IOUT (A)
0.10
0.15
0.20
0.25
IOUT (A)
5-V Mode, Tri-Temp
5.3-V Mode
Figure 2. Output Voltage vs Output Current
Figure 3. Output Voltage vs Output Current
5.50
5.30
5.50
VIN = 3.6V
TA = 25°C
5.20
VIN = 4.2V, 3.6V, 3.3V, 3.0V
5.10
5.40
5.40
TA = -30°C, +25°C
5.30
5.30
VOUT (V)
VOUT (V)
VIN = 5.5V
5.30
5.15
5.25
5.20
5.10
5.15
5.10
5.05
5.05
5.00
5.00
4.95
4.90
4.95
4.85
4.80
4.90
4.75
4.85
4.75
TA = 25°C
5.40
VOUT (V)
VOUT (V)
5.20
5.20
5.20
TA = 85°C
5.10
5.10
5.00
5.30
5.00
5.20
5.10
4.90
5.00
4.90
4.80
4.80
4.70
4.60
4.70
4.50
4.40
4.60
4.30
4.20
4.50
VIN = 5.5V
VIN = 2.7V
4.40
4.30
5.00
0.00
0.05
0.10
0.15
0.20
0.25
4.20
0.00
IOUT (A)
0.10
0.15
0.20
0.25
IOUT (A)
5.3-V Mode, Tri-Temp
5-V Mode
Figure 4. Output Voltage vs Output Current
6
0.05
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Figure 5. Output Voltage vs Output Current
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Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C; VIN = 3.6 V; CIN = 4.7 µF, COUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F
TDK EDLC272020-501-2F-50.
4.80
4.75
TA = 25°C
VIN = 3.6V
4.80
4.70
4.65
4.75
4.70
4.60
4.65
4.60
4.55
4.55
4.50
4.50
4.45
4.40
4.45
4.35
4.30
4.40
4.25
4.35
VIN = 5.5V
VOUT (V)
VOUT (V)
4.70
VIN = 2.7V
4.25
TA = -30°C, +25°C
4.50
4.50
4.40
4.40
4.30
TA = 85°C
4.30
4.20
VIN = 4.2V, 3.6V, 3.3V, 3.0V
4.30
4.70
4.60
4.60
4.20
0.00
0.05
0.10
0.15
0.20
0.25
0.00
0.05
0.10
IOUT (A)
4.5-V Mode
0.20
0.25
4.5-V Mode, Tri-Temp
Figure 6. Output Voltage vs Output Current
0.70
0.65
VIN = 4.2V
VIN = 5.5V
0.60
0.55
0.50
0.45
0.40
VIN = 3.6V
VIN = 2.7V
0.35
0.30
VIN = 3.0V
0.25
0.20
0.15
0.10
0.05
0.00
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Figure 7. Output Voltage vs Output Current
ICL (A)
ICL (A)
0.15
IOUT (A)
0.70
TA = -30°C
0.65
0.60
0.55
0.50
0.45
TA = +25°C
0.40
0.35
TA = +85°C
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOUT (V)
VOUT (V)
Figure 8. Input Current Limit vs Output Voltage
Figure 9. Input Current Limit vs Output Voltage Tri-Temp
220
100
IOUT = 200 mA, 5.3V Fixed Voltage Mode
200
VIN = 3.6V, VLED = 3.3V
90
180
TA = -30°C and +25°C
ILED (mA)
Converter (%)
TA = -30°C
160
80
70
140
TA = +25°C
120
100
60
TA = +85°C
TA = +85°C
80
50
60
40
3.0
3.5
4.0
4.5
5.0
40
0
5.5
1
2
3
4
5
6
7
BRC (#)
VIN (V)
5.3-V Mode
Figure 10. Converter Efficiency vs Input Voltage
Figure 11. Torch Current vs Brightness Code
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Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C; VIN = 3.6 V; CIN = 4.7 µF, COUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F
TDK EDLC272020-501-2F-50.
66
90
Torch Code = 0, VLED = 3.3V
Torch Code = 1, VLED = 3.3V
64
85
TA = -30°C
TA = -30°C
ILED (mA)
ILED (mA)
62
60
80
58
75
TA = +25°C
TA = +25°C
TA = +85°C
TA = +85°C
56
54
2.7
3.1
3.5
3.9
4.3
4.7
5.1
70
2.7
5.5
3.3
3.8
4.4
VIN (V)
4.9
5.5
VIN (V)
Figure 12. Torch Current vs Input Voltage Code = 0
Figure 13. Torch Current vs Input Voltage Code = 1
110
130
Torch Code = 2, VLED = 3.3V
Torch Code = 3, VLED = 3.3V
126
105
TA = -30°C
ILED (mA)
ILED (mA)
TA = -30°C
100
122
118
95
114
TA = +25°C
TA = +25°C
TA = +85°C
90
2.7
3.3
3.8
4.4
TA = +85°C
4.9
110
2.7
5.5
3.3
3.8
VIN (V)
5.5
Figure 15. Torch Current vs Input Voltage Code = 3
155
175
Torch Code = 4, VLED = 3.3V
Torch Code = 5, VLED = 3.3V
150
170
TA = -30°C
140
135
130
125
2.7
TA = -30°C
165
ILED (mA)
145
ILED (mA)
4.9
VIN (V)
Figure 14. Torch Current vs Input Voltage Code = 2
160
155
TA = +25°C
3.1
3.5
150
TA = +85°C
3.9
4.3
4.7
5.1
145
2.7
5.5
VIN (V)
TA = +25°C
TA = +85°C
3.1
3.5
3.9
4.3
4.7
5.1
5.5
VIN (V)
Figure 16. Torch Current vs Input Voltage Code = 4
8
4.4
Figure 17. Torch Current vs Input Voltage Code = 5
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Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C; VIN = 3.6 V; CIN = 4.7 µF, COUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F
TDK EDLC272020-501-2F-50.
200
220
Torch Code = 6, VLED = 3.3V
Torch Code = 7, VLED = 3.3V
195
210
TA = -30°C
185
TA = -30°C
ILED (mA)
ILED (mA)
190
180
200
175
170
190
TA = +25°C
165
160
2.7
3.3
TA = +25°C
TA = +85°C
3.8
4.4
TA = +85°C
4.9
180
2.7
5.5
3.1
3.5
3.9
VIN (V)
4.3
4.7
5.1
5.5
VIN (V)
Figure 18. Torch Current vs Input Voltage Code = 6
Figure 19. Torch Current vs Input Voltage Code = 7
110
105
Torch Code = 2
104
103
105
VFB (mV)
ILED (mA)
102
100
100
99
98
95
TA = +25°C
101
VLED = 2.7V, 3.0V, 3.3V, 3.6V, 4.0V
TA = -30°C
TA = +85°C
97
96
90
2.7
3.1
3.5
3.9
4.3
4.7
5.1
95
2.7
5.5
3.1
3.5
3.9
4.7
5.1
5.5
VIN (V)
VIN (V)
Figure 20. Torch Current vs Input Voltage Different VLED
Figure 21. Feedback Voltage vs Input Voltage
1.15
4.0
TA = +85°C
3.5
1.10
3.0
ISD (#A)
1.05
fSW (MHz.)
4.3
1.00
TA = -30°C
0.95
TA = +25°C
2.5
2.0
TA = +25°C
1.5
TA = -30°C
1.0
0.90
0.85
2.7
TA = +85°C
0.5
3.1
3.5
3.9
4.3
4.7
5.1
0.0
2.5
5.5
3.1
3.7
4.3
4.9
5.5
VIN (V)
VIN (V)
Figure 22. Oscillator Frequency vs Input Voltage
Figure 23. Shutdown Current vs Input Voltage
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Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C; VIN = 3.6 V; CIN = 4.7 µF, COUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F
TDK EDLC272020-501-2F-50.
5.0
4.8
4.8
4.7
4.7
4.6
4.6
4.5
VLED = 2.0V
4.4
VLED = 2.4V
4.3
4.4
TA = +85°C
TA = +25°C
4.3
4.2
4.1
4.1
3.1
TA = -30°C
4.5
4.2
4.0
2.5
VLED = 2.0V
4.9
IIND (mA)
IIND (mA)
5.0
VLED = 1.8V
VLED = 1.5V
4.9
3.7
4.3
4.9
4.0
2.5
5.5
3.1
VIN (V)
3.7
4.3
4.9
5.5
VIN (V)
Figure 24. Indicator Current vs Input Voltage Different VLED
Figure 25. Indicator Current vs Input Voltage Tri-Temp
EOCB
IFlash
(0A to 3A)
VIN
(2V/div.)
VCAP
VCAP
(2V/div.)
(2V/div.)
IIN
(200mA/div.)
IIN
(200 mA/div.)
ICharge
ICharge
(200 mA/div.)
(200mA/div.)
TIME (20 ms/div.)
TIME (1s/div.)
Figure 26. 5.3-V Mode Super Capacitor Charge
Figure 27. 2 LED, 3-A Flash (1.5 A Each)
EOCB
IFlash
(0A to 3A)
VSTROBE
VCAP
(2V/div.)
(2V/div.)
IFlash
(0A to 3A)
IIN
(200mA/div.)
ICharge
(200mA/div.)
TIME (1 Ps/div.)
TIME (200 ms/div.)
Figure 28. 5.3-V Mode Super Capacitor Recharge
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Figure 29. Strobe-to-Flash Delay
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Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C; VIN = 3.6 V; CIN = 4.7 µF, COUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F
TDK EDLC272020-501-2F-50.
EOCB
EOCB
STROBE
STROBE
IFlash = 3A
IFlash = 3A
VCAP
VCAP
2V/div.
2V/div.
IIN
IIN
(500 mA/div.)
ICharge
(500 mA/div.)
ICharge
(500 mA/div.)
(500 mA/div.)
TIME (20 ms/div.)
TIME (20 ms/div.)
Figure 30. Edge-Sensitive Strobe
Figure 31. Level-Sensitive Strobe
EOCB
EOCB
STROBE
STROBE
IFlash = 3A
IFlash = 3A
VCAP
VCAP
2V/div.
IIN
2V/div.
IIN
(500 mA/div.)
ICharge
(500 mA/div.)
ICharge
(500 mA/div.)
(500 mA/div.)
TIME (40 ms/div.)
TIME (40 ms/div.)
Figure 32. Flash With FGATE = 0
Figure 33. Flash With FGATE = 1
STROBE
STROBE
IFlash = 3A
IFlash = 2.1A
(100% Flash)
(70% Flash)
VALS = 500 mV
VALS = 100 mV
IIN
IIN
(500 mA/div.)
ICharge
(500 mA/div.)
ICharge
(500 mA/div.)
(500 mA/div.)
TIME (20 ms/div.)
TIME (20 ms/div.)
VALS = 100 mV
VALS = 500 mV
Figure 34. ALS Detect Zone 0
Figure 35. ALS Detect Zone 1
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Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C; VIN = 3.6 V; CIN = 4.7 µF, COUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F
TDK EDLC272020-501-2F-50.
STROBE
IFlash = 0A
(0% Flash)
VALS = 1V
IIN
(500 mA/div.)
ICharge
(500 mA/div.)
TIME (20 ms/div.)
VALS = 1 V
Figure 36. ALS Detect Zone 2
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7 Detailed Description
7.1 Overview
The LM3550 is a super-capacitor charger and high-current-flash controller based upon a switched-capacitor
boost converter. On the charging end of the application, the LM3550 has a 534 mA (typical) input current limit
that prevents the part from drawing an excessive current when the super-capacitor voltage is below the target
charge voltage. During the charge phase the LM3550 runs in current limit and adaptively change gains (1×, 1.5×,
2×) until the super-capacitor reaches its target charge voltage. Integrated into the LM3550 is an external NFET
controller that allows the flash current drawn from the super-capacitor to remain regulated throughout the flash
cycle. Flash timing and current level can be changed through the I2C-compatible interface.
7.2 Functional Block Diagram
C1+
C1-
C2+
C2-
VOUT
BAL
VIN
2.7 V to 5.5 V
Current
Limit
2X, 3/2X and 1X
Charge Pump
Output
Disconnect
Active
Balance
OVP
1.0-MHz
Switch
Frequency
IND
Voltage
Mode FB
External
NFET
Controller
Controller
EOC
FET_CON
FB
STROBE
General Purpose Register
Current Control Registers
SCL
2
I C Interface
Block
SDA
LM3550
LEDAmbient
Light/
Temperature
Detection
Options Control Register
ALD/TEMP High
ALD/TEMP Low
Registers
GND
ALD/TEMP
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7.3 Feature Description
7.3.1 STROBE Pin
The STROBE pin on the LM3550 provides an external method of flash triggering. This means a direct connection
between a controller or camera/imager and the LM3550 device can be made, avoiding any latency added due to
communication delays. The STROBE pin can be configured to be rising-edge sensitive (default) or level
sensitive. In the rising-edge sensitive mode, the flash duration is controlled internally and uses the value stored in
the FLASH duration bits (Options Control Register bits 3:0) to determine the pulse length. If level sensitive mode
is selected (Options Control Register bit 7 = 1), the flash-pulse duration can be controlled externally. In this
mode, when the STROBE pin is high, the flash remains on as long as the duration does not exceed the value
stored in the FLASH duration control bits. If the timing does exceed the internal flash-duration value, the LM3550
automatically disables the flash current.
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Feature Description (continued)
7.3.2 End-of-Charge Pin (EOC)
The EOC pin provides an external flag alerting the microcontroller/microprocessor that the super-capacitor has
reached the end of charging. When the super-capacitor has reached the desired end-of-charge level, the EOC
pin transitions from its default state (logic 1) to the EOC state (logic 0). The EOC pin utilizes an open-drain driver
that allows the EOC logic levels to be compatible with many of the common controller input/output (I/O) levels.
Connecting a resistor between the system I/O supply and the EOC pin on the LM3550 ensures the proper
voltage levels are utilized.
The state of the EOC pin can change during a flash event, or any other event whenever the super-capacitor
voltage drops below 95% of the target charge voltage.
7.3.3 ALD/TEMP Pin
The ALD/TEMP pin allows the LM3550 to monitor the ambient light or ambient temperature and adjust the flash
current through the LED/LEDs without requiring the microcontroller/microprocessor to issue commands through
the control interface.
For ambient light detection, a reverse-biased photosensor/diode and a resistor are required. For ambient
temperature sensing, a negative temperature coefficient (NTC) thermistor and a resistor are required. Internal to
the LM3550 are two comparators (based on a 1-V reference) connected to the ALD/TEMP pin that provide three
user-selectable regions of flash current adjustment. The trip-point thresholds are selectable in the ALD/TEMP
Sense High and Low Registers.
If the ambient light or ambient temperature are sufficiently low (LM3550 in low region) the full-scale flash current
is allowed. As the lighting conditions or temperature increase, the LM3550 ALD/TEMP detection circuit transitions
to the second level that limits the flash current to 70% or the full-scale value. For conditions where a flash is not
required (ambient detection) or if the ambient temperature is too high to flash safely, placing the ALD/TEMP
circuit in the high-detection level, the LM3550 prevents a flash event from occurring. The functionality of the
ALD/TEMP pin can be enabled or disabled through General Purpose Register (bit 6). These macro-functions,
when enabled, off-load the microcontroller/microprocessor and provide significant system-power savings.
To help filter out the 50 to 60 Hz noise caused by indoor lighting, TI recommends a 1-µF ceramic capacitor tied
between the ALD/TEMP pin and GND.
7.3.4 IND Pin
The Indicator pin (IND) consists of a current source that is capable of driving a red indicator LED with 5 mA of
drive current. This indicator LED can be turned on and off by toggling bit 7 in the General Purpose Register.
7.3.5 BAL Pin
The Balance pin (BAL), when connected to a super-capacitor (if needed), regulates the two sections of the
super-capacitor so that voltage on either cell is equal to ½ the output voltage. This ensures that an overvoltage
condition on either capacitor section does not occur.
7.3.6 Super-Capacitor Charging Time
The time it takes the LM3550 to charge a super-capacitor from 0 V to the target voltage is highly dependent on
the input voltage, output-voltage target, and super-capacitor capacitance value.
• The LM3550 up a capacitor faster if the target output voltage is lower and slower if the target output voltage is
higher. For a given charge profile, a up a capacitor faster with higher input voltage and slower with lower input
voltages. This is due to the LM3550 staying in the lower gains for longer periods of time.
• The LM3550 charges up a capacitor faster if the target output voltage is lower and slower if the target output
voltage is higher. For a given charge profile, a lower capacitor voltage is reached faster than a higher voltage
level.
• The LM3550 charges up a capacitor having a lower capacitance value faster than a capacitor having a higher
capacitance level.
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Feature Description (continued)
Table 1. Super-Capacitor Charging Times 0.5-F Capacitor, 0 V To Target
OPTIMAL
MODE (1)
(1)
FIXED VOLTAGE MODE
VIN
4.38 V
4.5 V
5V
5.3 V
4.2 V
4.565 s
5.087 s
6.314 s
7.014 s
3.6 V
5.207 s
5.765 s
6.978 s
7.832 s
3V
6.090 s
6.446 s
7.870 s
8.904 s
Optimal Mode Flash = 2 LEDs at 3 A (1.5 A each) for 48 ms. Super-capacitor part number: TDK EDLC272020-501-2F-50.
7.3.7 Super-Capacitor Voltage Profile
When a constant load current is drawn from the charged super-capacitor, the voltage on the capacitor changes.
The capacitor ESR and capacitance both affect the discharge profile.
Super Cap Voltage vs. Time
VCHARGE
VESR
VDROOP
VCAP
VESR
tFLASH
tSTART
tFINISH
TIME
At the beginning of the flash (tSTART), the super-capacitor voltage drops due to the ESR of the super-capacitor.
The magnitude of the drop is equal to the flash current (IFLASH) multiplied by the ESR (RESR).
VESR = IFLASH × RESR
(1)
Once the initial voltage drop occurs (VESR) the super-capacitor voltage decays at a constant rate until the flash
ends (tFINISH). The voltage droop (VDROOP) during the flash event is equal to flash current (IFLASH) multiplied by the
flash duration (tFLASH) divided by the capacitance value of the super-capacitor (CSC).
VDROOP = (IFLASH × tFLASH) / CSC
(2)
After the flash event has finished, the voltage on the super-capacitor increases due to the absence of current
flowing through the ESR of the super-capacitor. This step-up is equal to
VESR = IFLASH × RESR
(3)
7.3.8 Peak Flash Current
To set the peak flash current controlled by the LM3550, a current setting resistor must be placed between the
source of the current source and ground (FB to GND). The LM3550 regulates the voltage across the resistor to a
value between 100 mV and 30 mV depending on the setting in the Current Control Register. Using the 100 mV
setting, the peak flash current can be found usingEquation 4:
IFLASH = VFB / RSENSE
(4)
The LM3550 provides eight feedback voltage levels allowing eight different current settings. The current ranges
from 100% of full-scale (100 mV setting) down to 30% of full-scale (30 mV setting) in 10% steps.
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7.3.9 Maximum Flash Duration
Several factors determine the maximum achievable flash pulse duration. The flash current magnitude, feedback
voltage, RDSON of the current source FET, super-capacitor capacitance (CSC), super-capacitor ESR (RESR) and
super-capacitor charge voltage (VCAP) determine the ability of the device to regulate the flash current for a given
amount of time.
tFLASH (maximum) = (CSC × VDROOP) / IFLASH
where
•
•
VDROOP = VCAP − VLED − [IFLASH × (RESR + RDSON + {RBAL/N)}] − VFB
N = number of flash LEDs
(5)
Example:
If VCAP = 5.3 V, VLED = 4 V (at 1.5 A), IFLASH (total) = 3 A, CSC = 0.5 F, RESR = 50 mΩ, RDSON = 40 mΩ,
VFB = 100 mV, and RBAL = 75 mΩ, then VDROOP = 0.82 V and tFLASH (maximum) = 136 ms.
VBAT
VCAP
Charger
+
VLED
_
IFLASH
ESR
100 mV
+
VSC
_
+
_
+
VRDSON
_
CSC
+
VFB
_
+
VHR
_
Figure 37. Power Loss Model
7.4 Device Functional Modes
7.4.1 State Machine Description
Shutdown
Voltage
Mode
Charge
Charge
Optimal
Charge
Mode
Flash
Torch
Charge and
Torch
Figure 38. Default State Diagram
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Device Functional Modes (continued)
7.4.1.1 Basic Description
The state machine for the LM3550 involves five different states: shutdown, torch, charge, charge and torch, and
flash.
The shutdown state, or standby state, places the LM3550 in a low-power mode that typically draws 1.8 µA of
current from the power supply.
The torch state charges the super-capacitor up to VLED + VTREG (VTREG ≈ 300 mV) and utilizes the internal current
sink to drive the flash LEDs with a current up to 200 mA.
The charge state places the LM3550 into a dedicated charge mode that provides the fastest means of charging
the super-capacitor up to the target level (4.5 V, 5 V, 5.3 V or optimal).
The charge and torch state combines the functionality of both the torch state and charge state. This state allows
the flash LEDs to be on during the charging of the super-capacitor. During the initial charging, the torch current is
limited to 60 mA to allow the majority of the output current to be utilized in the super-capacitor charging. Once
the target capacitor voltage is reached, the torch-current levels become fully adjustable.
The Flash state is responsible for driving the flash LEDs at the desired flash current. This state can be entered
either through I2C-controlled event or through an external strobe event.
7.4.1.2 Shutdown State
The shutdown state is the default power-up state. The LM3550 enters the shutdown state when the STROBE pin
is held low without a flash event occurring, and when the flash, torch, and charge bits in the General Purpose
Register are equal to 0.
7.4.1.3 Torch State
The torch state of the LM3550 provides the flash LED / LEDs with a constant current level that is safe for
continuous operation. This state is useful in low light conditions when an imager is placed in movie or video
mode. The torch state is enabled when the torch bit in the General Purpose Register is set to a 1 and the flash
and charge bits are set to 0. The desired torch current level (8 total levels between 60 mA and 200 mA) is set in
the Current Control Register.
Enabling the torch bit starts up the LM3550 and begin charging the capacitor. Before a torch event can occur, the
super-capacitor must be charged to a voltage greater than 3 V. Once the super-capacitor reaches a voltage of 3
V, the LED− pin begins sinking current. In order for the torch current to be properly regulated, the super-capacitor
must be charged up to a value that is greater than VLED + VTREG (VTREG ≈ 300 mV).
When in the torch state, the LM3550 regulates the proper output voltage (either 3 V or VLED + VREG) utilizing a
pulsed regulation scheme (PFM). During this mode, the device operate in current limit until the output voltage
reaches the target level. At that point, the charge-pump turns off, and the super-capacitor supplies the load.
Once the super-capacitor voltage drops below the turnon threshold due to the loading caused by the torch
current, the charge-pump turns on again and re-charges the super-capacitor.
7.4.1.4 Charge State
The charge state of the LM3550 provides the fastest charge time when compared to the other states of
operation. In this state, the user has the option of charging the super-capacitor to a voltage equal to 4.5 V, 5 V,
5.3 V or to an optimal voltage. The charge state is enabled through the I2C interface by setting the charge bit to a
1 and setting the flash and torch Bits to a 0 in the General Purpose Register. The charge voltage is selectable by
setting the two charge-mode bits (CM1 and CM0) also found in the General Purpose Register.
Depending on the input voltage and output voltage conditions, the LM3550 delivers different charge currents to
the super-capacitor. Charge current is dependent on the charge-pump gain.
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Device Functional Modes (continued)
525 mA
333 mA
ICHARGE
(Typ.)
262 mA
Gain
Of
1x
Gain
Of
3/2x
Gain
Of
2x
VCAP
Figure 39. Charge Current vs Output Voltage
7.4.1.4.1 Fixed-Voltage-Charge Mode
During the charge state, the LM3550 operates in current limit until the target voltage is reached. For the 4.5 V,
5 V and 5.3 V charge modes, the LM3550 operates in a constant-frequency mode once the target voltage is
reached for load currents greater than 60 mA. This allows the LM3550 to draw only the required current from the
power source when the load current is less than the maximum. When the average output current exceeds the
maximum of the LM3550, the device returns to the current limited operation until the target voltage is reached. If
the output current is less than 60 mA, the LM3550 operates in a PFM-burst mode.
7.4.1.4.2 Optimal Charge Mode
For the optimal charge mode, the current-limited, pulsed-regulation scheme (PFM) is used to maintain the target
voltage. In optimal charge mode, the LM3550 charges the super-capacitor to a level that is required to sustain a
flash for a given period of time. optimal charge mode compensates for variations in LED forward voltage and
super-capacitor ESR by charging the capacitor to an optimal voltage that minimizes the power dissipated in the
external current source during the flash. The user must calculate the required overhead voltage and select this
value in the Options Control Register. For more information regarding the optimal charge mode, see the
Application and Implementation description.
NOTE
When the LM3550 is placed into optimal charge mode, the flash LEDs begin to glow once
the super-capacitor voltage exceeds 3 V. The LEDs continue to glow until the device is
placed into shutdown, into the flash state, or into one of the fixed-voltage charge modes.
7.4.1.5 Torch and Charge State
The torch and charge state provides the ability to utilize the torch functionality while charging to the selected
target voltage. The torch and charge state is entered by setting the torch bit and charge bit to a 1 and by setting
the flash bit to a 0 in the General Purpose Register. Additionally, the CM1 and CM0 bits can be configured to
define the target charge voltage.
During the initial charging of the super-capacitor, the torch functionality is enabled until the capacitor voltage
reaches 3 V. Additionally, the torch current is limited to 60 mA until the target voltage is reached. Once the
output reaches the target, the current level specified in the Current Control Register is allowed.
In the event that the total output current exceeds the capacitor charge current (ICHARGE = IMAX − ITORCH −
IEXTERNAL), causing the super-capacitor to drop below the target voltage, the LM3550 automatically sets the T2 bit
in the Current Control Register to a 0, decreasing the torch current.
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Device Functional Modes (continued)
VCAP
5.0V
4.75V
3.0V
Time
ITORCH
200 mA
120 mA
60 mA
Torch and
Charge (5.0V)
VCAP = 3.0V VCAP = 5.0V
IOUT > IMAX
T2 bit
6HW WR µ0¶
Flash
Time
Figure 40. Torch Current Diagram
7.4.1.6 Flash State
When entered, the flash state of the LM3550 device delivers a high-current burst of current to the flash LEDs. To
enter the flash state, the flash bit in the General Purpose Register must be set to a 1 or the STROBE pin must
be pulled high (edge or level sensitive). The flash duration and current level are user adjustable via the I2C
interface (F2-F0 in current control and FD3-FD0 in options).
By default, a flash does not occur if the super-capacitor is not fully charged (that is, the end-of-charge flag (EOC
pin) must transition low). If the flash state was entered via the I2C interface (flash bit = 1 ), the LM3550
automatically resets the flash bit and the torch bit to 0 upon completion of the flash. Additionally, after the flash
event has occurred, the LM3550 returns to the charge state/mode that was in operation before the flash event
with the exception of optimal charge mode. (If optimal charge mode was used before a flash, all charging is
halted after the flash.)
7.4.1.7 EOC Functionality
The EOC pin of the device provides an indicator alerting the controller that the super-capacitor has reached its
target voltage. The EOC pin transitions low once the capacitor reaches 95% of the target voltage for the 4.5 V, 5
V and 5.3 V modes or once the capacitor has reached the optimal charge voltage in optimal charge mode.
During operation, the LM3550 continues to monitor the voltage on the super-capacitor and updates the EOC pin
when needed. Any time a mode transition occurs during charge mode or charge and torch mode, the EOC state
is re-evaluated.
During torch mode, the EOC always indicates a charging state (EOC = 1) .
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Device Functional Modes (continued)
VCAP
5.3V
5.0V
4.8V
4.5V
4.0V
Time
EOC
Charging
Charged
Torch
C (5.3V)
C (5.3V)
C (Optimal)
C (4.5V)
Torch
Flash
20
T+C (5.0V)
T+C (5.0V)
IOUT > IMAX
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Device Functional Modes (continued)
7.4.1.8 State Diagram FGATE = 1
By default, the LM3550 prevents a flash event from occurring if the super-capacitor has not reached the target
voltage (EOC = 0). In the event that this restriction is not desired, the flash gate bit (FGATE in the General
Purpose Register) can be set to a 1 disabling the end-of-charge requirement. Setting FGATE to a 1 allows the
flash state to be entered at anytime. If the super-capacitor is not charged to the proper voltage before the EOC
pin indicates a full charge, the perceived duration and flash level could be lower than desired.
Shutdown
Optimal
Charge
Mode
Voltage
Mode
Charge
Charge
Flash
Torch
Charge and
Torch
Figure 41. FGATE = 1 State Diagram
7.4.1.9 Optimal Charge Mode vs Fixed Voltage Mode
The LM3550 provides two types of super-capacitor charging modes: fixed voltage and optimal charge.
In fixed voltage mode, the LM3550 charges and regulate the super-capacitor to either 4.5 V, 5 V, or 5.3 V. This
mode is useful if the LM3550 is going to be used for both flash and fixed-rail applications (power supply for audio
or PA sub-systems).
If the LM3550 is only going to be used as a super-capacitor charger and flash controller, the optimal charge
mode provides many advantages over the fixed voltage mode. optimal charge mode charges the super-capacitor
to the minimum voltage that is required to sustain a flash pulse compensating for variations in super-capacitor
ESR and LED forward voltage due to temperature and process. To properly use the optimal charge mode, the
overhead voltage (VOH) must be determined. The overhead voltage is equal to the voltage required to maintain
current source regulation (VHR) plus the voltage droop (VDROOP) on the super-capacitor due to the flash event.
VOH = VDROOP + VHR = (IFLASH × tFLASH / CSC) + VFB + (IFLASH × RDSDON)
(6)
and
VCAP = VOH + VLED + [IFLASH × (RESR+ RBAL / N)]
where
•
N = Number of flash LEDs
(7)
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Device Functional Modes (continued)
Example:
If VLED (peak)= 4.1 V (at 1.5 A), IFLASH (total) = 3 A, CSC = 0.5 F, RESR = 50 mΩ, RDSON = 40 mΩ, VFB = 100 mV,
RBAL = 75 mΩ, and tFLASH = 64 ms, then VOH = 0.604 V and VCAP = 4.97 V.
NOTE
VLED (peak) is equal to the LED voltage before self-heating occurs. Once current flows
through the LED, the LED heats up, and the forward voltage decreases until it reaches a
steady-state level. This voltage drop is dependent on the LED and the PCB layout.
Based on this calculation, setting the overhead voltage to 600 mV in the Current Control Register should ensure
a regulated 3-A flash pulse over the entire flash duration.
Unlike fixed voltage mode, optimal charge mode adjusts the super-capacitor voltage upon changes in LED
forward voltage and variation in super-capacitor ESR, ensuring that the super-capacitor does not charge to a
voltage higher than needed. By charging optimally, the LM3550 can potentially charge the super-capacitor to its
EOC state faster due to the target voltage being lower, and it helps ease the thermal loading on the current
source FET during the flash.
7.4.1.9.1 Optimal Charge Mode vs Fixed Voltage Mode
VFB
200 mV/DIV
VCAP
1V/DIV
VLED1V/DIV
VFB
200 mV/DIV
IFlash = 3A
VCAP
1V/DIV
VCAP = 4.94V
VLED1V/DIV
VOH = 600 mV
VOH = 900 mV
VLED+BAL (peak) = 4.4V
VLED+BAL (peak) = 4.4V
VF
2V/DIV
IFlash = 3A
VCAP = 5.36V
VF
2V/DIV
VLED+BAL (ave.) = 4V
TIME
(10 ms/DIV)
VLED+BAL (ave.) = 4V
TIME
(10 ms/DIV)
Figure 42. Optimal Charge Mode
Figure 43. 5.3-V Fixed Voltage Charge Mode
Peak power dissipation across current source FET
PNFET (maximum) = IFLASH × (VOH − VFB)
where
•
Optimal mode = 1.5 W, fixed voltage mode (5.3 V) = 2.4 W
(8)
Average power dissipation across current source FET (64 ms pulse)
PNFET (average) = IFLASH × [VOH − (VDROOP ÷ 2) − VFB]
where
•
22
Optimal mode = 936 mW, fixed voltage mode (5.3 V) = 1.824 W
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7.5 Programming
7.5.1 I2C-Compatible Interface
7.5.1.1 Data Validity
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, the state
of the data line can only be changed when SCL is LOW.
SCL
SDA
data
change
allowed
data
valid
data
change
allowed
data
valid
data
change
allowed
Figure 44. Data Validity Diagram
A pullup resistor between VIO (logic power supply) and SDA must be greater than [(VIO − VOL) / 3 mA] to meet
the VOL requirement on SDA. Using a larger pullup resistor results in lower switching current with slower edges,
while using a smaller pullup resistor results in higher switching currents with faster edges.
7.5.1.2 Start and Stop Conditions
START and STOP conditions classify the beginning and the end of the I2C session. A START condition is
defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as
the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and
STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition.
During data transmission, the I2C master can generate repeated START conditions. First START and repeated
START conditions are equivalent, function-wise. The data on SDA line must be stable during the HIGH period of
the clock signal (SCL). In other words, the state of the data line can only be changed when SCL is LOW.
SDA
SCL
S
P
START condition
STOP condition
Figure 45. Start and Stop Conditions
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Programming (continued)
7.5.1.3 Transferring Data
Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first.
Each byte of data has to be followed by an acknowledge bit. The acknowledge-related clock pulse is generated
by the master. The master releases the SDA line (HIGH) during the acknowledge clock pulse. The LM3550 pulls
down the SDA line during the 9th clock pulse, signifying an acknowledge. The LM3550 generates an
acknowledge after each byte has been received.
After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an
eighth bit which is a data direction bit (R/W). The LM3550 address is 53h. For the eighth bit, a 0 indicates a
WRITE and a 1 indicates a READ. The second byte selects the register to which the data will be written. The
third byte contains data to write to the selected register.
ack from slave
ack from slave
start
msb Chip Address lsb
w
ack
msb Register Add lsb
ack
start
Id = 53h
w
ack
addr = 10h
ack
ack from slave
msb
DATA
lsb
ack
stop
ack
stop
SCL
SDA
data = 08h
w = write (SDA = 0)
ack = acknowledge (SDA pulled down by the slave)
id = chip address, 53h for LM3550
Figure 46. Write Cycle
7.5.1.4 I2C-Compatible Child Address: 0x53
MSB
LSB
ADR6
bit7
ADR5
bit6
ADR4
bit5
ADR3
bit4
ADR2
bit3
ADR1
bit2
ADR0
bit1
1
0
1
0
0
1
1
R/W
bit0
2
I C Slave Address (chip address)
24
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7.6 Register Maps
7.6.1 Internal Registers
Internal Hex Address
Power On Value
General Purpose
Register
0x10
0000 0000
Current Control
0xA0
1111 1000
Options
0xB0
1000 0000
ALD/TEMP Sense High
0xC0
1111 1001
ALD/TEMP Sense Low
0xD0
1100 0110
7.6.1.1 General Purpose Register Description
General Purpose Register
Register Address: 0x10
MSB
IND EN
bit7
A/T EN
bit6
FGATE
bit5
CM1
bit4
CM0
bit3
LSB
FLASH
bit2
CHARGE TORCH
bit1
bit0
FLASH, CHARGE, and TORCH: Mode Bits (see Table 2).
CM0–CM1: Capacitor Charge Mode (see Table 3).
FGATE: Flash Gate Bit. If FGATE is a 0, then an end-of-charge condition must occur before a flash can take
place. If FGATE is a 1, then an end-of-charge condition does not have to occur before a flash can take place.
A/T EN: ALD/TEMP Enable Bit
IND EN: Enable Indicator Current Source (0 = Indicator Off, 1 = Indicator On)
Table 2. Control Modes
Flash
Charge
Torch
0
0
0
Disabled
Mode
0
0
1
Torch
0
1
0
Charge
0
1
1
Charge and Torch
1
x
x
Flash
Table 3. Capacitor Charge Level
CM1
CM0
0
0
Optimal Charge Mode
Level
0
1
4.5
1
0
5.0V
1
1
5.3V
Table 4. Gated Flash Control
FGATE Bit
Result
0
Flash only allowed after EOC reached
1
Flash allowed without EOC reached
Table 5. ALD/TEMP Control
A/T EN Bit
Result
0
ALD MODE DISABLED
1
ALD MODE ENABLED
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7.6.1.2 Current Control Register Description
Current Control Register
Register Address: 0xA0
MSB
1
bit7
1
bit6
F2
bit5
F1
bit4
F0
bit3
LSB
T2
bit2
T1
bit1
T0
bit0
Table 6. Torch Level Table
T2
T1
T0
Level
0
0
0
60 mA
0
0
1
80 mA
0
1
0
100 mA
0
1
1
120 mA
1
0
0
140 mA
1
0
1
160 mA
1
1
0
180 mA
1
1
1
200 mA
Table 7. Flash Level Table
F2
F1
F0
FB Voltage Level
0
0
0
30 mV
0
0
1
40 mV
0
1
0
50 mV
0
1
1
60 mV
1
0
0
70 mV
1
0
1
80 mV
1
1
0
90 mV
1
1
1
100 mV
7.6.1.3 Options Control Register Description
Options Register
Register Address: 0xB0
MSB
SLE
bit7
OH2
bit6
OH1
bit5
OH0
bit4
FD3
bit3
LSB
FD2
bit2
FD1
bit1
FD0
bit0
SLE: Strobe Level or Edge Sensitivity. 0 = Edge Sensitive, 1 = Level Sensitive
FD0-FD3: Flash Duration control bits (see Table 8).
OH0-OH2: Overhead Charge Voltage control bits (see Table 9).
Table 8. Time-out Duration Table
26
FD3
FD2
FD1
FD0
0
0
0
0
16
0
0
0
1
32
0
0
1
0
48
0
0
1
1
64
0
1
0
0
80
0
1
0
1
96
0
1
1
0
112
0
1
1
1
128
1
0
0
0
144
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Table 8. Time-out Duration Table (continued)
FD3
FD2
FD1
FD0
1
0
0
1
Time (msec)
160
1
0
1
0
176
1
0
1
1
192
1
1
0
0
208
1
1
0
1
224
1
1
1
0
240
1
1
1
1
512
Table 9. Overhead Charge Voltage Table
OH2
OH1
OH0
Level
0
0
0
300 mV
0
0
1
400 mV
0
1
0
500 mV
0
1
1
600 mV
1
0
0
700 mV
1
0
1
800 mV
1
1
0
900 mV
1
1
1
1V
7.6.1.4 ALD/TEMP Sense High/Low Registers
ALD/TEMP Sense High Register
Register Address: 0xC0
MSB
1
bit7
1
bit6
SH5
bit5
SH4
bit4
SH3
bit3
SH2
bit2
LSB
SH1
bit1
SH0
bit0
Figure 47. ALD/TEMP Sense High Register
ALD/TEMP Sense Low Register
Register Address: 0xD0
MSB
1
bit7
1
bit6
SL5
bit5
SL4
bit4
SL3
bit3
SL2
bit2
LSB
SL1
bit1
SL0
bit0
Figure 48. ALD/TEMP Sense Low Register
For ALD/TEMP Sense High and ALD/TEMP sense low, the trip levels are set by Equation 10:
Sense High/Low = 1 V × N / (26 − 1)
where
•
N is the decimal equivalent of the value stored in the ALD/TEMP Sense High/Low registers
(10)
NSENSEHIGH must be greater than NSENSELOW.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM3550 can drive multiple flash LEDs at currents up to 5 A total. The switched-capacitor boost on the
LM3550 eliminates the need of an inductor in the application.
8.2 Typical Application
C1
C2
1 PF
1 PF
C1+
C1-
C2+ C2-
2.7 V to 5.5 V
CIN
VIN
VOUT
COUT
4.7 PF
2.2 PF
LM3550
SCL
BAL
SDA
VIO
SuperCapacitor
EOC
STROBE
NTC
LED-
ALD/TEMP
FET_CON
IND
FB
GND
RSENSE
C1 = C2 = 1 PF, CIN = 4.7 PF, COUT = 2.2 PF
10 V X5R or X7R
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Figure 49. LM3550 Typical Application
8.2.1 Design Requirements
For LM3550, use the parameters listed in Table 10.
Table 10. Design Parameters
DESIGN PARAMETER
28
EXAMPLE VALUE
Input voltage
2.7 V to 5.5 V
Output voltage
5.3 V (maximum)
Torch current
0 to 200 mA (maximum)
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8.2.2 Detailed Design Procedure
8.2.2.1 Component Selection
8.2.2.1.1 Super-Capacitor
Super-capacitors, or electrochemical double-layer capacitors (EDLC's), have a very high energy density
compared to other capacitor types. Most super-capacitors aimed at applications requiring voltages higher than
3V are three-terminal devices (two super-capacitor cells stacked in series). Special care must be taken to ensure
that the voltage on each cell of the super-capacitor does not exceed the maximum rating (typically 2.75 V to
2.85 V, depending on the manufacturer). The LM3550 is capable of safely charging super-capacitors of many
different capacitances up to a VOUT(maximum) = 5.3 V typical.
The capacitor balance pin (BAL) on the LM3550 ensures that the voltage on each cell is equal to half of the
output voltage to prevent an overvoltage condition on either cell. If either cell fails as a short, the BAL pin does
not prevent the second cell from being damaged.
NOTE
The LM3550 is not designed to work with low-voltage, single-cell super-capacitors.
8.2.2.1.2 Boost Capacitors
The LM3550 requires 4 external capacitors for proper operation (C1 = C2 = 1 µF; CIN = 4.7 µF; COUT = 2.2 µF); TI
recommends surface-mount multi-layer ceramic capacitors are recommended. These capacitors are small,
inexpensive and have very low equivalent series resistance (ESR < 20 mΩ typical). Tantalum capacitors, OSCON capacitors, and aluminum electrolytic capacitors are not recommended for use with the LM3550 due to their
high ESR, as compared to ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with
the LM3550. These capacitors have tight capacitance tolerance (as good as ±10%) and hold their value over
temperature (X7R: ±15% over −55°C to +125°C; X5R: ±15% over −55°C to +85°C).
Capacitors with Y5V or Z5U temperature characteristic are generally not recommended for use with the LM3550.
Capacitors with these temperature characteristics typically have wide capacitance tolerance (+80%, −20%) and
vary significantly over temperature (Y5V: 22%, −82% over −30°C to +85°C range; Z5U: 22%, −56% over 10°C to
85°C range). Under some conditions, a nominal 1µF Y5V or Z5U capacitor could have a capacitance of only 0.1
µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum
capacitance requirements of the LM3550.
The recommended voltage rating for the capacitors is 10 V to account for DC bias capacitance losses.
8.2.2.1.3 Current Source FET
Choose the proper current source MOSFET to ensure accurate flash current delivery. N-channel MOSFETs
(NFET) with allowed drain-to-source voltages (VDS) greater than 5.5 V are required. In order to prevent damage
to the current source NFET, special attention must be given to the pulsed-current rating of the MOSFET. The
NFET must be sized appropriately to handle the desired flash current and flash duration. Most MOSFET
manufacturers provide curves showing the pulsed performance of the NFET in the electrical characteristics
section of their data sheets. The performance of the MOSFET rating at temperature, primarily temperatures
greater than 40°C, must also be investigated to ensure NFET does not become thermally damaged during a
flash pulse. An NFET possessing low RDSON values helps improve the efficiency of the flash pulse.
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8.2.2.1.4 ALD/TEMP Components
8.2.2.1.4.1 NTC Selection
NTC thermistors have a temperature-to-resistance relationship of:
E
R(T) = R25°C x e
§ 1 - 1·
©T °C+ 273 298¹
where
•
•
β is given in the thermistor data sheet
R25°C is the thermistor's value at 25°C
(11)
R1 in is chosen so that it is equal to:
R1 =
VTRIP RT( TRIP)
(VBIAS - VTRIP)
where
•
•
•
RT(TRIP) is the thermistors value at the temperature trip point
VBIAS is shown in Figure 50
VTRIP = 800 mV (typical)
(12)
Choosing R1 here gives a more linear response around the temperature trip voltage. For example, with VBIAS =
1.8 V, a thermistor whose nominal value at 25°C is 100 kΩ, and a β = 4500 K, the trip point is chosen to be
85°C. The value of R(T) at 85°C is:
E
R1 is then:
º
»
¼
R(T) = 100 k : x e
º
1
- 1
85 + 273 298 »¼
= 7.959 k:
0.8V x 7.959 k:
= 6.367 k:
1.8V ± 0.8V
(13)
Setting the ALD/TEMP Sense High Register to N = 50 or hex 0x32 places the upper trip point to approximately
800 mV. Voltages higher than 800 mV prevent the flash LED from turning on. Based on Figure 50, the Sense
Low Register can be set to a lower code to give a second LED current threshold (70% flash). Voltages lower
than the value stored in the Sense Low Register allow a full current flash.
1e5
1.0e1
VBIAS = 1.8V
RTHERMISTOR = 100k
@ 25°C
=4500, R1 = 6.367k
)
1e4
1.0
RT (
VALD/TEMP (V)
RT
VALD/TEMP
1.0e-1
25
35
45
55
65
75
85
95
1e3
105
TA (°C)
Figure 50. Thermistor Resistive Divider Response vs Temperature
If the temperature changes during a flash event, meaning VALS/TEMP crosses the sense high and/or sense low
values, the current scales to the appropriate zone current.
Place the thermistor as close as possible to the flash LEDs. This provides the best thermal coupling (lowest
thermal resistance).
30
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VBIAS/VIO
R1
RT
1V
Sense
High
Current Control
Register
Trip Point
Decode
1V
Sense
Low
Figure 51. Thermistor Voltage Divider and Sensing Circuit
8.2.2.1.4.2 Ambient Light Sensor
If the ALD/TEMP pin is not used for ambient/LED temperature monitoring, it can be used for ambient light
detection. The LM3550 provides three regions of current control based upon ambient conditions. The three
regions are defined using the Sense High and Sense Low Registers to set the zone boundaries (userconfigurable from 0 to 1 V). Most ambient light sensors are reverse-biased diodes that leak current proportional
to the amount of ambient light reaching the sensor. This current is then translated into a voltage by using a
resistor in series with the light sensor. The voltage-setting resistor varies based upon the desired ambient
detection range and manufacturer.
1 PF
VIO/VBAT
2.2 k:
AVAGO APDS-9005
1V
Sense
High
Trip Point
Decode
Current Control
Register
1V
Sense
Low
Default TRIP POINTS
1000 LUX for Bright Ambient (900 mV) (Bright Outdoor Lighting)
100 to 1000 LUX for Indoor Ambient (90 mV) (Office Lighting)
0 to 100 LUX for Low Ambient (Night or Movie Theater)
No Flash
70% Full-Scale Flash
Full-Scale Flash
Most ambient light sensors suggest placing a capacitor in parallel with the voltage-setting resistor in order to help
filter the 50-, 60-Hz noise generated by fluorescent overhead lighting. This capacitor can range from no capacitor
up to 10 µF. The key is to filter the noise so that the peak-to-peak voltage is less than 16 mV (LSB size of the
ALD/TEMP sense high and sense low settings). Refer to the data sheet of the ambient light sensor for the
recommended capacitor value.
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Strobe
VSENSE
(50 mV/DIV)
VALD/TEMP
(500 mV/DIV)
TIME
(10 ms/DIV)
The flash current drops to 70% of the peak once the voltage on the ALD/TEMP pin exceeds the sense low trip point.
Figure 52. Effect of ALD/TEMP Voltage Rising During a Flash
Strobe
VSENSE
(50 mV/DIV)
VALD/TEMP
(500 mV/DIV)
TIME
(10 ms/DIV)
The flash event is not allowed to start if the voltage on ALD/TEMP is higher that the sense high trip point.
Figure 53. Effect of ALD/TEMP Voltage Dropping During a Flash
8.2.2.1.5 Thermal Protection
Internal thermal protection circuitry disables the LM3550 when the junction temperature exceeds 145°C (typical).
This feature protects the device from being damaged by high die temperatures that might otherwise result from
excessive power dissipation. The device recovers and operates normally when the junction temperature falls
below 125°C (typical). It is important that the board layout provide good thermal conduction to keep the junction
temperature within the specified operating ratings.
32
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8.2.3 Application Curves
100
100
IOUT = 200 mA, 4.5V Fixed Voltage Mode
IOUT = 200 mA, 5.0V Fixed Voltage Mode
90
80
80
Converter (%)
Converter (%)
90
TA = -30°C and +25°C
70
TA = +85°C
70
60
60
TA = +85°C
50
50
TA = -30°C and +25°C
40
3.0
3.5
4.0
4.5
5.0
40
2.7
5.5
3.1
3.5
3.9
5.1
5.5
4.5-V Mode
Figure 54. Converter Efficiency vs Input Voltage
Figure 55. Converter Efficiency vs Input Voltage
0.50
0.50
IOUT = 200 mA, 5.3V Fixed Voltage Mode
IOUT = 200 mA, 5.0V Fixed Voltage Mode
0.45
TA = -30°C
0.40
0.35
IIN (mA)
0.40
IIN (mA)
4.7
VIN (V)
VIN (V)
5-V Mode
0.45
4.3
TA = +85°C
0.30
0.35
TA = -30°C
TA = +85°C
0.30
TA = +25°C
TA = +25°C
0.25
0.25
0.20
2.7
3.3
3.8
4.4
4.9
0.20
2.7
5.5
3.3
3.8
VIN (V)
4.9
5.5
VIN (V)
5.3-V Mode
5-V Mode
Figure 56. Input Current vs Input Voltage
Figure 57. Input Current vs Input Voltage
0.50
100
IOUT = 200 mA, 4.5V Fixed Voltage Mode
0.45
90
TA = -30°C and +25°C
ILED = 100 mA
VLED = 3.3V
80
70
LED (%)
0.40
IIN (mA)
4.4
0.35
60
50
40
TA = +85°C
0.30
30
VLED = 3.0V
20
0.25
VLED = 3.6V
10
0.20
2.7
3.3
3.8
4.4
4.9
0
2.7
5.5
3.1
VIN (V)
3.5
3.9
4.3
4.7
5.1
5.5
VIN (V)
4.5-V Mode
100 mA
Figure 58. Input Current vs Input Voltage
Figure 59. LED Efficiency vs Input Voltage Torch Mode
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100
ILED = 200 mA
90
80
EOCB
VLED = 3.3V
VIN
LED (%)
70
(2V/div.)
60
VCAP
50
(2V/div.)
40
VLED = 3.0V
30
VLED = 3.6V
IIN
20
(200 mA/div.)
ICharge
10
0
2.7
(200 mA/div.)
3.1
3.5
3.9
4.3
4.7
5.1
5.5
TIME (1s/div.)
VIN (V)
200 mA
Figure 60. LED Efficiency vs Input Voltage Torch Mode
Figure 61. 5.3-V Mode Super Capacitor Charge
EOCB
IFlash
IFlash
(0A to 3A)
(0A to 3A)
VCAP
VCAP
(2V/div.)
(2V/div.)
IIN
IIN
(200mA/div.)
(200mA/div.)
ICharge
ICharge
(200mA/div.)
(200mA/div.)
TIME (20 ms/div.)
TIME (200 ms/div.)
Figure 62. 2 LED, 3-A Flash (1.5 A Each)
Figure 63. 5.3-V Mode Super Capacitor Recharge
EOCB
STROBE
IFlash = 3A
VSTROBE
(2V/div.)
VCAP
IFlash
2V/div.
(0A to 3A)
IIN
(500 mA/div.)
ICharge
(500 mA/div.)
TIME (20 ms/div.)
TIME (1 Ps/div.)
Figure 64. Strobe-to-Flash Delay
34
Figure 65. Edge-Sensitive Strobe
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EOCB
EOCB
STROBE
STROBE
IFlash = 3A
IFlash = 3A
VCAP
VCAP
2V/div.
IIN
2V/div.
IIN
(500 mA/div.)
ICharge
(500 mA/div.)
ICharge
(500 mA/div.)
(500 mA/div.)
TIME (20 ms/div.)
TIME (40 ms/div.)
Figure 66. Level-Sensitive Strobe
EOCB
Figure 67. Flash With FGATE = 0
STROBE
STROBE
IFlash = 3A
IFlash = 3A
(100% Flash)
VCAP
2V/div.
IIN
VALS = 100 mV
(500 mA/div.)
ICharge
(500 mA/div.)
ICharge
IIN
(500 mA/div.)
(500 mA/div.)
TIME (40 ms/div.)
TIME (20 ms/div.)
VALS = 100 mV
Figure 68. Flash With FGATE = 1
STROBE
Figure 69. ALS Detect Zone 0
STROBE
IFlash = 2.1A
IFlash = 0A
(70% Flash)
(0% Flash)
VALS = 500 mV
VALS = 1V
IIN
IIN
(500 mA/div.)
ICharge
(500 mA/div.)
ICharge
(500 mA/div.)
(500 mA/div.)
TIME (20 ms/div.)
TIME (20 ms/div.)
VALS = 500 mV
VALS = 1 V
Figure 70. ALS Detect Zone 1
Figure 71. ALS Detect Zone 2
9 Power Supply Recommendations
The LM3550 is designed to operate from an input supply range of 2.7 V to 5.5 V. This input supply must be well
regulated and provide the peak current required by the LED configuration.
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10 Layout
10.1 Layout Guidelines
The UQFN is a leadless package with very good thermal properties. This package has an exposed DAP (die
attach pad) at the underside center of the package measuring 1.86 mm × 2.2 mm. The main advantage of this
exposed DAP is to offer low thermal resistance when soldered to the thermal ground pad on the PCB. For good
PCB layout TI recommends a 1:1 ratio between the package and the PCB thermal land. To further enhance
thermal conductivity, the PCB thermal ground pad may include vias to a 2nd layer ground plane. For more
detailed instructions on mounting UQFN packages, refer to AN-1187 Leadless Leadframe Package (LLP).
The proceeding steps must be followed to ensure stable operation and proper current source regulation.
1. Bypass VIN with at least a 4.7-µF ceramic capacitor. Connect the positive terminal of this capacitor as close
as possible to VIN.
2. Connect COUT as close as possible to the VOUT pin with at least a 2.2-µF capacitor.
3. Connect the return terminals of the input capacitor and the output capacitor as close as possible to the
exposed DAP and GND pins through low impedance traces.
4. Place the two 1-µF flying capacitors (C1 and C2) as close as possible to the LM3550 C1+, C1− and C2+,
C2− pins.
5. To minimize losses during the flash pulse, TI recommends that the flash LEDs, the current source NFET,
and current-setting resistor be placed as close as possible to the super capacitor.
5 mm
6.2 mm
10.2 Layout Example
3 mm
4.2 mm
Current Source Super-Capacitor
Charger
Figure 72. LM3550 Layout
36
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.1.2 Device Nomenclature
VBATT
Voltage supplying charger circuit.
VCAP
Super-capacitor voltage at the end of the charge cycle and before a flash.
ICL
Maximum current allowed to be drawn from the battery.
IFLASH
LED current during the flash event.
tFLASH
Desired flash duration.
CSC
Super capacitor value.
VLED
Flash diode forward voltage at IFLASH.
VHR
The headroom required across the FET and the Sense resistor to maintain current sink regulation.
VFB
The degeneration resistor RSENSE regulation voltage that in part sets IFLASH.
RDSON
On-Resistance of NFET.
VRDSON
The voltage drop across the current source FET.
VPUMP
The initial SC voltage required for the Flash.
RSENSE
Current set resistor.
VDROOP
Voltage droop on the super-capacitor during a flash of duration tFLASH.
= IFLASH×tFLASH / CSC
RESR
Super-capacitor ESR value.
VESR
Voltage drop due to SC ESR.
VBAL
Voltage drop due to LED ballast resistors
VOH
Overhead charge voltage required for constant current regulation during the entire flash duration.
VPUMP
VOH + VLED+ VESR = VFB + VRDSON + VESR + VLED + VDROOP + VBAL
VHR
VFB + VRDSON
11.2 Related Documentation
For additional information, see the following:
AN-1187 Leadless Leadframe Package (LLP)
11.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
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11.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
38
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM3550SP/NOPB
ACTIVE
UQFN
NHU
20
1000
RoHS & Green
SN
Level-3-260C-168 HR
-30 to 85
3550
LM3550SPX/NOPB
ACTIVE
UQFN
NHU
20
4500
RoHS & Green
SN
Level-3-260C-168 HR
-30 to 85
3550
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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