LM359
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LM359 Dual, High Speed, Programmable, Current Mode (Norton) Amplifiers
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FEATURES
APPLICATIONS
•
•
•
•
•
1
2
•
•
•
•
•
•
User Programmable Gain Bandwidth Product,
Slew Rate, Input Bias Current, Output Stage
Biasing Current and Total Device Power
Dissipation
High Gain Bandwidth Product (ISET = 0.5 mA)
– 400 MHz for AV = 10 to 100
– 30 MHz for AV = 1
High Slew Rate (ISET = 0.5 mA)
– 60 V/μs for AV = 10 to 100
– 30 V/μs for AV = 1
Current Differencing Inputs Allow High
Common-Mode Input Voltages
Operates from a Single 5V to 22V Supply
Large Inverting Amplifier Output Swing, 2 mV
to VCC − 2V
Low Spot Noise, 6 nV /√Hz, for f > 1 kHz
Typical Application
•
AV = 20 dB
•
−3 dB bandwidth = 2.5 Hz to 25 MHz
•
Differential phase error < 1° at 3.58
MHz
•
Differential gain error < 0.5% at 3.58
MHz
•
General Purpose Video Amplifiers
High Frequency, High Q Active Filters
Photo-Diode Amplifiers
Wide Frequency Range Waveform Generation
Circuits
All LM3900 AC Applications Work to Much
Higher Frequencies
DESCRIPTION
The LM359 consists of two current differencing
(Norton) input amplifiers. Design emphasis has been
placed on obtaining high frequency performance and
providing user programmable amplifier operating
characteristics. Each amplifier is broadbanded to
provide a high gain bandwidth product, fast slew rate
and stable operation for an inverting closed loop gain
of 10 or greater. Pins for additional external
frequency compensation are provided. The amplifiers
are designed to operate from a single supply and can
accommodate input common-mode voltages greater
than the supply.
Connection Diagram
Figure 1. PDIP/SOIC Package
Top View
See Package Number D0014A or NFF0014A
1
2
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM359
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage
22 VDC or ±11 VDC
D Package
Power Dissipation (3)
1W
NFF Package
750 mW
D Package
Maximum TJ
+150°C
NFF Package
+125°C
147°C/W still air
D Package θjA
110°C/W with 400
linear feet/min air flow
Thermal Resistance
100°C/W still air
NFF Package θjA
75°C/W with 400
linear feet/min air flow
Input Currents, IIN(+) or IIN(−)
10 mADC
Set Currents, ISET(IN) or ISET(OUT)
2 mADC
Operating Temperature Range
0°C to +70°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature
PDIP Package
Soldering Information
(1)
(2)
(3)
SOIC Package
(Soldering, 10 sec.)
260°C
Soldering (10 sec.)
260°C
Vapor Phase (60 sec.)
215°C
Infrared (15 sec.)
220°C
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
See Figure 22.
Electrical Characteristics
ISET(IN) = ISET(OUT) = 0.5 mA, Vsupply = 12V, TA = 25°C unless otherwise noted
Parameter
Conditions
Open Loop Voltage
Vsupply = 12V, RL = 1k, f = 100 Hz
Gain
TA = 125°C
Bandwidth Unity Gain
RIN = 1 kΩ, Ccomp = 10 pF
Gain Bandwidth Product,
Gain of 10 to 100
RIN = 50Ω to 200Ω
Slew Rate
Amplifier to Amplifier
Coupling
Mirror Gain (1)
ΔMirror Gain (1)
Input Bias Current
Min
Typ
62
72
Max
Units
dB
68
dB
15
30
MHz
200
400
MHz
Unity Gain
RIN = 1 kΩ, Ccomp = 10 pF
30
Gain of 10 to 100
RIN < 200Ω
60
V/μs
−80
f = 100 Hz to 100 kHz, RL = 1k
dB
at 2 mA IIN(+), ISET = 5 μA, TA = 25°C
0.9
1.0
1.1
μA/μA
at 0.2 mA IIN(+), ISET = 5 μA Over Temp.
0.9
1.0
1.1
μA/μA
at 20 μA IIN(+), ISET = 5 μA Over Temp.
0.9
μA/μA
1.0
1.1
at 20 μA to 0.2 mA IIN(+) Over Temp, ISET = 5 μA
3
5
%
Inverting Input, TA = 25°C
8
15
μA
30
μA
Over Temp.
Input Resistance (βre)
Inverting Input
2.5
kΩ
Output Resistance
IOUT = 15 mA rms, f = 1 MHz
3.5
Ω
(1)
2
Mirror gain is the current gain of the current mirror which is used as the non-inverting input.
AI for two different mirror currents at any given temperature.
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ΔMirror Gain is the % change in
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Electrical Characteristics (continued)
ISET(IN) = ISET(OUT) = 0.5 mA, Vsupply = 12V, TA = 25°C unless otherwise noted
Parameter
Conditions
Output Voltage Swing (RL VOUT High
= 600Ω)
VOUT Low
Output Currents
Supply Current
IIN(−) and IIN(+) Grounded
Typ
9.5
10.3
IIN(−) = 100 μA, IIN(+) = 0
Source
IIN(−) and IIN(+)
Grounded, RL = 100Ω
Sink (Linear Region)
Vcomp−0.5V = VOUT = 1V,
IIN(+) = 0
Sink (Overdriven)
IIN(−) = 100 μA, IIN(+) = 0,
VOUT Force = 1V
2
16
Max
Units
50
mV
V
40
4.7
1.5
Non-Inverting Input Grounded, RL = ∞
Power Supply Rejection (2) f = 120 Hz, IIN(+) Grounded
(2)
Min
3
18.5
40
mA
22
50
mA
dB
See Figure 15 and Figure 16.
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Typical Performance Characteristics
Open Loop Gain
Figure 2.
4
Open Loop Gain
Note: Shaded area refers to LM359
Figure 3.
Open Loop Gain
Gain Bandwidth Product
Figure 4.
Figure 5.
Slew Rate
Gain and Phase
Feedback Gain = − 100
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Inverting Input Bias Current
Figure 8.
Inverting Input Bias Current
Note: Shaded area refers to LM359
Figure 9.
Mirror Gain
Figure 10.
Mirror Gain
Note: Shaded area refers to LM359
Figure 11.
Mirror Gain
Figure 12.
Mirror Current
Note: Shaded area refers to LM359
Figure 13.
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Typical Performance Characteristics (continued)
6
Supply Current
Supply Rejection
Figure 14.
Figure 15.
Supply Rejection
Output Sink Current
Figure 16.
Figure 17.
Output Swing
Output Impedance
Figure 18.
Figure 19.
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Typical Performance Characteristics (continued)
Amplifier to Amplifier
Coupling (Input Referred)
Noise Voltage
Figure 20.
Figure 21.
Maximum Power Dissipation
Note: Shaded area refers to LM359J/LM359N
Figure 22.
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APPLICATION HINTS
The LM359 consists of two wide bandwidth, decompensated current differencing (Norton) amplifiers. Although
similar in operation to the original LM3900, design emphasis for these amplifiers has been placed on obtaining
much higher frequency performance as illustrated in Figure 23.
This significant improvement in frequency response is the result of using a common-emitter/common-base
(cascode) gain stage which is typical in many discrete and integrated video and RF circuit designs. Another
versatile aspect of these amplifiers is the ability to externally program many internal amplifier parameters to suit
the requirements of a wide variety of applications in which this type of amplifier can be used.
Figure 23.
DC BIASING
The LM359 is intended for single supply voltage operation which requires DC biasing of the output. The current
mirror circuitry which provides the non-inverting input for the amplifier also facilitates DC biasing the output. The
basic operation of this current mirror is that the current (both DC and AC) flowing into the non-inverting input will
force an equal amount of current to flow into the inverting input . The mirror gain (AI) specification is the measure
of how closely these two currents match. For more details see TI Application Note AN-72 (Literature Number
SNOA666).
DC biasing of the output is accomplished by establishing a reference DC current into the (+) input, IIN(+), and
requiring the output to provide the (−) input current. This forces the output DC level to be whatever value
necessary (within the output voltage swing of the amplifier) to provide this DC reference current, Figure 24.
Figure 24.
8
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The DC input voltage at each input is a transistor VBE(≃ 0.6 VDC) and must be considered for DC biasing. For
most applications, the supply voltage, V+, is suitable and convenient for establishing IIN(+). The inverting input
bias current, Ib(−), is a direct function of the programmable input stage current (see OPERATING CURRENT
PROGRAMMABILITY (ISET)) and to obtain predictable output DC biasing set IIN(+) ≥ 10Ib(−).
The following figures illustrate typical biasing schemes for AC amplifiers using the LM359:
Figure 25. Biasing an Inverting AC Amplifier
Figure 26. Biasing a Non-Inverting AC Amplifier
Figure 27. nVBE Biasing
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The nVBE biasing configuration is most useful for low noise applications where a reduced input impedance can
be accommodated (see Typical Applications section).
OPERATING CURRENT PROGRAMMABILITY (ISET)
The input bias current, slew rate, gain bandwidth product, output drive capability and total device power
consumption of both amplifiers can be simultaneously controlled and optimized via the two programming pins
ISET(OUT) and ISET(IN).
ISET(OUT)
The output set current (ISET(OUT)) is equal to the amount of current sourced from pin 1 and establishes the class A
biasing current for the Darlington emitter follower output stage. Using a single resistor from pin 1 to ground, as
shown in Figure 28, this current is equal to:
Figure 28. Establishing the Output Set Current
The output set current can be adjusted to optimize the amount of current the output of the amplifier can sink to
drive load capacitance and for loads connected to V+. The maximum output sinking current is approximately 10
times ISET(OUT). This set current is best used to reduce the total device supply current if the amplifiers are not
required to drive small load impedances.
ISET(IN)
The input set current ISET(IN) is equal to the current flowing into pin 8. A resistor from pin 8 to V+ sets this current
to be:
Figure 29. Establishing the Input Set Current
ISET(IN) is most significant in controlling the AC characteristics of the LM359 as it directly sets the total input stage
current of the amplifiers which determines the maximum slew rate, the frequency of the open loop dominant pole,
the input resistance of the (−) input and the biasing current Ib(−). All of these parameters are significant in wide
band amplifier design. The input stage current is approximately 3 times ISET(IN) and by using this relationship the
following first order approximations for these AC parameters are:
10
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(1)
where Ccomp is the total capacitance from the compensation pin (pin 3 or pin 13) to ground, AVOL is the low
frequency open loop voltage gain in V/V and an ambient temperature of 25°C is assumed (KT/q = 26 mV and
βtyp = 150). ISET(IN) also controls the DC input bias current by the expression:
(2)
which is important for DC biasing considerations.
The total device supply current (for both amplifiers) is also a direct function of the set currents and can be
approximated by:
Isupply ≃ 27 × ISET(OUT) + 11 × ISET(IN)
(3)
with each set current programmed by individual resistors.
PROGRAMMING WITH A SINGLE RESISTOR
Operating current programming may also be accomplished using only one resistor by letting ISET(IN) equal
ISET(OUT). The programming current is now referred to as ISET and it is created by connecting a resistor from pin 1
to pin 8 (Figure 30).
(4)
ISET(IN) = ISET(OUT) = ISET
Figure 30. Single Resistor Programming of ISET
This configuration does not affect any of the internal set current dependent parameters differently than previously
discussed except the total supply current which is now equal to:
Isupply ≃ 37 × ISET
(5)
Care must be taken when using resistors to program the set current to prevent significantly increasing the supply
voltage above the value used to determine the set current. This would cause an increase in total supply current
due to the resulting increase in set current and the maximum device power dissipation could be exceeded. The
set resistor value(s) should be adjusted for the new supply voltage.
One method to avoid this is to use an adjustable current source which has voltage compliance to generate the
set current as shown in Figure 31.
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Figure 31. Current Source Programming of ISET
This circuit allows ISET to remain constant over the entire supply voltage range of the LM359 which also improves
power supply ripple rejection as illustrated in the Typical Performance Characteristics. It should be noted,
however, that the current through the LM334 as shown will change linearly with temperature but this can be
compensated for (see LM334 data sheet).
Pin 1 must never be shorted to ground or pin 8 never shorted to V+ without limiting the current to 2 mA or less to
prevent catastrophic device failure.
CONSIDERATIONS FOR HIGH FREQUENCY OPERATION
The LM359 is intended for use in relatively high frequency applications and many factors external to the amplifier
itself must be considered. Minimization of stray capacitances and their effect on circuit operation are the primary
requirements. The following list contains some general guidelines to help accomplish this end:
1. Keep the leads of all external components as short as possible.
2. Place components conducting signal current from the output of an amplifier away from that amplifier's noninverting input.
3. Use reasonably low value resistances for gain setting and biasing.
4. Use of a ground plane is helpful in providing a shielding effect between the inputs and from input to output.
Avoid using vector boards.
5. Use a single-point ground and single-point supply distribution to minimize crosstalk. Always connect the two
grounds (one from each amplifier) together.
6. Avoid use of long wires (> 2″) but if necessary, use shielded wire.
7. Bypass the supply close to the device with a low inductance, low value capacitor (typically a 0.01 μF
ceramic) to create a good high frequency ground. If long supply leads are unavoidable, a small resistor
(∼10Ω) in series with the bypass capacitor may be needed and using shielded wire for the supply leads is
also recommended.
COMPENSATION
The LM359 is internally compensated for stability with closed loop inverting gains of 10 or more. For an inverting
gain of less than 10 and all non-inverting amplifiers (the amplifier always has 100% negative current feedback
regardless of the gain in the non-inverting configuration) some external frequency compensation is required
because the stray capacitance to ground from the (−) input and the feedback resistor add additional lagging
phase within the feedback loop. The value of the input capacitance will typically be in the range of 6 pF to 10 pF
for a reasonably constructed circuit board. When using a feedback resistance of 30 kΩ or less, the best method
of compensation, without sacrificing slew rate, is to add a lead capacitor in parallel with the feedback resistor with
a value on the order of 1 pF to 5 pF as shown in Figure 32.
12
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Cf = 1 pF to 5 pF for stability
Figure 32. Best Method of Compensation
Another method of compensation is to increase the effective value of the internal compensation capacitor by
adding capacitance from the COMP pin of an amplifier to ground. An external 20 pF capacitor will generally
compensate for all gain settings but will also reduce the gain bandwidth product and the slew rate. These same
results can also be obtained by reducing ISET(IN) if the full capabilities of the amplifier are not required. This
method is termed over-compensation.
Another area of concern from a stability standpoint is that of capacitive loading. The amplifier will generally drive
capacitive loads up to 100 pF without oscillation problems. Any larger C loads can be isolated from the output as
shown in Figure 33. Over-compensation of the amplifier can also be used if the corresponding reduction of the
GBW product can be afforded.
Figure 33. Isolating Large Capacitive Loads
In most applications using the LM359, the input signal will be AC coupled so as not to affect the DC biasing of
the amplifier. This gives rise to another subtlety of high frequency circuits which is the effective series inductance
(ESL) of the coupling capacitor which creates an increase in the impedance of the capacitor at high frequencies
and can cause an unexpected gain reduction. Low ESL capacitors like solid tantalum for large values of C and
ceramic for smaller values are recommended. A parallel combination of the two types is even better for gain
accuracy over a wide frequency range.
AMPLIFIER DESIGN EXAMPLES
The ability of the LM359 to provide gain at frequencies higher than most monolithic amplifiers can provide makes
it most useful as a basic broadband amplification stage. The design of standard inverting and non-inverting
amplifiers, though different than standard op amp design due to the current differencing inputs, also entail subtle
design differences between the two types of amplifiers. These differences will be best illustrated by design
examples. For these examples a practical video amplifier with a passband of 8 Hz to 10 MHz and a gain of 20 dB
will be used. It will be assumed that the input will come from a 75Ω source and proper signal termination will be
considered. The supply voltage is 12 VDC and single resistor programming of the operating current, ISET, will be
used for simplicity.
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AN INVERTING VIDEO AMPLIFIER
1. Basic circuit configuration:
2. Determine the required ISET from the characteristic curves for gain bandwidth product.GBWMIN= 10 × 10 MHz
= 100 MHzFor a flat response to 10 MHz a closed loop response to two octaves above 10 MHz (40 MHz) will
be sufficient.
Actual GBW = 10 × 40 MHz = 400 MHz ISET required = 0.5 mA
3. Determine maximum value for Rf to provide stable DC biasing
Optimum
output DC level for maximum symmetrical swing without clipping is:
Rf(MAX)
can now be found:
This value should not be exceeded for predictable
DC biasing.
4. Select Rs to be large enough so as not to appreciably load the input termination resistance:Rs ≥ 750Ω; Let Rs
= 750Ω
5. Select Rf for appropriate gain:
predictability is insured.
6. Since Rf = 7.5k, for the output to be biased to 5.1 VDC,
7.5 kΩ is less than the calculated Rf(MAX) so DC
the reference current IIN(+) must be:
Now Rb can be found by:
7. Select Ci to provide the proper gain for the 8 Hz minimum input frequency:
A larger value of Ci will allow a flat frequency response down to 8 Hz and a
0.01 μF ceramic capacitor in parallel with Ci will maintain high frequency gain accuracy.
8. Test for peaking of the frequency response and add a feedback “lead” capacitor to compensate if necessary.
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Figure 34. Final Circuit Using Standard 5%
Tolerance Resistor Values
Vo(DC) = 5.1V
Differential phase error < 1° for 3.58 MHz fIN
Differential gain error < 0.5% for 3.58 MHz fIN
f−3 dB low = 2.5 Hz
Figure 35. Circuit Performance
A NON-INVERTING VIDEO AMPLIFIER
For this case several design considerations must be dealt with.
• The output voltage (AC and DC) is strictly a function of the size of the feedback resistor and the sum of AC
and DC “mirror current” flowing into the (+) input.
• The amplifier always has 100% current feedback so external compensation is required. Add a small (1 pF–5
pF) feedback capacitance to leave the amplifier's open loop response and slew rate unaffected.
• To prevent saturating the mirror stage the total AC and DC current flowing into the amplifier's (+) input should
be less than 2 mA.
• The output's maximum negative swing is one diode above ground due to the VBE diode clamp at the (−) input.
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DESIGN EXAMPLE
eIN = 50 mV (MAX), fIN = 10 MHz (MAX), desired circuit BW = 20 MHz, AV = 20 dB, driving source impedance =
75Ω, V+ = 12V.
1. Basic circuit configuration:
2. Select ISET to provide adequate amplifier bandwidth so that the closed loop bandwidth will be determined by
Rf and Cf. To do this, the set current should program an amplifier open loop gain of at least 20 dB at the
desired closed loop bandwidth of the circuit. For this example, an ISET of 0.5 mA will provide 26 dB of open
loop gain at 20 MHz which will be sufficient. Using single resistor programming for
ISET:
3. Since the closed loop bandwidth will be determined by
to obtain a 20 MHz bandwidth,
both Rf and Cf should be kept small. It can be assumed that Cf can be in the range of 1 pF to 5 pF for
carefully constructed circuit boards to insure stability and allow a flat frequency response. This will limit the
value of Rf to be within the range of:
Also, for a closed loop gain of +10, Rf
must be 10 times Rs + re where re is the mirror diode resistance.
4. So as not to appreciably load the 75Ω input termination resistance the value of (Rs + re) is set to 750Ω.
5. For Av = 10; Rf is set to 7.5 kΩ.
6. The optimum output DC level for symmetrical AC swing is:
7. The DC feedback current must be:
DC biasing predictability will be insured
because 640 μA is greater than the minimum of ISET/5 or 100 μA.
8. For gain accuracy the total AC and DC mirror current should be less than 2 mA. For this example the
maximum AC mirror current will be:
μA to 706 μA which will insure gain accuracy.
therefore the total mirror current range will be 574
9. Rb can now be found:
10. Since Rs + re will be 750Ω and re is fixed by the DC mirror current to be:
Rs must
be 750Ω–40Ω or 710Ω which can be a 680Ω resistor in series with a 30Ω resistor which are standard 5%
tolerance resistor values.
16
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11. As a final design step, Ci must be selected to pass the lower passband frequency corner of 8 Hz for this
example.
A larger value may be used and a 0.01 μF ceramic capacitor
in parallel with Ci will maintain high frequency gain accuracy.
Figure 36. Final Circuit Using Standard 5% Tolerance Resistor Values
Vo(DC) = 5.4V
Differential phase error < 0.5°
Differential gain error < 2%
f−3 dB low = 2.5 Hz
Figure 37. Circuit Performance
GENERAL PRECAUTIONS
The LM359 is designed primarily for single supply operation but split supplies may be used if the negative supply
voltage is well regulated as the amplifiers have no negative supply rejection.
The total device power dissipation must always be kept in mind when selecting an operating supply voltage, the
programming current, ISET, and the load resistance, particularly when DC coupling the output to a succeeding
stage. To prevent damaging the current mirror input diode, the mirror current should always be limited to 10 mA,
or less, which is important if the input is susceptible to high voltage transients. The voltage at any of the inputs
must not be forced more negative than −0.7V without limiting the current to 10 mA.
The supply voltage must never be reversed to the device; however, plugging the device into a socket backwards
would then connect the positive supply voltage to the pin that has no internal connection (pin 5) which may
prevent inadvertent device failure.
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Typical Applications
DC Coupled Inputs
Figure 38. Inverting
Figure 39. Non-Inverting
•
•
Eliminates the need for an input coupling capacitor
Input DC level must be stable and can exceed the supply voltage of the LM359 provided that maximum input
currents are not exceeded.
Figure 40. Noise Reduction using nVBE Biasing
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R1 and C2 provide additional filtering of the negative biasing supply
Figure 41. nVBE Biasing with a Negative Supply
Figure 42. Typical Input Referred Noise Performance
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•
FET input voltage mode op amp
•
For AV = +1; BW = 40 MHz, Sr = 60 V/μs; CC = 51 pF
•
For AV = +11; BW = 24 MHz, Sr = 130 V/μs; CC = 5 pF
•
For AV = +100; BW = 4.5 MHz, Sr = 150 V/μs; CC = 2 pF
•
VOS is typically