User's Guide
SNVA270C – October 2007 – Revised April 2013
AN-1682 LM3679TL Evaluation Board
1
Introduction
The LM3679TL evaluation board is a working demonstration of a step down DC-DC converter. This
application report contains information about the evaluation board. For further information on buck
converter topology, device electrical characteristics, and component selection, see the device-specific data
sheet.
2
General Description
The LM3679TL, a high efficient step down DC-DC switching buck converter, steps down a constant
voltage for cell phones, PDA’s, and many other applications from a single Li-ion battery ranging from 2.5 V
to 5.5 V. The automatic intelligent switching between PFM and PWM provides high efficiency throughout
the IOUT range. The LM3679 is available in a 1.8 V output voltage option in a 5-bump DSBGA and ultra thin
UR package*. Using the UR package along with specific external components, allows for a low profile
solution size with a max height of 0.55 mm. A switching frequency of 3 MHz (typ.) permits use of miniature
surface mount external components.
NOTE: Contact Texas Instruments for the UR samples.
3
Operating Conditions
•
•
•
•
4
VIN range: 2.5 V ≤ VIN ≤ 5.5 V
Recommended load current: 0 mA ≤ IOUT ≤ 350 mA
Ambient temperature (TA) range: -30°C to +85°C
Junction temperature (TJ) range: -30°C to +125°C
Typical Application
VIN
2.5V to 5.5V
L1: 1.0 PH
VIN
1
CIN
4.7 PF
GND
5
VOUT
SW
COUT
10 PF
LM3679
2
EN
3
4
FB
Figure 1. Typical Application Circuit
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SNVA270C – October 2007 – Revised April 2013
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1
Connection Diagram and Package Mark Information
5
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Connection Diagram and Package Mark Information
VIN
A1
A3
B2
EN
C3
C1
GND
GND
SW
SW
FB
FB
Top View
A3
A1
VIN
C1
EN
B2
C3
Bottom View
Figure 2. 5-Bump DSBGA and YPD Package
6
7
Pin Descriptions
Pin No
Name
Description
A1
VIN
Power supply input. Connect to the input filter capacitor (see Figure 1)
A3
GND
Ground pin
C1
EN
Enable input. The device is in shutdown mode when voltage to this pin is 1.0 V. Do not leave this pin floating.
C3
FB
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions.
B2
SW
Switching node connection to the internal PFET switch and NFET synchronous rectifier.
Powering the LM3679 for Bench Measurement
When powering the LM3679 with a bench power supply, it is recommended to place a 100 µF tantalum
capacitor across the VIN and GND supply terminals of the bench power supply. This capacitor reduces the
input spike caused by the power supply and long power cables. The combination of the power supply and
inductance within the power cables produce a large voltage spike that may damage the device. In
addition, consideration must be given to the enable pin of the device. The enable should never be taken
high, until minimum specified operating voltage of 2.7 V is reached. The enable pin should also never
exceed the input voltage.
8
Evaluation Board Layout
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the
performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and
resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter IC,
resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading to poor
solder joints between the DSBGA/YPD package and board pads. These poor solder joints can result in
erratic or degraded performance.
2
AN-1682 LM3679TL Evaluation Board
SNVA270C – October 2007 – Revised April 2013
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Evaluation Board Layout
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Figure 3. Top Layer (5-bump DSBGA/YPD)
Figure 4. Bottom Layer (5-bump DSBGA/YPD)
SNVA270C – October 2007 – Revised April 2013
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Evaluation Board Layout
8.1
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Board Layout Considerations
1. Place the LM3679 on 10.82 mil pads. As a thermal relief, connect to each pad with a 7 mil wide,
approximately 7 mil long trace, and then incrementally increase each trace to its optimal width. The
important criterion is symmetry to ensure the solder bumps on the re-flow evenly (see DSBGA
Package Assembly and Use).
2. Place the LM3679, inductor and filter capacitors close together and make the traces short. The traces
between these components carry relatively high switching currents and act as antennas. Following this
rule reduces radiated noise. Special care must be given to place the input filter capacitor very close to
the VIN and GND pin.
3. Arrange the components so that the switching current loops curl in the same direction. During the first
half of each cycle, current flows from the input filter capacitor, through the LM3679 and inductor to the
output filter capacitor and back through ground, forming a current loop. In the second half of each
cycle, current is pulled up from ground, through the LM3679 by the inductor, to the output filter
capacitor and then back through ground, forming a second current loop. Routing these loops so the
current curls in the same direction prevents magnetic field reversal between the two half-cycles and
reduces radiated noise.
4. Connect the ground pins of the LM3679, and filter capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then connect this to the ground-plane (if one is used) with
several vias. This reduces ground-plane noise by preventing the switching currents from circulating
through the ground plane. It also reduces ground bounce at the LM3679 by giving it a low-impedance
ground connection.
5. Use wide traces between the power components and for power connections to the DC-DC converter
circuit. This reduces voltage errors caused by resistive losses across the traces
6. Route noise sensitive traces such as the voltage feedback path away from noisy traces between the
power components. The voltage feedback trace must remain close to the LM3679 circuit and should
be routed directly from FB to VOUT at the output capacitor and should be routed opposite to noise
components. This reduces EMI radiated onto the DC-DC converter’s own voltage feedback trace.
7. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital
blocks and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced
through distance.
In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the
board, arrange the CMOS digital circuitry around it (since this also generates noise), and then place
sensitive pre-amplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is
shielded with a metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout
linear regulators.
4
AN-1682 LM3679TL Evaluation Board
SNVA270C – October 2007 – Revised April 2013
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Bill of Materials (BOM) For Common Configurations
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9
Bill of Materials (BOM) For Common Configurations
Table 1. Bill of Materials (BOM) For Common Configurations
Manufacture
Manufacture No
Description
LM3679 - 1.8 V FIXED
C1 (input C)
TDK
C1608X5R0J475
4.7 µF, 6.3 V, 0603, 10%
C2 (output C)
TDK
C1608X5R0J106
10 µF, 6.3 V, 0603, 10%
L1 (inductor)
FDK
MIPSA2520D
1.0 µH inductor, DCR = 100mΩ
R1 (VOUT to VFB )
Vishay
CRCW06030R00F
0 Ω, 0603, 1%
R2 (VFB to GND)
None
C3 (VOUT to VFB )
None
C4 (VFB to GND)
None
LM3679 - 1.8 V FIXED (Low Profile Application, 0.55 max height)
(1)
C1 (input C)
Taiyo-Yuden
JMK107BJ475K
4.7 µF, 6.3 V, 0603, (0.5 mm height)
C2 (output C)
Taiyo-Yuden
JMK107BJ475K
4.7 µF, 6.3 V, 0603, (0.5 mm height) X 2
L1 (inductor)
Murata
LQM21PN1R0M
1.0 µH inductor, (0.55 mm max height)
R1 (VOUT to VFB )
None
R2 (VFB to GND)
None
C3 (VOUT to VFB )
None
C4 (VFB to GND)
None
COMMON TO ALL
VIN banana jack - red
Johnson Components 108-0902-001
Connector, insulated banana jack (red)
VOUT banana jack - yellow
Johnson Components 108-0907-001
Connector, insulated banana jack (yellow)
GND banana jack - black
Johnson Components 108-0903-001
Connector, insulated banana jack (black)
Post for EN
Turrent
1573-2
Upright post from eval board
Post for VIN
Turrent
1502-2
Upright post from eval board
Post for VOUT
Turrent
1502-2
Upright post from eval board
Post for GND
Turrent
1502-2
Upright post from eval board
(1)
Contact Texas Instruments for the UR samples.
SNVA270C – October 2007 – Revised April 2013
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AN-1682 LM3679TL Evaluation Board
Copyright © 2007–2013, Texas Instruments Incorporated
5
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