LM397MFX/NOPB

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LM397 SNOS977F – MAY 2001 – REVISED MAY 2016 LM397 Single General-Purpose Voltage Comparator 1 Features 3 Description • The LM397 device is a single voltage comparator with an input common mode that includes ground. The LM397 is designed to operate from a single 5-V to 30-V power supply or a split power supply. Its low supply current is virtually independent of the magnitude of the supply voltage. 1 • • • • • • • • • • TA = 25°C. Typical Values Unless Otherwise Specified. 5-Pin SOT-23 Package Industrial Operating Range −40°C to +85°C Single or Dual Power Supplies Wide Supply Voltage Range 5 V to 30 V Low Supply Current 300 µA Low Input Bias Current 7 nA Low Input Offset Current ±1 nA Low Input Offset Voltage ±2 mV Response Time 440 ns (50-mV Overdrive) Input Common-Mode Voltage 0 to VS – 1.5 V The LM397 features an open-collector output stage. This allows the connection of an external resistor at the output. The output can directly interface with TTL, CMOS and other logic levels, by tying the resistor to different voltage levels (level translator). The LM397 is available in the space-saving 5-Pin SOT-23 package and is pin-compatible to TI’s TL331, a single differential comparator. Device Information(1) 2 Applications • • • • PART NUMBER A/D Converters Pulse, Square-Wave Generators Peak Detector Industrial Applications LM397 PACKAGE SOT-23 (5) BODY SIZE (NOM) 2.90 mm × 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Circuit VS R1 VIN RPULL-UP - VO + R3 R2 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM397 SNOS977F – MAY 2001 – REVISED MAY 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 7 7.1 Overview ................................................................... 7 7.2 Functional Block Diagram ......................................... 7 7.3 Feature Description................................................... 7 7.4 Device Functional Modes.......................................... 8 8 Application and Implementation .......................... 9 8.1 Application Information.............................................. 9 8.2 Typical Application ................................................... 9 9 Power Supply Recommendations...................... 11 10 Layout................................................................... 11 10.1 Layout Guidelines ................................................. 11 10.2 Layout Example .................................................... 11 11 Device and Documentation Support ................. 12 11.1 11.2 11.3 11.4 Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 12 12 12 12 12 Mechanical, Packaging, and Orderable Information ........................................................... 12 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (October 2015) to Revision F • Changed incorrect Pin Functions table entries. Pins 4 and 5 were swapped. ....................................................................... 3 Changes from Revision D (March 2013) to Revision E • 2 Page Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1 Changes from Revision C (March 2013) to Revision D • Page Page Changed layout of National Data Sheet to TI format ............................................................................................................. 8 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 LM397 www.ti.com SNOS977F – MAY 2001 – REVISED MAY 2016 5 Pin Configuration and Functions DBV Package 5-Pin SOT-23 Top View VIN - 1 5 VS 2 GND VIN + 4 3 OUTPUT Pin Functions PIN NAME NO. TYPE DESCRIPTION GND 2 P Ground OUTPUT 4 O Output VIN+ 3 I Noninverting Input VIN– 1 I Inverting Input VS 5 P Supply Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 3 LM397 SNOS977F – MAY 2001 – REVISED MAY 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT 30 30 V Supply voltages ±15 30 V Voltage at input pins −0.3 30 V 150 ºC Infrared or Convection (20 sec.) 235 ºC Wave Soldering (10 sec.) 260 ºC 150 ºC VIN differential Junction temperature (3) Soldering information −65 Storage Temperature, Tstg (1) (2) (3) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. The maximum power dissipation is a function of TJ(MAX), RθJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ RθJA . All numbers apply for packages soldered directly onto a PCB. 6.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) (2) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2) ±2000 Machine Model (1) (2) ±200 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). 6.3 Recommended Operating Conditions Supply voltage, VS Temperature (1) (1) MIN MAX 5 30 UNIT V −40 85 °C The maximum power dissipation is a function of TJ(MAX), RθJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ RθJA . All numbers apply for packages soldered directly onto a PCB. 6.4 Thermal Information LM397 THERMAL METRIC (1) DBV (SOT-23) UNIT 5 PINS RθJA Junction-to-ambient thermal resistance (2) 186 °C/W RθJC(top) Junction-to-case (top) thermal resistance 92.8 °C/W RθJB Junction-to-board thermal resistance 38.9 °C/W ψJT Junction-to-top characterization parameter 5.6 °C/W ψJB Junction-to-board characterization parameter 38.4 °C/W (1) (2) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. The maximum power dissipation is a function of TJ(MAX), RθJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ RθJA . All numbers apply for packages soldered directly onto a PCB. Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 LM397 www.ti.com SNOS977F – MAY 2001 – REVISED MAY 2016 6.5 Electrical Characteristics Unless otherwise specified, all limits are ensured for TA = 25°C, VS = 5 V, V− = 0 V, VCM = V+/2 = VO. PARAMETER TEST CONDITIONS VOS Input offset voltage VS = 5 V to 30 V, VO = 1.4 V, VCM = 0 V IOS Input offset current VO = 1.4 V, VCM = 0 V IB Input bias current VO = 1.4 V, VCM = 0 V IS Supply current IO Output sink current ILEAKAGE Output leakage current MIN (1) TA = 25ºC TYP (2) 2 At the temperature extremes MAX (1) 7 10 TA = 25ºC 1.6 At the temperature extremes 50 250 TA = 25ºC 10 At the temperature extremes 250 400 RL = open, VS = 5 V 0.25 0.7 RL = open, VS = 30 V 0.3 2 VIN+ = 1 V, VIN− = 0 V, VO = 1.5 V 6 VIN+ = 1 V, VIN− = 0 V, VO = 5 V VIN = 1 V, VIN = 0 V, VO = 30 V + TA = 25ºC mV nA nA mA 13 mA 0.1 nA 1 − UNIT 180 µA 400 VOL Output voltage low IO = −4 mA, VIN+ = 0 V, VIN− = 1 V VCM Common-mode input voltage range VS = 5 V to 30 V (3) AV Voltage gain VS = 15 V, VO = 1.4 V to 11.4 V, RL > = 15 kΩ connected to VS 120 Propagation delay (high to low) Input overdrive = 5 mV RL = 5.1 kΩ connected to 5 V, CL = 15 pF 900 tPHL Input overdrive = 50 mV RL = 5.1 kΩ connected to 5 V, CL = 15 pF 250 Input Overdrive = 5 mV RL = 5.1 kΩ connected to 5 V, CL = 15 pF 940 µs Input overdrive = 50 mV RL = 5.1 kΩ connected to 5 V, CL = 15 pF 440 ns tPLH (1) (2) (3) Propagation delay (low to high) At the temperature extremes 700 TA = 25ºC 0 VS – 1.5 At the temperature extremes 0 VS – 2 mV V V/mV ns All limits are specified by testing or statistical analysis. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material. The input common-mode voltage of either input should not be permitted to go below the negative rail by more than 0.3V. The upper end of the common-mode voltage range is VS – 1.5 V at 25°C. Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 5 LM397 SNOS977F – MAY 2001 – REVISED MAY 2016 www.ti.com 6.6 Typical Characteristics TA = 25°C. Unless otherwise specified. 14 0.45 -40°C 0.35 INPUT BIAS CURRENT (nA) SUPPLY CURRENT (mA) 0.4 25°C 0.3 85°C 0.25 0.2 0.15 0.1 0 5 10 15 25 20 SUPPLY VOLTAGE (V) 5 10 20 25 15 SUPPLY VOLTAGE (V) 30 Figure 2. Input Bias Current vs Supply Current 2.5 -40°C R 25 C R 85 C 85°C 2 25°C 1.5 1 10 OUTPUT SINK CURRENT (mA) 0 100 Figure 3. Output Saturation Voltage vs Output Sink Current 6 4 0 INPUT OFFSET VOLTAGE (mV) OUTPUT SATURATION VOLTAGE (V) 0.01 1 6 R -40 C 0.1 85°C 8 0 30 Figure 1. Supply Current vs Supply Voltage 1 25°C 10 2 0.05 0 -40°C 12 5 2 15 25 10 0 SUPPLY VOLTAGE (V) 30 Figure 4. Input Offset Voltage vs Supply Voltage Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 LM397 www.ti.com SNOS977F – MAY 2001 – REVISED MAY 2016 7 Detailed Description 7.1 Overview A comparator is often used to convert an analog signal to a digital signal. The comparator compares an input voltage (VIN) at the noninverting pin to the reference voltage (VREF) at the inverting pin. If VIN is less than VREF the output (VO) is low (VOL). However, if VIN is greater than VREF, the output voltage (VO) is high (VOH). Refer to Figure 6. VS VOLTS VO VREF - VIN + RPULL-UP VO VREF V - TIME VIN Figure 5. Basic Comparator Figure 6. Basic Comparator Output 7.2 Functional Block Diagram VS VIN+ OUTPUT VINGND 7.3 Feature Description 7.3.1 Input Stage The LM397 has a bipolar input stage. The input common-mode voltage range is from 0 to (VS – 1.5 V). 7.3.2 Output Stage The LM397 has an open-collector grounded-emitter NPN output transistor for the output stage. This requires an external pullup resistor connected between the positive supply voltage and the output. The external pullup resistor should be high enough resistance so to avoid excessive power dissipation. In addition, the pullup resistor should be low enough resistance to enable the comparator to switch with the load circuitry connected. Because it is an open-collector output stage, several comparator outputs can be connected together to create an OR’ing function output. With an open collector, the output can be used as a simple SPST switch to ground. The amount of current which the output can sink is approximately 10 mA. When the maximum current limit is reached, the output transistor will saturate and the output will rise rapidly (Figure 7). Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 7 LM397 SNOS977F – MAY 2001 – REVISED MAY 2016 www.ti.com Feature Description (continued) OUTPUT SATURATION VOLTAGE (V) 5 -40°C 4.5 85°C 4 3.5 25°C 3 2.5 2 1.5 1 0.5 0 1 10 OUTPUT SINK CURRENT (mA) 100 Figure 7. Output Saturation Voltage vs Output Sink Current 7.4 Device Functional Modes 7.4.1 Hysteresis The basic comparator configuration may oscillate or produce a noisy output if the applied differential input is near the input offset voltage of the comparator. This tends to occur when the voltage on the input is equal or very close to the other input voltage. Adding hysteresis can prevent this problem. Hysteresis creates two switching thresholds (one for the rising input voltage and the other for the falling input voltage). Hysteresis is the voltage difference between the two switching thresholds. When both inputs are nearly equal, hysteresis causes one input to effectively move quickly pass the other. Thus, effectively moving the input out of region that oscillation may occur. For an inverting configured comparator, hysteresis can be added with a three resistor network and positive feedback. When input voltage (VIN) at the inverting node is less than non-inverting node (VT), the output is high. The equivalent circuit for the three resistor network is R1 in parallel with R3 and in series with R2. The lower threshold voltage VT1 is calculated by Equation 1: VT1 = ((VS R2) / (((R1 R3) / (R1 + R3)) + R2)) (1) When VIN is greater than VT, the output voltage is low. The equivalent circuit for the three resistor network is R2 in parallel with R3 and in series with R1. The upper threshold voltage VT2 is calculated by Equation 2: VT2 = VS ((R2 R3) / (R2 + R3)) / (R1 + ((R2 R3) / (R2 + R3))) (2) The hysteresis is defined in Equation 3: ΔVIN = VT1 – VT2 (3) VO VT2 0 VT1 VIN Figure 8. Inverting Configured Comparator - LM397 8 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 LM397 www.ti.com SNOS977F – MAY 2001 – REVISED MAY 2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information LM397 will typically be used to compare a single signal to a reference or two signals against each other. 8.2 Typical Application VS R1 VIN RPULL-UP - VO + R3 R2 Figure 9. Inverting Comparator With Hysteresis 8.2.1 Design Requirements For this design example, use the parameters listed in Table 1 as the input parameters. Table 1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Input voltage range 0 V to VS – 1.5 V Supply voltage 5 V to 30 V Logic supply voltage (RPULLUP voltage) 5 V to 30 V Output current (VLOGIC/RPULLUP) 1 µA to 20 mA Input overdrive voltage 100 mV Reference voltage 5.5 V 8.2.2 Detailed Design Procedure When using TL331 in a general comparator application, determine the following: • Input voltage range • Minimum overdrive voltage • Output and drive current Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 9 LM397 SNOS977F – MAY 2001 – REVISED MAY 2016 www.ti.com 8.2.2.1 Input Voltage Range When choosing the input voltage range, the input common mode voltage range (VCM) must be taken in to account. If temperature operation is above or below 25°C the VCM can range from 0 V to VS – 1.5 V. This limits the input voltage range to as high as VS – 1.5 V and as low as 0 V. Operation outside of this range can yield incorrect comparisons. Below is a list of input voltage situation and their outcomes: 1. When both IN– and IN+ are both within the common mode range: (a) If IN– is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking current (b) If IN– is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is not conducting 2. When IN– is higher than common mode and IN+ is within common mode, the output is low and the output transistor is sinking current 3. When IN+ is higher than common mode and IN– is within common mode, the output is high impedance and the output transistor is not conducting 4. When IN– and IN+ are both higher than common mode, the output is low and the output transistor is sinking current 8.2.2.2 Minimum Overdrive Voltage Overdrive Voltage is the differential voltage produced between the positive and negative inputs of the comparator over the offset voltage. To make an accurate comparison; the overdrive voltage should be higher than the input offset voltage. Overdrive voltage can also determine the response time of the comparator, with the response time decreasing with increasing overdrive. 8.2.2.3 Output and Drive Current Output current is determined by the pullup resistance (RPULLUP) and VS voltage. The output current will produce a output low voltage (VOL) from the comparator. In which VOL is proportional to the output current. Use Figure 3 to determine VOL based on the output current. The output current can also effect the transient response. 8.2.3 Application Curves 10 6 VS = 5V, RPULL-UP = 5.1k: TO VS CL = 15pF TO GND 4 VOD = 5mV INPUT (mV) 2 10 OUTPUT (V) 8 0 10 0 50 VOD = 50mV 0 50 -100 200 OVERDRIVE VOLTAGE (VOD) 400 800 1200 1400 8 6 2000 VS = 5V, RPULL-UP = 5.1k: TO VS CL = 15pF TO GND 4 2 INPUT (mV) OUTPUT (V) 10 VOD = 50mV 0 10 0 50 VOD = 5mV 0 50 -100 200 OVERDRIVE VOLTAGE (VOD) 400 800 1200 1400 2000 TIME (ns) TIME (ns) Figure 10. Response Time for Various Input Overdrives – tPHL Figure 11. Response Time for Various Input Overdrives – tPLH Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 LM397 www.ti.com SNOS977F – MAY 2001 – REVISED MAY 2016 9 Power Supply Recommendations Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. For more detailed information on bypass capacitor placement; see the Layout Guidelines section. 10 Layout 10.1 Layout Guidelines Comparators are very sensitive to input noise. For best results, maintain the following layout guidelines: • Use a printed-circuit-board (PCB) with a good, unbroken low-inductance ground plane. Proper grounding (use of ground plane) helps maintain specified performance of the LM397. • To minimize supply noise, place a decoupling capacitor (0.1-μF ceramic, surface-mount capacitor) as close as possible to VS as shown in Figure 12. • On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback around the comparator. Keep inputs away from the output. • Solder the device directly to the PCB rather than using a socket. • For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less) placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some degradation to propagation delay when the impedance is low. Run the top-side ground plane between the output and inputs. • Run the ground pin ground trace under the device up to the bypass capacitor, shielding the inputs from the outputs. 10.2 Layout Example Run the input traces as far away from the supply lines as possible Use low-ESR, ceramic bypass capacitor VS+ IN+ IN+ GND V+ VS± or GND V± OUT OUT IN- INGND Only needed for dual-supply operation Figure 12. Comparator Board Layout Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 11 LM397 SNOS977F – MAY 2001 – REVISED MAY 2016 www.ti.com 11 Device and Documentation Support 11.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.2 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: LM397 PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM397MF ACTIVE SOT-23 DBV 5 1000 Non-RoHS & Green Call TI Level-1-260C-UNLIM -40 to 85 C397 LM397MF/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C397 LM397MFX/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C397 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of