0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
LM4766T/LF15

LM4766T/LF15

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TO220-15

  • 描述:

    Amplifier IC 2-Channel (Stereo) Class AB TO-220-15

  • 数据手册
  • 价格&库存
LM4766T/LF15 数据手册
LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 LM4766 Overture™ Audio Power Amplifier Series Dual 40W Audio Power Amplifier with Mute Check for Samples: LM4766 FEATURES DESCRIPTION • • The LM4766 is a stereo audio amplifier capable of delivering typically 40W per channel with the nonisolated "NDL" package and 30W per channel with the isolated "NDB" package of continuous average output power into an 8Ω load with less than 0.1% (THD+N). 1 23 • • • SPiKe Protection Minimal Amount of External Components Necessary Quiet Fade-In/Out Mute Mode Non-Isolated 15-Lead TO-220 Package Wide Supply Range 20V - 78V APPLICATIONS • • • High-End Stereo TVs Component Stereo Compact Stereo KEY SPECIFICATIONS • • THD+N at 1kHz at 2 x 30W Continuous Average Output Power Into 8Ω 0.1% (Max) THD+N at 1kHz at Continuous Average Output Power of 2 x 30W Into 8Ω 0.009% (Typ) The performance of the LM4766, utilizing its Self Peak Instantaneous Temperature (°Ke) (SPiKe) Protection Circuitry, places it in a class above discrete and hybrid amplifiers by providing an inherently, dynamically protected Safe Operating Area (SOA). SPiKe Protection means that these parts are safeguarded at the output against overvoltage, undervoltage, overloads, including thermal runaway and instantaneous temperature peaks. Each amplifier within the LM4766 has an independent smooth transition fade-in/out mute that minimizes output pops. The IC's extremely low noise floor at 2µV and its extremely low THD+N value of 0.06% at the rated power make the LM4766 optimum for highend stereo TVs or minicomponent systems. Connection Diagram Figure 1. Plastic Package Top View Non-Isolated TO-220 Package See Package Number NDL0015A Isolated PFM Package See Package Number NDB0015B 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Overture is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1998–2013, Texas Instruments Incorporated LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com Typical Application Numbers in parentheses represent pinout for amplifier B. *Optional component dependent upon specific design requirements. Figure 2. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) (3) (No Input) Supply Voltage |VCC| + |VEE| 78V (with Input) 74V Common Mode Input Voltage (VCC or VEE) and |VCC| + |VEE| ≤ 60V Differential Input Voltage 60V Output Current Internally Limited Power Dissipation (4) ESD Susceptibility (5) Junction Temperature 62.5W 3000V (6) 150°C Thermal Resistance Non-Isolated NDL-Package θJC 1°C/W Isolated NDB-Package θJC 2°C/W Soldering Information NDL and NDB Packages (1) (2) (3) (4) (5) (6) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified. For operating at case temperatures above 25°C, the device must be derated based on a 150°C maximum junction temperature and a thermal resistance of θJC = 1°C/W (junction to case) for the NDL package. Refer to the section DETERMINING THE CORRECT HEAT SINK in the APPLICATION INFORMATION section. Human body model, 100pF discharged through a 1.5kΩ resistor. The operating junction temperature maximum is 150°C, however, the instantaneous Safe Operating Area temperature is 250°C. OPERATING RATINGS (1) (2) TMIN ≤ TA ≤ TMAX Temperature Range Supply Voltage |VCC| + |VEE| (1) (2) (3) 260°C −40°C to +150°C Storage Temperature (3) −20°C ≤ TA ≤ +85°C 20V to 60V All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Operation is ensured up to 60V, however, distortion may be introduced from SPiKe Protection Circuitry if proper thermal considerations are not taken into account. Refer to the APPLICATION INFORMATION section for a complete explanation. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 3 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 ELECTRICAL CHARACTERISTICS www.ti.com (1) (2) The following specifications apply for VCC = +30V, VEE = −30V, IMUTE = −0.5mA with RL = 8Ω unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM4766 Typical (3) |VCC| + |VEE| PO (6) (7) Power Supply Voltage (5) Output Power (Continuous Average) Limit (4) Units (Limits) 20 V (min) 60 V (max) 40 30 W/ch (min) 30 25 W/ch (min) GND − VEE ≥ 9V 18 NDL Package, VCC = ±30V,THD+N = 0.1% (max), f = 1kHz, f = 20kHz NDB Package, VCC = ±26V (7), THD+N = 0.1% (max), f = 1kHz, f = 20kHz NDL Package, 30W/ch, RL = 8Ω, 20Hz ≤ f ≤ 20kHz, AV = 26dB 0.06 % NDB Package, 25W/ch, RL = 8Ω, 20Hz ≤ f ≤ 20kHz, AV = 26dB 0.06 % THD+N Total Harmonic Distortion Plus Noise Xtalk Channel Separation f = 1kHz, VO = 10.9Vrms 60 SR (6) Slew Rate VIN = 1.2Vrms, trise = 2ns 9 5 V/μs (min) Total Quiescent Power Supply Current Both Amplifiers VCM = 0V, VO = 0V, IO = 0mA 48 100 mA (max) VOS (8) Input Offset Voltage VCM = 0V, IO = 0mA 1 10 mV (max) IB Input Bias Current VCM = 0V, IO = 0mA 0.2 1 μA (max) IOS Input Offset Current VCM = 0V, IO = 0mA 0.01 0.2 μA (max) IO Output Current Limit |VCC| = |VEE| = 10V, tON = 10ms, VO = 0V (8) Itotal (8) VOD Output Dropout Voltage PSRR (8) CMRR (8) AVOL (8) GBWP eIN Power Supply Rejection Ratio 4 V (max) |VO–VEE|, VEE = −20V, IO = −100mA 2.5 4 V (max) VCC = 30V to 10V, VEE = −30V, VCM = 0V, IO = 0mA 125 85 dB (min) VCC = 30V, VEE = −30V to −10V VCM = 0V, IO = 0mA 110 85 dB (min) 75 dB (min) Open Loop Voltage Gain RL = 2kΩ, ΔVO = 40V 115 80 dB (min) Gain Bandwidth Product fO = 100kHz, VIN = 50mVrms 8 2 MHz (min) Input Noise IHF–A Weighting Filter, RIN = 600Ω (Input Referred) 2.0 8 μV (max) (6) Mute Attenuation (8) (9) Apk (min) 4 110 AM (6) (7) 3 1.5 VCC = 50V to 10V, VEE = −10V to −50V, VCM = 20V to −20V, IO = 0mA Signal-to-Noise Ratio (3) (4) (5) 4 |VCC–VO|, VCC = 20V, IO = +100mA Common Mode Rejection Ratio SNR (1) (2) (9) dB PO = 1W, A–Weighted, Measured at 1kHz, RS = 25Ω 98 dB PO = 25W, A–Weighted Measured at 1kHz, RS = 25Ω 112 dB Pin 6,11 at 2.5V 115 80 dB (min) All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specifications that all parts are tested in production to meet the stated values. VEE must have at least −9V at its pin with reference to ground in order for the under-voltage protection circuitry to be disabled. In addition, the voltage differential between VCC and VEE must be greater than 14V. AC Electrical Test; Refer to Test Circuit #2 . When using the isolated package (NDB), the θJC is 2°C/W verses 1°C/W for the non-isolated package (NDL). This increased thermal resistance from junction to case requires a lower supply voltage for decreased power dissipation within the package. Voltages higher than ±26V maybe used but will require a heat sink with less than 1°C/W thermal resistance to avoid activating thermal shutdown during normal operation. DC Electrical Test; Refer to Test Circuit #1 . The output dropout voltage, VOD, is the supply voltage minus the clipping voltage. Refer to the Clipping Voltage vs. Supply Voltage graph in the TYPICAL PERFORMANCE CHARACTERISTICS section. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 Test Circuit #1 (DC Electrical Test Circuit) Figure 3. Test Circuit #2 (AC Electrical Test Circuit) Figure 4. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 5 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com BRIDGED AMPLIFIER APPLICATION CIRCUIT Figure 5. Bridged Amplifier Application Circuit Single Supply Application Circuit *Optional components dependent upon specific design requirements. Figure 6. Single Supply Amplifier Application Circuit 6 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 Auxiliary Amplifier Application Circuit Figure 7. Special Audio Amplifier Application Circuit Equivalent Schematic (excluding active protection circuitry) Figure 8. LM4766 (One Channel Only) Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 7 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com External Components Description Components RB Prevents currents from entering the amplifier's non-inverting input which may be passed through to the load upon power down of the system due to the low input impedance of the circuitry when the undervoltage circuitry is off. This phenomenon occurs when the supply voltages are below 1.5V. 2 Ri Inverting input resistance to provide AC gain in conjunction with Rf. 3 Rf Feedback resistance to provide AC gain in conjunction with Ri. 4 Ci (1) Feedback capacitor which ensures unity gain at DC. Also creates a highpass filter with Ri at fC = 1/(2πRiCi). 5 CS Provides power supply filtering and bypassing. Refer to the SUPPLY BYPASSING section for proper placement and selection of bypass capacitors. 6 RV (1) (1) Acts as a volume control by setting the input voltage level. 7 RIN 8 CIN (1) Input capacitor which blocks the input signal's DC offsets from being passed onto the amplifier's inputs. 9 RSN (1) Works with CSN to stabilize the output stage by creating a pole that reduces high frequency instabilities. (1) 10 CSN 11 L (1) 12 R (1) 13 RA 14 CA Sets the amplifier's input terminals DC bias point when CIN is present in the circuit. Also works with CIN to create a highpass filter at fC = 1/(2πRINCIN). Refer to Figure 7. Works with RSN to stabilize the output stage by creating a pole that reduces high frequency instabilities. The pole is set at fC = 1/(2πRSNCSN). Refer to Figure 7. Provides high impedance at high frequencies so that R may decouple a highly capacitive load and reduce the Q of the series resonant circuit. Also provides a low impedance at low frequencies to short out R and pass audio signals to the load. Refer to Figure 7. Provides DC voltage biasing for the transistor Q1 in single supply operation. Provides bias filtering for single supply operation. (1) 15 RINP 16 RBI Provides input bias current for single supply operation. Refer to the CLICKS AND POPS application section for a more detailed explanation of the function of RBI. 17 RE Establishes a fixed DC current for the transistor Q1 in single supply operation. This resistor stabilizes the halfsupply point along with CA. 18 RM Mute resistance set up to allow 0.5mA to be drawn from pin 6 or 11 to turn the muting function off. → RM is calculated using: RM ≤ (|VEE| − 2.6V)/l where l ≥ 0.5mA. Refer to the Mute Attenuation vs Mute Current curves in the TYPICAL PERFORMANCE CHARACTERISTICS section. 19 CM Mute capacitance set up to create a large time constant for turn-on and turn-off muting. 20 S1 Mute switch that mutes the music going into the amplifier when opened. (1) 8 Functional Description 1 Limits the voltage difference between the amplifier's inputs for single supply operation. Refer to the CLICKS AND POPS application section for a more detailed explanation of the function of RINP. Optional components dependent upon specific design requirements. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS THD+N vs Frequency THD+N vs Frequency Figure 9. Figure 10. THD+N vs Output Power THD+N vs Output Power Figure 11. Figure 12. THD+N vs Distribution THD+N vs Distribution Figure 13. Figure 14. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 9 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) 10 Channel Separation vs Frequency Clipping Voltage vs Supply Voltage Figure 15. Figure 16. Output Power vs Load Resistance Output Power vs Supply Voltage Figure 17. Figure 18. Power Dissipation vs Output Power Power Dissipation vs Output Power Figure 19. Figure 20. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Max Heatsink Thermal Resistance (°C/W) at the Specified Ambient Temperature (°C) Note: The maximum heatsink thermal resistance values, θSA, in the table above were calculated using a θCS = 0.2°C/W due to thermal compound. Figure 21. Safe Area SPiKe Protection Response Figure 22. Figure 23. Pulse Power Limit Pulse Power Limit Figure 24. Figure 25. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 11 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) 12 Pulse Response Large Signal Response Figure 26. Figure 27. Power Supply Rejection Ratio Common-Mode Rejection Ratio Figure 28. Figure 29. Open Loop Frequency Response Supply Current vs Case Temperature Figure 30. Figure 31. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Input Bias Current vs Case Temperature Mute Attenuation vs Mute Current (per Amplifier) Figure 32. Figure 33. Mute Attenuation vs Mute Current (per Amplifier) Output Power/Channel vs Supply Voltage f = 1kHz, RL = 4Ω, 80kHz BW Figure 34. Figure 35. Output Power/Channel vs Supply Voltage f = 1kHz, RL = 6Ω, 80kHz BW Output Power/Channel vs Supply Voltage f = 1kHz, RL = 8Ω, 80kHz BW Figure 36. Figure 37. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 13 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com APPLICATION INFORMATION MUTE MODE The muting function of the LM4766 allows the user to mute the music going into the amplifier by drawing more than 0.5mA out of each mute pin on the device. This is accomplished as shown in the Typical Application Circuit where the resistor RM is chosen with reference to your negative supply voltage and is used in conjunction with a switch. The switch when opened cuts off the current flow from pin 6 or 11 to −VEE, thus placing the LM4766 into mute mode. Refer to the Mute Attenuation vs Mute Current curves in the TYPICAL PERFORMANCE CHARACTERISTICS section for values of attenuation per current out of pins 6 or 11. The resistance RM is calculated by the following equation: RM ≤ (|−VEE| − 2.6V)/Ipin6 where • Ipin6 = Ipin11 ≥ 0.5mA. (1) Both pins 6 and 11 can be tied together so that only one resistor and capacitor are required for the mute function. The mute resistance must be chosen such that greater than 1mA is pulled through the resistor RM so that each amplifier is fully pulled out of mute mode. Taking into account supply line fluctuations, it is a good idea to pull out 1mA per mute pin or 2 mA total if both pins are tied together. UNDER-VOLTAGE PROTECTION Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding capacitors to come up close to their full values before turning on the LM4766 such that no DC output spikes occur. Upon turn-off, the output of the LM4766 is brought to ground before the power supplies such that no transients occur at power-down. OVER-VOLTAGE PROTECTION The LM4766 contains over-voltage protection circuitry that limits the output current to approximately 4.0APK while also providing voltage clamping, though not through internal clamping diodes. The clamping effect is quite the same, however, the output transistors are designed to work alternately by sinking large current spikes. SPiKe PROTECTION The LM4766 is protected from instantaneous peak-temperature stressing of the power transistor array. The Safe Operating graph in the TYPICAL PERFORMANCE CHARACTERISTICS section shows the area of device operation where SPiKe Protection Circuitry is not enabled. The waveform to the right of the SOA graph exemplifies how the dynamic protection will cause waveform distortion when enabled. Please refer to AN-898 for more detailed information. THERMAL PROTECTION The LM4766 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device. When the temperature on the die reaches 165°C, the LM4766 shuts down. It starts operating again when the die temperature drops to about 155°C, but if the temperature again begins to rise, shutdown will occur again at 165°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal shutdown temperature limits of 165°C and 155°C. This greatly reduces the stress imposed on the IC by thermal cycling, which in turn improves its reliability under sustained fault conditions. Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen such that thermal shutdown will not be reached during normal operation. Using the best heat sink possible within the cost and space constraints of the system will improve the long-term reliability of any power semiconductor device, as discussed in the DETERMINING THE CORRECT HEAT SINK section. DETERMlNlNG MAXIMUM POWER DISSIPATION Power dissipation within the integrated circuit package is a very important parameter requiring a thorough understanding if optimum power output is to be obtained. An incorrect maximum power dissipation calculation may result in inadequate heat sinking causing thermal shutdown and thus limiting the output power. 14 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 Equation 2 exemplifies the theoretical maximum power dissipation point of each amplifier where VCC is the total supply voltage. PDMAX = VCC2/2π2RL (2) Thus by knowing the total supply voltage and rated output load, the maximum power dissipation point can be calculated. The package dissipation is twice the number which results from Equation 2 since there are two amplifiers in each LM4766. Refer to the graphs of Power Dissipation versus Output Power in the TYPICAL PERFORMANCE CHARACTERISTICS section which show the actual full range of power dissipation not just the maximum theoretical point that results from Equation 2. DETERMINING THE CORRECT HEAT SINK The choice of a heat sink for a high-power audio amplifier is made entirely to keep the die temperature at a level such that the thermal protection circuitry does not operate under normal circumstances. The thermal resistance from the die (junction) to the outside air (ambient) is a combination of three thermal resistances, θJC, θCS, and θSA. In addition, the thermal resistance, θJC (junction to case), of the LM4766T is 1°C/W. Using Thermalloy Thermacote thermal compound, the thermal resistance, θCS (case to sink), is about 0.2°C/W. Since convection heat flow (power dissipation) is analogous to current flow, thermal resistance is analogous to electrical resistance, and temperature drops are analogous to voltage drops, the power dissipation out of the LM4766 is equal to the following: PDMAX = (TJMAX−TAMB)/θJA where • • TJMAX = 150°C, TAMB is the system ambient temperature θJA = θJC + θCS + θSA (3) Once the maximum package power dissipation has been calculated using Equation 2, the maximum thermal resistance, θSA, (heat sink to ambient) in °C/W for a heat sink can be calculated. This calculation is made using Equation 4 which is derived by solving for θSA in Equation 3. θSA = [(TJMAX−TAMB)−PDMAX(θJC +θCS)]/PDMAX (4) Again it must be noted that the value of θSA is dependent upon the system designer's amplifier requirements. If the ambient temperature that the audio amplifier is to be working under is higher than 25°C, then the thermal resistance for the heat sink, given all other things are equal, will need to be smaller. SUPPLY BYPASSING The LM4766 has excellent power supply rejection and does not require a regulated supply. However, to improve system performance as well as eliminate possible oscillations, the LM4766 should have its supply leads bypassed with low-inductance capacitors having short leads that are located close to the package terminals. Inadequate power supply bypassing will manifest itself by a low frequency oscillation known as “motorboating” or by high frequency instabilities. These instabilities can be eliminated through multiple bypassing utilizing a large tantalum or electrolytic capacitor (10μF or larger) which is used to absorb low frequency variations and a small ceramic capacitor (0.1μF) to prevent any high frequency feedback through the power supply lines. If adequate bypassing is not provided, the current in the supply leads which is a rectified component of the load current may be fed back into internal circuitry. This signal causes distortion at high frequencies requiring that the supplies be bypassed at the package terminals with an electrolytic capacitor of 470μF or more. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 15 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com BRIDGED AMPLIFIER APPLICATION The LM4766 has two operational amplifiers internally, allowing for a few different amplifier configurations. One of these configurations is referred to as “bridged mode” and involves driving the load differentially through the LM4766's outputs. This configuration is shown in Figure 5. Bridged mode operation is different from the classical single-ended amplifier configuration where one side of its load is connected to ground. A bridge amplifier design has a distinct advantage over the single-ended configuration, as it provides differential drive to the load, thus doubling output swing for a specified supply voltage. Consequently, theoretically four times the output power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped. A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. For each operational amplifier in a bridge configuration, the internal power dissipation will increase by a factor of two over the single ended dissipation. Thus, for an audio power amplifier such as the LM4766, which has two operational amplifiers in one package, the package dissipation will increase by a factor of four. To calculate the LM4766's maximum power dissipation point for a bridged load, multiply Equation 2 by a factor of four. This value of PDMAX can be used to calculate the correct size heat sink for a bridged amplifier application. Since the internal dissipation for a given power supply and load is increased by using bridged-mode, the heatsink's θSA will have to decrease accordingly as shown by Equation 4. Refer to the section, DETERMINING THE CORRECT HEAT SINK for a more detailed discussion of proper heat sinking for a given application. SINGLE-SUPPLY AMPLIFIER APPLICATION The typical application of the LM4766 is a split supply amplifier. But as shown in Figure 6, the LM4766 can also be used in a single power supply configuration. This involves using some external components to create a halfsupply bias which is used as the reference for the inputs and outputs. Thus, the signal will swing around halfsupply much like it swings around ground in a split-supply application. Along with proper circuit biasing, a few other considerations must be accounted for to take advantage of all of the LM4766 functions, like the mute function. CLICKS AND POPS In the typical application of the LM4766 as a split-supply audio power amplifier, the IC exhibits excellent “click” and “pop” performance when utilizing the mute mode. In addition, the device employs Under-Voltage Protection, which eliminates unwanted power-up and power-down transients. The basis for these functions are a stable and constant half-supply potential. In a split-supply application, ground is the stable half-supply potential. But in a single-supply application, the half-supply needs to charge up just like the supply rail, VCC. This makes the task of attaining a clickless and popless turn-on more challenging. Any uneven charging of the amplifier inputs will result in output clicks and pops due to the differential input topology of the LM4766. To achieve a transient free power-up and power-down, the voltage seen at the input terminals should be ideally the same. Such a signal will be common-mode in nature, and will be rejected by the LM4766. In Figure 6, the resistor RINP serves to keep the inputs at the same potential by limiting the voltage difference possible between the two nodes. This should significantly reduce any type of turn-on pop, due to an uneven charging of the amplifier inputs. This charging is based on a specific application loading and thus, the system designer may need to adjust these values for optimal performance. As shown in Figure 6, the resistors labeled RBI help bias up the LM4766 off the half-supply node at the emitter of the 2N3904. But due to the input and output coupling capacitors in the circuit, along with the negative feedback, there are two different values of RBI, namely 10kΩ and 200kΩ. These resistors bring up the inputs at the same rate resulting in a popless turn-on. Adjusting these resistors values slightly may reduce pops resulting from power supplies that ramp extremely quick or exhibit overshoot during system turn-on. 16 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 LM4766 www.ti.com SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 AUDIO POWER AMPLlFIER DESIGN Design a 30W/8Ω Audio Amplifier Given: Power Output 30Wrms Load Impedance 8Ω Input Level 1Vrms(max) Input Impedance 47kΩ Bandwidth 20Hz−20kHz ±0.25dB A designer must first determine the power supply requirements in terms of both voltage and current needed to obtain the specified output power. VOPEAK can be determined from Equation 5 and IOPEAK from Equation 6. (5) (6) To determine the maximum supply voltage the following conditions must be considered. Add the dropout voltage to the peak output swing VOPEAK, to get the supply rail at a current of IOPEAK. The regulation of the supply determines the unloaded voltage which is usually about 15% higher. The supply voltage will also rise 10% during high line conditions. Therefore the maximum supply voltage is obtained from the following equation. Max supplies ≈ ± (VOPEAK + VOD) (1 + regulation) (1.1) (7) For 30W of output power into an 8Ω load, the required VOPEAK is 21.91V. A minimum supply rail of 25.4V results from adding VOPEAK and VOD. With regulation, the maximum supplies are ±32V and the required IOPEAK is 2.74A from Equation 6. It should be noted that for a dual 30W amplifier into an 8Ω load the IOPEAK drawn from the supplies is twice 2.74APK or 5.48APK. At this point it is a good idea to check the Power Output vs Supply Voltage to ensure that the required output power is obtainable from the device while maintaining low THD+N. In addition, the designer should verify that with the required power supply voltage and load impedance, that the required heatsink value θSA is feasible given system cost and size constraints. Once the heatsink issues have been addressed, the required gain can be determined from Equation 8. (8) From Equation 8, the minimum AV is: AV ≥ 15.5. By selecting a gain of 21, and with a feedback resistor, Rf = 20kΩ, the value of Ri follows from Equation 9. Ri = Rf (AV − 1) (9) Thus with Ri = 1kΩ a non-inverting gain of 21 will result. Since the desired input impedance was 47kΩ, a value of 47kΩ was selected for RIN. The final design step is to address the bandwidth requirements which must be stated as a pair of −3dB frequency points. Five times away from a −3dB point is 0.17dB down from passband response which is better than the required ±0.25dB specified. This fact results in a low and high frequency pole of 4Hz and 100kHz respectively. As stated in the External Components Description section, Ri in conjunction with Ci create a high-pass filter. Ci ≥ 1/(2π * 1kΩ * 4Hz) = 39.8μF; use 39μF. (10) The high frequency pole is determined by the product of the desired high frequency pole, fH, and the gain, AV. With a AV = 21 and fH = 100kHz, the resulting GBWP is 2.1MHz, which is less than the ensured minimum GBWP of the LM4766 of 8MHz. This will ensure that the high frequency response of the amplifier will be no worse than 0.17dB down at 20kHz which is well within the bandwidth requirements of the design. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 17 LM4766 SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision E (March 2013) to Revision #IMPLIED 18 Submit Documentation Feedback Page Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LM4766 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM4766T/NOPB ACTIVE TO-220 NDL 15 20 RoHS & Green SN Level-1-NA-UNLIM 0 to 70 LM4766T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
LM4766T/LF15 价格&库存

很抱歉,暂时无法提供与“LM4766T/LF15”相匹配的价格&库存,您可以联系我们找货

免费人工找货