LM4809LDBD

LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 LM4809 Dual 105mW Headphone Amplifier with ActiveLow Shutdown Mode Check for Samples: LM4809, LM4809LQBD FEATURES DESCRIPTION • • • • The LM4809 is a dual audio power amplifier capable of delivering 105mW per channel of continuous average power into a 16Ω load with 0.1% (THD+N) from a 5V power supply. 1 2 • • Active-Low Shutdown Mode "Click and Pop" Reduction Circuitry Low Shutdown Current WSON, MSOP, and SOIC Surface Mount Packaging No Bootstrap Capacitors Required Unity-Gain Stable APPLICATIONS • • • • Headphone Amplifier Personal Computers Microphone Preamplifier PDA's Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. Since the LM4809 does not require bootstrap capacitors or snubber networks, it is optimally suited for low-power portable systems. The unity-gain stable LM4809 can be configured by external gain-setting resistors. The LM4809 features an externally controlled, activelow, micropower consumption shutdown mode, as well as an internal thermal shutdown protection mechanism. KEY SPECIFICATIONS • • • THD+N at 1kHz at 105mW Continuous Average Power into 16Ω 0.1% (typ) THD+N at 1kHz at 70mW Continuous Average Power into 32Ω 0.1% (typ) Shutdown Current 0.4µA (typ) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2001–2013, Texas Instruments Incorporated LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com Typical Application *Refer to Application Information for information concerning proper selection of the input and output coupling capacitors. Figure 1. Typical Audio Amplifier Application Circuit Connection Diagrams Top View Top View Figure 2. VSSOP Package See Package Number DGK0008A 2 Submit Documentation Feedback Figure 3. SOIC Package See Package Number D0008A Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Top View Top View VDD 8 7 VOUT1 1 6 VIN2 VIN1 2 5 SHUTDOWN 3 4 Bypass Figure 4. WSON Package See Package Number NGL0008B VOUT2 GND Figure 5. WSON Package See Package Number NGP0008A Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 3 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage 6.0V −65°C to +150°C Storage Temperature ESD Susceptibility (3) 3.5kV (4) ESD Machine model 250V Junction Temperature (TJ) 150°C Vapor Phase (60 sec.) Soldering Information SOIC Package 215°C Infrared (15 sec.) 220°C θJA (SOIC) 170°C/W θJC (SOIC) 35°C/W θJA (MSOP) 210°C/W θJC (MSOP) Thermal Resistance 56°C/W θJA (WSON) 117°C/W (5) θJA (WSON) 150°C/W (6) θJC (WSON) (1) (2) (3) (4) (5) (6) 15°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human body model, 100pF discharged through a 1.5kΩ resistor. Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (resistance of discharge path must be under 50Ohms). The given θJA is for an LM4809 packaged in an NGL0008B wit the Exposed-Dap soldered to a printed circuit board copper pad with an area equivalent to that of the Exposed-Dap itself. The given θJA is for an LM4809 packaged in an NGL0008B with the Exposed-Dap not soldered to any printed circuit board copper. Operating Ratings TMIN ≤ TA ≤ TMAX Temperature Range −40°C ≤ T A ≤ 85°C 2.0V ≤ VCC ≤ 5.5V Supply Voltage (VCC) Electrical Characteristics VDD = 5V (1) (2) The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA = 25°C. Parameter LM4809 Test Conditions Typ (3) Limit 2.0 (4) Units (Limits) VDD Supply Voltage 5.5 V (max) IDD Supply Current VIN = 0V, IO = 0A 1.4 3 mA (max) ISD Shutdown Current VIN = 0V, VSHUTDOWN = GND 0.4 2 µA(max) VOS Output Offset Voltage VIN = 0V 4.0 50 mV(max) PO Output Power THD+N = 0.1%, f = 1kHz RL = 16Ω 105 V (min) mW RL = 32Ω 70 THD+N Total Harmonic Distortion PO = 50mW, RL = 32Ω f = 20Hz to 20kHz 0.3 % Crosstalk Channel Separation RL = 32Ω; PO = 70mW 70 dB PSRR Power Supply Rejection Ratio CB = 1.0µF; VRIPPLE = 200mVPP, f = 1kHz; Input terminated into 50Ω 70 dB (1) (2) (3) (4) 4 65 mW (min) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. All voltages are measured with respect to the ground pin, unless otherwise specified. Typical specifications are specified at +25OC and represent the most likely parametric norm. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Electrical Characteristics VDD = 5V (1)(2) (continued) The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA = 25°C. Parameter Test Conditions LM4809 Typ (3) Limit (4) Units (Limits) VSDIH Shutdown Voltage Input High 0.8 x VDD V (min) VSDIL Shutdown Voltage Input Low 0.2 x VDD V (max) Electrical Characteristics VDD = 3.3V (1) (2) The following specifications apply for VDD = 3.3V unless otherwise specified, limits apply to TA = 25°C. Parameter Test Conditions LM4809 Typ (3) Limit (4) Units (Limits) IDD Supply Current VIN = 0V, IO = 0A 1.1 mA ISD Shutdown Current VIN = 0V, VSHUTDOWN = GND 0.4 µA VOS Output Offset Voltage VIN = 0V 4.0 mV PO Output Power THD+N = 0.1%, f = 1kHz RL = 16Ω 40 mW RL = 32Ω 28 mW THD+N Total Harmonic Distortion PO = 25mW, RL = 32Ω f = 20Hz to 20kHz 0.4 % Crosstalk Channel Separation RL = 32Ω; PO = 25mW 70 dB PSRR Power Supply Rejection Ratio CB = 1.0µF; VRIPPLE = 200mVPP, f = 1kHz; Input terminated into 50Ω 70 dB VSDIH Shutdown Voltage Input High 0.8 x VDD V (min) VSDIL Shutdown Voltage Input Low 0.2 x VDD V (max) (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. All voltages are measured with respect to the ground pin, unless otherwise specified. Typical specifications are specified at +25OC and represent the most likely parametric norm. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Electrical Characteristics VDD = 2.6V (1) (2) The following specifications apply for VDD = 2.6V unless otherwise specified, limits apply to TA = 25°C. Parameter Test Conditions LM4809 Typ (3) Limit (4) Units (Limits) IDD Supply Current VIN = 0V, IO = 0A 0.9 mA ISD Shutdown Current VIN = 0V, VSHUTDOWN = GND 0.2 µA VOS Output Offset Voltage VIN = 0V 4.0 mV PO Output Power THD+N = 0.1%, f = 1kHz 20 mW RL = 16Ω RL = 32Ω 16 mW THD+N Total Harmonic Distortion PO = 15mW, RL = 32Ω f = 20Hz to 20kHz 0.6 % Crosstalk Channel Separation RL = 32Ω; PO = 15mW 70 dB PSRR Power Supply Rejection Ratio CB = 1.0µF; VRIPPLE = 200mVPP, f = 1kHz; Input terminated into 50Ω 70 dB VSDIH Shutdown Voltage Input High 0.8 x VDD V (min) VSDIL Shutdown Voltage Input Low 0.2 x VDD V (max) (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. All voltages are measured with respect to the ground pin, unless otherwise specified. Typical specifications are specified at +25OC and represent the most likely parametric norm. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 5 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com External Components Description Components 6 Functional Description (See Figure 1) 1. Ri The inverting input resistance, along with Rf, set the closed-loop gain. Ri, along with Ci, form a high pass filter with fc = 1/(2πRiCi). 2. Ci The input coupling capacitor blocks DC voltage at the amplifier's input terminals. Ci, along with Ri, create a highpass filter with fC = 1/(2πRiCi). Refer to the section, Selecting Proper External Components, for an explanation of determining the value of Ci. 3. Rf The feedback resistance, along with Ri, set closed-loop gain. 4. CS This is the supply bypass capacitor. It provides power supply filtering. Refer to the Application Information section for proper placement and selection of the supply bypass capacitor. 5. CB This is the BYPASS pin capacitor. It provides half-supply filtering. Refer to the section, Selecting Proper External Components, for information concerning proper placement and selection of CB. 6. CO This is the output coupling capacitor. It blocks the DC voltage at the amplifier's output and forms a high pass filter with RL at fO = 1/(2πRLCO) Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Typical Performance Characteristics THD+N vs Frequency THD+N vs Frequency Figure 6. Figure 7. THD+N vs Frequency THD+N vs Frequency Figure 8. Figure 9. THD+N vs Frequency THD+N vs Frequency Figure 10. Figure 11. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 7 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 8 THD+N vs Frequency THD+N vs Frequency Figure 12. Figure 13. THD+N vs Frequency THD+N vs Frequency Figure 14. Figure 15. THD+N vs Output Power THD+N vs Output Power Figure 16. Figure 17. Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Typical Performance Characteristics (continued) THD+N vs Output Power THD+N vs Output Power Figure 18. Figure 19. THD+N vs Output Power THD+N vs Output Power Figure 20. Figure 21. THD+N vs Output Power THD+N vs Output Power Figure 22. Figure 23. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 9 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 10 THD+N vs Output Power Output Power vs Load Resistance Figure 24. Figure 25. Output Power vs Load Resistance Output Power vs Load Resistance Figure 26. Figure 27. Output Power vs Supply Voltage Output Power vs Power Supply Figure 28. Figure 29. Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Output Power vs Power Supply Dropout Voltage vs Supply Voltage Figure 30. Figure 31. Power Dissipation vs Output Power Power Dissipation vs Output Power Figure 32. Figure 33. Power Dissipation vs Output Power Channel Separation Figure 34. Figure 35. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 11 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 12 Noise Floor Power Supply Rejection Ratio Figure 36. Figure 37. Open Loop Frequency Response Open Loop Frequency Response Figure 38. Figure 39. Open Loop Frequency Response Supply Current vs Supply Voltage Figure 40. Figure 41. Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 APPLICATION INFORMATION MICRO-POWER SHUTDOWN The voltage applied to the SHUTDOWN pin controls the LM4809's shutdown function. Activate micro-power shutdown by applying a logic low voltage to the SHUTDOWN pin. The logic threshold is typically VDD/2. When active, the LM4809's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The low 0.4µA typical shutdown current is achieved by applying a voltage that is as near as GND as possible to the SHUTDOWN pin. A voltage that is above GND may increase the shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external 100kΩ pull-down resistor between the SHUTDOWN pin and GND. Connect the switch between the SHUTDOWN pin and VDD. Select normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to GND through the pull-down resistor, activating micro-power shutdown. The switch and resistor ensure that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin with active circuitry eliminates the pull-down resistor. EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATION The LM4809's exposed-Dap (die attach paddle) package (LD or LQ) provides a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane, and surrounding air. The LD or LQ package should have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad may be connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and radiation area. However, since the LM4809 is designed for headphone applications, connecting a copper plane to the DAP's PCB copper pad is not required. Figure 34 in Typical Performance Characteristics shows that the maximum power dissipated is just 45mW per amplifier with a 5V power supply and a 32Ω load. Further detailed and specific information concerning PCB layout, fabrication, and mounting an NGL0008B or NGP0008A package is available from Texas Instruments' Package Engineering Group under application note AN1187. POWER DISSIPATION Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to ensure a successful design. Equation 1 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (VDD) 2 / (2π2RL) (1) Since the LM4809 has two operational amplifiers in one package, the maximum internal power dissipation point is twice that of the number which results from Equation 1. Even with the large internal power dissipation, the LM4809 does not require heat sinking over a large range of ambient temperature. From Equation 1, assuming a 5V power supply and a 32Ω load, the maximum power dissipation point is 40mW per amplifier. Thus the maximum package dissipation point is 80mW. The maximum power dissipation point obtained must not be greater than the power dissipation that results from Equation 2: PDMAX = (TJMAX − TA) / θJA (2) Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 13 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com For package MUA08A, θJA = 210°C/W. TJMAX = 150°C for the LM4809. Depending on the ambient temperature, TA, of the system surroundings, Equation 2 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 1 is greater than that of Equation 2, then either the supply voltage must be decreased, the load impedance increased or TA reduced. For the typical application of a 5V power supply, with a 32Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 133.2°C provided that device operation is around the maximum power dissipation point. Power dissipation is a function of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may be increased accordingly. Refer to the Typical Performance Characteristics curves for power dissipation information for lower output powers. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 5V regulator typically use a 10µF in parallel with a 0.1µF filter capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for a local 1.0µF tantalum bypass capacitance connected between the LM4809's supply pins and ground. Keep the length of leads and traces that connect capacitors between the LM4809's power supply pin and ground as short as possible. Connecting a 4.7µF capacitor, CB, between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, increases the amplifier's turn-on time. The selection of bypass capacitor values, especially CB, depends on desired PSRR requirements, click and pop performance (as explained in the section, Selecting Proper External Components), system cost, and size constraints. SELECTING PROPER EXTERNAL COMPONENTS Optimizing the LM4809's performance requires properly selecting external components. Though the LM4809 operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. The LM4809 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-tonoise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain demands input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal sources such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to the Audio Power Amplifier Design section for more information on selecting the proper gain. Input and Output Capacitor Value Selection Amplifying the lowest audio frequencies requires high value input and output coupling capacitors (CI and CO in Figure 1). A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150Hz. Applications using speakers with this limited frequency response reap little improvement by using high value input and output capacitors. Besides affecting system cost and size, Ci has an effect on the LM4809's click and pop performance. The magnitude of the pop is directly proportional to the input capacitor's size. Thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the desired −3dB frequency. Please refer to the Optimizing Click and Pop Reduction Performance section for a more detailed discussion on click and pop performance. As shown in Figure 1, the input resistor, RI and the input capacitor, CI, produce a −3dB high pass filter cutoff frequency that is found using Equation 3. In addition, the output load RL, and the output capacitor CO, produce a -3db high pass filter cutoff frequency defined by Equation 4. 14 fI-3db=1/2πRICI (3) fO-3db=1/2πRLCO (4) Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Also, careful consideration must be taken in selecting a certain type of capacitor to be used in the system. Different types of capacitors (tantalum, electrolytic, ceramic) have unique performance characteristics and may affect overall system performance. Bypass Capacitor Value Selection Besides minimizing the input capacitor size, careful consideration should be paid to the value of CB, the capacitor connected to the BYPASS pin. Since CB determines how fast the LM4809 settles to quiescent operation, its value is critical when minimizing turn-on pops. The slower the LM4809's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the smaller the turn-on pop. Choosing CB equal to 4.7µF along with a small value of Ci (in the range of 0.1µF to 0.47µF), produces a click-less and pop-less shutdown function. As discussed above, choosing Ci no larger than necessary for the desired bandwith helps minimize clicks and pops. OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE The LM4809 contains circuitry that minimizes turn-on and shutdown transients or “clicks and pop”. For this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated. During turn-on, the LM4809's internal amplifiers are configured as unity gain buffers. An internal current source charges up the capacitor on the BYPASS pin in a controlled, linear manner. The gain of the internal amplifiers remains unity until the voltage on the BYPASS pin reaches 1/2 VDD . As soon as the voltage on the BYPASS pin is stable, the device becomes fully operational. During device turn-on, a transient (pop) is created from a voltage difference between the input and output of the amplifier as the voltage on the BYPASS pin reaches 1/2 VDD. For this discussion, the input of the amplifier refers to the node between RI and CI. Ideally, the input and output track the voltage applied to the BYPASS pin. During turn-on, the buffer-configured amplifier output charges the input capacitor, CI, through the input resistor, RI. This input resistor delays the charging time of CI thereby causing the voltage difference between the input and output that results in a transient (pop). Higher value capacitors need more time to reach a quiescent DC voltage (usually 1/2 VDD) when charged with a fixed current. Decreasing the value of CI and RI will minimize turn-on pops at the expense of the desired -3dB frequency. Although the BYPASS pin current cannot be modified, changing the size of CB alters the device's turn-on time and the magnitude of “clicks and pops”. Increasing the value of CB reduces the magnitude of turn-on pops. However, this presents a tradeoff: as the size of CB increases, the turn-on time increases. There is a linear relationship between the size of CB and the turn-on time. Here are some typical turn-on times for various values of CB: CB TON 0.1µF 80ms 0.22µF 170ms 0.33µF 270ms 0.47µF 370ms 0.68µF 490ms 1.0µF 920ms 2.2µF 1.8sec 3.3µF 2.8sec 4.7µF 3.4sec 10µF 7.7sec In order eliminate “clicks and pops”, all capacitors must be discharged before turn-on. Rapidly switching VDD may not allow the capacitors to fully discharge, which may cause “clicks and pops”. In a single-ended configuration, the output is coupled to the load by CO. This capacitor usually has a high value. CO discharges through internal 20kΩ resistors. Depending on the size of CO, the discharge time constant can be relatively large. To reduce transients in single-ended mode, an external 1kΩ–5kΩ resistor can be placed in parallel with the internal 20kΩ resistor. The tradeoff for using this resistor is increased quiescent current. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 15 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com AUDIO POWER AMPLIFIER DESIGN Design a Dual 70mW/32Ω Audio Amplifier Given: Power Output 70 mW Load Impedance 32Ω Input Level 1 Vrms (max) Input Impedance 20kΩ Bandwidth 100 Hz–20 kHz ± 0.50dB The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. One way to find the minimum supply voltage is to use Figure 28 in the Typical Performance Characteristics section. Another way, using Equation 5, is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. To account for the amplifier's dropout voltage, two additional voltages, based on Figure 31 in Typical Performance Characteristics , must be added to the result obtained by Equation 5. For a single-ended application, the result is Equation 6. (5) VDD ≥ (2VOPEAK + (VODTOP + VODBOT)) (6) Figure 28 for a 32Ω load indicates a minimum supply voltage of 4.8V. This is easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom, allowing the LM4809 to produce peak output power in excess of 70mW without clipping or other audible distortion. The choice of supply voltage must also not create a situation that violates maximum power dissipation as explained above in the Power Dissipation section. Remember that the maximum power dissipation point from Equation 1 must be multiplied by two since there are two independent amplifiers inside the package. Once the power dissipation equations have been addressed, the required gain can be determined from Equation 7. (7) Thus, a minimum gain of 1.497 allows the LM4809 to reach full output swing and maintain low noise and THD+N perfromance. For this example, let AV=1.5. The amplifiers overall gain is set using the input (Ri ) and feedback (Rf ) resistors. With the desired input impedance set at 20kΩ, the feedback resistor is found using Equation 8. AV = Rf/Ri (8) The value of Rf is 30kΩ. 16 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 The last step in this design is setting the amplifier's −3db frequency bandwidth. To achieve the desired ±0.25dB pass band magnitude variation limit, the low frequency response must extend to at lease one−fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. The gain variation for both response limits is 0.17dB, well within the ±0.25dB desired limit. The results are an fL = 100Hz/5 = 20Hz (9) and a fH = 20kHz∗5 = 100kHz (10) As stated in the Selecting Proper External Components section, both Ri in conjunction with Ci, and Co with RL, create first order highpass filters. Thus to obtain the desired low frequency response of 100Hz within ±0.5dB, both poles must be taken into consideration. The combination of two single order filters at the same frequency forms a second order response. This results in a signal which is down 0.34dB at five times away from the single order filter −3dB point. Thus, a frequency of 20Hz is used in the following equations to ensure that the response is better than 0.5dB down at 100Hz. Ci ≥ 1 / (2π * 20kΩ * 20Hz) = 0.397µF; use 0.39µF. (11) Co ≥ 1 / (2π * 32Ω * 20Hz) = 249µF; use 330µF. (12) The high frequency pole is determined by the product of the desired high frequency pole, fH, and the closed-loop gain, AV. With a closed-loop gain of 1.5 and fH = 100kHz, the resulting GBWP = 150kHz which is much smaller than the LM4809's GBWP of 900kHz. This figure displays that if a designer has a need to design an amplifier with a higher gain, the LM4809 can still be used without running into bandwidth limitations. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 17 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com Demonstration Board Schematic Figure 42. LM4809 Demonstration Board Schematic Demonstration Board Layout Figure 43. Recommended DGK0008A PC Board Layout Component-Side Silkscreen 18 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Figure 44. Recommended DGK0008A PC Board Layout Component-Side Layout Figure 45. Recommended DGK0008A PC Board Layout Bottom-Side Layout Figure 46. Recommended NGL0008B PC Board Layout Component-Side Silkscreen Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 19 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com Figure 47. Recommended NGL0008B PC Board Layout Component-Side Layout Figure 48. Recommended NGL0008B PC Board Layout Bottom-Side Layout Figure 49. Recommended NGP0008A PC Board Layout Component-Side Silkscreen 20 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD LM4809, LM4809LQBD www.ti.com SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 Figure 50. Recommended NGP0008A PC Board Layout Component-Side Layout Figure 51. Recommended NGP0008A PC Board Layout Bottom-Side Layout Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD Submit Documentation Feedback 21 LM4809, LM4809LQBD SNAS126F – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision E (April 2013) to Revision F • 22 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 21 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4809 LM4809LQBD PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM4809LDX/NOPB ACTIVE WSON NGL 8 4500 RoHS & Green SN Level-3-260C-168 HR -40 to 85 G09 LM4809MM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 G09 LM4809MMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 G09 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of