LM4811LDBD

LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 LM4811 Dual 105mW Headphone Amplifier with Digital Volume Control and Shutdown Mode Check for Samples: LM4811 FEATURES DESCRIPTION • The LM4811 is a dual audio power amplifier capable of delivering 105mW per channel of continuous average power into a 16Ω load with 0.1% (THD+N) from a 5V power supply. 1 2 • • • • Digital Volume Control Range from +12dB to −33dB WSON and VSSOP Surface Mount Packaging "Click and Pop" Suppression Circuitry No Bootstrap Capacitors Required Low Shutdown Current APPLICATIONS • • • • Cellular Phones MP3, CD, DVD Players PDA's Portable Electronics KEY SPECIFICATIONS • • • THD+N at 1kHz, 105mW Continuous Average Output Power into 16Ω 0.1 % (typ) THD+N at 1kHz, 70mW Continuous Average Power into 32Ω 0.1 % (typ) Shutdown Current 0.3 μA (typ) Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. Since the LM4811 does not require bootstrap capacitors or snubber networks, it is optimally suited for low-power portable systems. The LM4811 features a digital volume control that sets the amplifier's gain from +12dB to −33dB in 16 discrete steps using a two−wire interface. The unity-gain stable LM4811 also features an externally controlled, active-high, micropower consumption shutdown mode. It also has an internal thermal shutdown protection mechanism. Connection Diagrams Top View Figure 1. VSSOP Package See Package Number DGS0010A Top View Figure 2. WSON Package See Package Number NGY0010A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com Top View Figure 3. SON Package See Package Number NHD0010A Typical Application *Refer to Application Information for information concerning proper selection of the input and output coupling capacitors. Figure 4. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage 6.0V −65°C to +150°C Storage Temperature ESD Susceptibility (3) ESD Susceptibility Machine model 2.5kV (4) 200V Junction Temperature (TJ) 150°C Vapor Phase (60 sec.) Soldering Information DGS0010A Package 215°C Infrared (15 sec.) 220°C θJA DGS0010A 194°C/W θJC DGS0010A θJA NGY0010A Thermal Resistance (1) (2) (3) (4) (5) 52°C/W (5) 63°C/W θJC NGY0010A (5) 12°C/W θJA NHD0010A (5) 63°C/W θJC NHD0010A (5) 12°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human body model, 100pF discharged through a 1.5kΩ resistor. Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (resistance of discharge path must be under 50 Ohms). The NGY0010A or NHD0010A package has its Exposed−DAP soldered to an exposed 2in2 area of 1oz printed circuit board copper. Operating Ratings TMIN ≤ TA ≤ TMAX Temperature Range −40°C ≤ T A ≤ 85°C 2.0V ≤ VCC ≤ 5.5V Supply Voltage Electrical Characteristics (1) (2) The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA = 25°C. Parameter VDD Test Conditions LM4811 Typ (3) Supply Voltage IDD Supply Current VIN = 0V, IO = 0A 1.3 ISD Shutdown Current VIN = 0V 0.3 VOS Output Offset Voltage VIN = 0V 4.0 PO Output Power 0.1% THD+N; f = 1kHz RL = 16Ω Limit (4) Units (Limits) 2.0 V (min) 5.5 V (max) 3.0 mA 50 mV µA 105 mW RL = 32Ω 70 mW THD+N Total Harmonic Distortion PO = 50mW, RL = 32Ω f = 20Hz to 20kHz 0.3 % Crosstalk Channel Separation RL = 32Ω; f = 1kHz; PO = 70mW 100 dB PSRR Power Supply Rejection Ratio CB = 1.0µF, VRIPPLE = 100mVPP f = 217Hz 60 dB VIH (CLOCK, UP/DN, SHUTDOWN) Input Voltage High (1) (2) (3) (4) 1.4 V (min) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. All voltages are measured with respect to the ground pin, unless otherwise specified. Typical specifications are specified at +25°C and represent the most likely parametric norm. Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 3 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (1)(2) (continued) The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA = 25°C. Parameter VIL Test Conditions LM4811 Typ (3) Limit (CLOCK, UP/DN, SHUTDOWN) Input Voltage Low Digital Volume Range (4) 0.4 Units (Limits) V (max) Input referred minimum gain −33 dB Input referred maximum gain +12 dB Digital Volume Stepsize All 16 discrete steps 3.0 dB Stepsize Error All 16 discrete steps ±0.3 dB Channel−to−Channel Volume Tracking Error All gain settings from −33dB to +12dB 0.15 dB Shutdown Attenuation Shutdown mode active −100 dB Electrical Characteristics (1) (2) The following specifications apply for VDD = 3.3V unless otherwise specified, limits apply to TA = 25°C. Parameter Test Conditions LM4811 Typ (3) Limit (4) Units (Limits) IDD Supply Current VIN = 0V, IO = 0A 1.1 mA ISD Shutdown Current VIN = 0V 0.3 µA VOS Output Offset Voltage VIN = 0V 4.0 mV Po Output Power 0.1% THD+N; f = 1kHz RL = 16Ω 40 mW RL = 32Ω 28 mW THD+N Total Harmonic Distortion PO = 25mW, RL = 32Ω f = 20Hz to 20kHz 0.5 % PSRR Power Supply Rejection Ratio CB = 1.0µF, VRIPPLE = 100mVPP f = 217Hz 60 dB VIH (CLOCK, UP/DN, SHUTDOWN) Input Voltage High 1.4 V (min) VIL (CLOCK, UP/DN, SHUTDOWN) Input Voltage Low 0.4 V (max) Input referred minimum gain −33 dB Digital Volume Range (1) (2) (3) (4) 4 Input referred maximum gain +12 dB Digital Volume Stepsize All 16 discrete steps 3.0 dB Stepsize Error All 16 discrete steps ±0.3 dB Channel−to−Channel Volume Tracking Error All gain settings from −33dB to +12dB 0.15 dB Shutdown Attenuation Shutdown mode active −100 dB Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. All voltages are measured with respect to the ground pin, unless otherwise specified. Typical specifications are specified at +25°C and represent the most likely parametric norm. Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 Electrical Characteristics (1) (2) The following specifications apply for VDD = 2.6V unless otherwise specified, limits apply to TA = 25°C. Parameter Test Conditions LM4811 Typ (3) Limit (4) Units (Limits) IDD Supply Current VIN = 0V, IO = 0A 1.0 ISD Shutdown Current VIN = 0V 0.3 mA µA VOS Output Offset Voltage VIN = 0V 4.0 mV Po Output Power 0.1% THD+N; f = 1kHz RL = 16Ω 20 mW RL = 32Ω 16 mW THD+N Total Harmonic Distortion PO = 15mW, RL = 32Ω f = 20Hz to 20kHz 0.6 % PSRR Power Supply Rejection Ratio CB = 1.0µF, VRIPPLE = 100mVPP f = 217Hz 60 dB VIH (CLOCK, UP/DN, SHUTDOWN) Input Voltage High 1.4 V (min) VIL (CLOCK, UP/DN, SHUTDOWN) Input Voltage Low 0.4 V (max) Input referred minimum gain −33 dB Input referred maximum gain +12 dB Digital Volume Stepsize All 16 discrete steps 3.0 dB Stepsize Error All 16 discrete steps ±0.3 dB Channel−to−Channel Volume Tracking Error All gain settings from −33dB to +12dB 0.15 dB Shutdown Attenuation Shutdown mode active −75 dB Digital Volume Range (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. All voltages are measured with respect to the ground pin, unless otherwise specified. Typical specifications are specified at +25°C and represent the most likely parametric norm. Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. External Components Description Components Functional Description (See Figure 4) 1. Ci This is the input coupling capacitor. It blocks the DC voltage at, and couples the input signal to, the amplifier's input terminals. Ci also creates a highpass filter with the internal input resistor, Ri, at fc = 1/(2πRiCi). The minimum value of Ri is 33kΩ. Refer to PROPER SELECTION OF EXTERNAL COMPONENTS for an explanation of how to determine the value of Ci. 2. CS This is the supply bypass capacitor. It provides power supply filtering. Refer to Application Information for proper placement and selection of the supply bypass capacitor. 3. CB This is the BYPASS pin capacitor. It provides half-supply filtering. Refer to PROPER SELECTION OF EXTERNAL COMPONENTS for information concerning proper placement and selection of CB. 4. CO This is the output coupling capacitor. It blocks the DC voltage at the amplifier's output and it forms a high pass filter with RL at fO = 1/(2πR LCO) Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 5 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics 6 THD+N vs Frequency THD+N vs Frequency Figure 5. Figure 6. THD+N vs Frequency THD+N vs Frequency Figure 7. Figure 8. THD+N vs Frequency THD+N vs Frequency Figure 9. Figure 10. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 Typical Performance Characteristics (continued) THD+N vs Frequency THD+N vs Frequency Figure 11. Figure 12. THD+N vs Frequency THD+N vs Output Power Figure 13. Figure 14. THD+N vs Output Power THD+N vs Output Power Figure 15. Figure 16. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 7 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 8 THD+N vs Output Power THD+N vs Output Power Figure 17. Figure 18. THD+N vs Output Power THD+N vs Output Power Figure 19. Figure 20. THD+N vs Output Power THD+N vs Output Power Figure 21. Figure 22. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Output Power vs Load Resistance Output Power vs Load Resistance Figure 23. Figure 24. Output Power vs Load Resistance Output Power vs Supply Voltage Figure 25. Figure 26. Output Power vs Power Supply Output Power vs Power Supply Figure 27. Figure 28. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 9 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 10 Dropout Voltage vs Supply Voltage Power Dissipation vs Output Power Figure 29. Figure 30. Power Dissipation vs Output Power Power Dissipation vs Output Power Figure 31. Figure 32. Channel Separation Channel Separation Figure 33. Figure 34. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Noise Floor Power Supply Rejection Ratio Figure 35. Figure 36. Power Supply Rejection Ratio Power Supply Rejection Ratio Figure 37. Figure 38. Frequency Response Supply Current vs Supply Voltage Figure 39. Figure 40. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 11 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com APPLICATION INFORMATION DIGITAL VOLUME CONTROL The LM4811's gain is controlled by the signals applied to the CLOCK and UP/DN inputs. An external clock is required to drive the CLOCK pin. At each rising edge of the clock signal, the gain will either increase or decrease by a 3dB step depending on the logic voltage level applied to the UP/DN pin. A logic high voltage level applied to the UP/DN pin causes the gain to increase by 3dB at each rising edge of the clock signal. Conversely, a logic low voltage level applied to the UP/DN pin causes the gain to decrease 3dB at each rising edge of the clock signal. For both the CLOCK and UP/DN inputs, the trigger point is 1.4V minimum for a logic high level, and 0.4V maximum for a logic low level. There are 16 discrete gain settings ranging from +12dB maximum to −33dB minimum. Upon device power on, the amplifier's gain is set to a default value of 0dB. However, when coming out of shutdown mode, the LM4811 will revert back to its previous gain setting. The LM4811's CLOCK and UP/DN pins should be debounced in order to avoid unwanted state changes during transitions between VIL and VIH. This will ensure correct operation of the digital volume control. A microcontroller or microprocessor output is recommended to drive the CLOCK and UP/DN pins. Figure 41. Timing Diagram POWER DISSIPATION Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to ensure a successful design. Equation 1 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (VDD) 2 / (2π2RL) (1) Since the LM4811 has two operational amplifiers in one package, the maximum internal power dissipation point is twice that of the number which results from Equation 1. Even with the large internal power dissipation, the LM4811 does not require heat sinking over a large range of ambient temperature. From Equation 1, assuming a 5V power supply and a 32Ω load, the maximum power dissipation point is 40mW per amplifier. Thus the maximum package dissipation point is 80mW. The maximum power dissipation point obtained must not be greater than the power dissipation predicted by Equation 2: PDMAX = (TJMAX − TA) / θJA 12 (2) Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 For the VSSOP package, θJA = 194°C/W, and for the WSON/SON package, θJA = 63°C/W. TJMAX = 150°C for the LM4811. For a given ambient temperature, TA, of the system surroundings, Equation 1 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 1 is greater than that of Equation 2, then either the supply voltage must be decreased, the load impedance increased, or TA reduced. For the VSSOP package in a typical application of a 5V power supply and a 32Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 134.5°C. This assumes the device operates at maximum power dissipation and uses surface mount packaging. Internal power dissipation is a function of output power. If typical operation is not around the maximum power dissipation point, operation at higher ambient temperatures is possible. Refer to Typical Performance Characteristics for power dissipation information for lower output power levels. EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATION The LM4811's exposed-dap (die attach paddle) package (WSON/SON) provides a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane, and surrounding air. The WSON/SON package should have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad may be connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and radiation area. However, since the LM4811 is designed for headphone applications, connecting a copper plane to the DAP's PCB copper pad is not required. Figure 32 in Typical Performance Characteristics shows that the maximum power dissipated is just 45mW per amplifier with a 5V power supply and a 32Ω load. Further detailed and specific information concerning PCB layout, fabrication, and mounting an WSON/SON package is available from Texas Instruments' Package Engineering Group under application note AN1187. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as possible. The value of the bypass capacitor directly affects the LM4811's half-supply voltage stability and PSRR. The stability and supply rejection increase as the bypass capacitor's value increases. Typical applications employ a 5V regulator with 10µF and a 0.1µF bypass capacitors which aid in supply stability, but do not eliminate the need for bypassing the supply nodes of the LM4811. The selection of bypass capacitors, especially CB, is thus dependent upon desired low frequency PSRR, click and pop performance, (explained in PROPER SELECTION OF EXTERNAL COMPONENTS), system cost, and size constraints. SHUTDOWN FUNCTION In order to reduce power consumption while not is use, the LM4811 features amplifier bias circuitry shutdown. This shutdown function is activated by applying a logic high to the SHUTDOWN pin. The trigger point is 1.4V minimum for a logic high level, and 0.4V maximum for a logic low level. It is best to switch between ground and VDD to ensure optimal shutdown operation. By switching the SHUTDOWN pin to VDD, the LM4811 supply current draw will be minimized in idle mode. Whereas the device will be disabled with shutdown voltages less than VDD, the idle current may be greater than the typical value of 0.3µA. In either case, the SHUTDOWN pin should be tied to a fixed voltage to avoid unwanted state changes. In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry. This provides a quick, smooth shutdown transition. Another solution is to use a single-pole, single-throw switch in conjunction with an external pull-up resistor. When the switch is closed, the SHUTDOWN pin is connected to ground and enables the amplifier. If the switch is open, the external pull-up resistor, RPU, will disable the LM4811. This scheme ensures that the SHUTDOWN pin will not float, thus preventing unwanted state changes. PROPER SELECTION OF EXTERNAL COMPONENTS Selection of external components when using integrated power amplifiers is critical for optimum device and system performance. While the LM4811 is tolerant of external component combinations, consideration must be given to the external component values that maximize overall system quality. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 13 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com The LM4811's unity-gain stability allows a designer to maximize system performance. Low gain settings maximize signal-to-noise performance and minimizes THD+N. Low gain configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1 Vrms are available from sources such as audio codecs. Please refer to AUDIO POWER AMPLIFIER DESIGN for a more complete explanation of proper gain selection. Selection of Input and Output Capacitor Size Besides gain, one of the major considerations is the closed loop bandwidth of the amplifier. To a large extent, the bandwidth is dicated by the choice of external components shown in Figure 4. Both the input coupling capacitor, Ci, and the output coupling capacitor, Co, form first order high pass filters which limit low frequency response. These values should be based on the desired frequency response weighed against the following: Large value input and output capacitors are both expensive and space consuming for portable designs. Clearly a certain sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150Hz. Thus large input and output capacitors may not increase system performance. In addition to system cost and size, click and pop performance is affected by the size of the input coupling capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally 1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable. Turn on pops can be minimized by reducing Ci value based on necessary low frequency response. Besides minimizing the input and output capacitor values, careful consideration should be paid to the bypass capacitor value. Bypass capacitor CB is the most critical component to minimize turn on pops since it determines how fast the LM4811 turns on. The slower the LM4811's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the smaller the turn on pop. While the device will function properly, (no oscillations or motorboating), with CB equal to 1µF, the device will be much more susceptible to turn on clicks and pops. Thus, a value of CB equal to 1µF or larger is recommended in all but the most cost sensitive designs. Also, careful consideration must be taken in selecting a certain type of capacitor to be used in the system. Different types of capacitors (tantalum, electrolytic, ceramic) have unique performance characteristics and may affect overall system performance. AUDIO POWER AMPLIFIER DESIGN Design a Dual 70mW/32Ω Audio Amplifier Given: Power Output 70mW Load Impedance 32Ω Input Level 1Vrms (max) Input Impedance 33kΩ (min) Bandwidth 100 Hz–20 kHz ± 0.50dB A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating from Figure 26 in Typical Performance Characteristics, the supply rail can be easily found. A second way to determine the minimum supply rail is to calculate the required VOPEAK using Equation 3 and add the dropout voltage. For a single-ended application, the minimum supply voltage can be approximated by (2VOPEAK + (VODTOP + VODBOT)), where VODBOT and VODTOP are extrapolated from Figure 29 in Typical Performance Characteristics. (3) 14 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 Using Figure 28 for a 32Ω load, the minimum supply rail is 4.8V. Since 5V is a standard supply voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates headroom that allows the LM4811 to reproduce peaks in excess of 70mW without clipping the signal. At this time, the designer must make sure that the power supply choice along with the output impedance does not violate the conditions explained in POWER DISSIPATION. Remember that the maximum power dissipation point from Equation 1 must be multiplied by two since there are two independent amplifiers inside the package. The final design step is to address the bandwidth requirements which must be stated as a pair of −3dB frequency points. Five times away from a −3dB point is 0.17dB down from passband response assuming a single pole roll-off. As stated in External Components Description, Ci and Co create first order highpass filters. Thus to obtain the desired frequency low response of 100Hz within ±0.5dB, both poles must be taken into consideration. The combination of two single order filters at the same frequency forms a second order response. This results in a signal which is down 0.34dB at five times away from the single order filter −3dB point. Thus, a frequency of 20Hz is used in the following equations to ensure that the response is better than 0.5dB down at 100Hz. Ci ≥ 1 / (2π * 33 kΩ * 20 Hz) = 0.241µF; use 0.39µF. (4) Co ≥ 1 / (2π * 32Ω * 20 Hz) = 249µF; use 330µF. (5) The high frequency pole is determined by the product of the desired high frequency pole, fH, and the closed-loop gain, AV. With a closed-loop gain of 3.98 or +12dB and fH = 100kHz, the resulting GBWP = 398kHz which is much smaller than the LM4811 GBWP of 1MHz. This figure displays that at the maximum gain setting of 3.98 or +12dB, the LM4811 can be used without running into bandwidth limitations. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 15 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com Figure 42. Demo Board Schematic Figure 43. Recommended VSSOP PC Board Layout: TOP Silk Screen 16 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 Figure 44. Recommended VSSOP PC Board Layout: TOP Top Layer Figure 45. Recommended VSSOP PC Board Layout: Bottom Layer Figure 46. Recommended WSON/SON PC Board Layout: TOP Silk Screen Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 17 LM4811 SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 www.ti.com Figure 47. Recommended WSON/SON PC Board Layout: TOP Top Layer Figure 48. Recommended WSON/SON PC Board Layout: Bottom Layer 18 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 LM4811 www.ti.com SNAS119D – DECEMBER 2000 – REVISED APRIL 2013 REVISION HISTORY Rev Date Description 0.1 04/06/06 Added NHD0010A Package and markings, then re-released D/S to the WEB (per Alvin F.). D 04/05/13 Changed layout of National Data Sheet to TI format. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4811 19 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM4811MM/NOPB ACTIVE VSSOP DGS 10 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 G11 LM4811MMX/NOPB ACTIVE VSSOP DGS 10 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 G11 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of