LM48312
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SNAS494D – JANUARY 2010 – REVISED MAY 2013
LM48312 Boomer™ Audio Power Amplifier Series 2.6W, Ultra-Low EMI, Filterless, Mono
Class D Audio Power Amplifier with E2S
Check for Samples: LM48312
FEATURES
DESCRIPTION
•
The LM48312 is a single supply, high efficiency,
mono, 2.6W, filterless switching audio amplifier. The
LM48312 features TI’s Enhanced Emissions
Suppression (E2S) system, that features a unique
patented ultra low EMI, spread spectrum, PWM
architecture, that significantly reduces RF emissions
while preserving audio quality and efficiency. The E2S
system improves battery life, reduces external
component count, board area consumption, and
system cost, simplifying design.
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•
•
•
•
•
•
•
•
•
Passes FCC Class B Radiated Emissions with
20 Inches of Cable
E2S System Reduces EMI While Preserving
Audio Quality and Efficiency
Output Short Circuit Protection with AutoRecovery
No Output Filter Required
Improved Audio Quality
Minimum External Components
Five Logic Selectable Gain Settings (0, 3, 6, 9,
12dB)
Low Power Shutdown Mode
Click and Pop Suppression
Available in Space-Saving DSBGA Package
APPLICATIONS
•
•
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Mobile Phones
PDAs
Laptops
KEY SPECIFICATIONS
•
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Efficiency at 3.6V, 400mW into 8Ω, 84% (Typ)
Efficiency at 5V, 1W into 8Ω, 88% (Typ)
Quiescent Power Supply Current at 5V, 3.1mA
Power Output at VDD = 5V, RL = 4Ω
– THD+N ≤ 10%, 2.6W (Typ)
– THD+N ≤ 1%, 2.1W (Typ)
Power Output at VDD = 5V, RL = 8Ω
– THD+N ≤ 10%, 1.6W (Typ)
– THD+N ≤ 1%, 1.3W (Typ)
Shutdown Current, 0.01μA (Typ)
The LM48312 is designed to meet the demands of
portable multimedia devices. Operating from a single
5V supply, the device is capable of delivering 2.6W of
continuous output power to a 4Ω load with less than
10% THD+N. Flexible power supply requirements
allow operation from 2.4V to 5.5V. The LM48312
features both a spread spectrum modulation scheme,
and an advanced, patented edge rate control (ERC)
architecture that significantly reduces emissions,
while maintaining high quality audio reproduction
(THD+N = 0.03%) and high efficiency (η = 88%).
The LM48312 features high efficiency compared to
conventional Class AB amplifiers, and other low EMI
Class D amplifiers. When driving an 8Ω speaker from
a 5V supply, the device operates with 88% efficiency
at PO = 1W. The LM48312 features five gain settings,
selected through a single logic input, further reducing
solution size. A low power shutdown mode reduces
supply current consumption to 0.01µA.
Advanced output short circuit protection with autorecovery prevents the device from being damaged
during fault conditions. Superior click and pop
suppression eliminates audible transients on powerup/down and during shutdown.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2013, Texas Instruments Incorporated
LM48312
SNAS494D – JANUARY 2010 – REVISED MAY 2013
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Typical Application
+2.4V to +5.5V
CS
CS
VDD
PVDD
SD
IN+
CIN
OUTA
GAIN
MODULATOR
H-BRIDGE
OUTB
INCIN
GND
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
A
IN+
SD
OUTA
B
VDD
PVDD
PGND
C
IN-
GAIN
OUTB
1
2
3
Figure 2. DSBGA Package
1.539mm x 1.565mm x 0.6mm
Top View
See Package Number YZR0009
2
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BUMP DESCRIPTION
Pin
Name
Description
A1
IN+
Non-Inverting Input
A2
SD
Active Low Shutdown Input. Connect to VDD for normal operation.
A3
OUTA
Non-Inverting Output
B1
VDD
B2
PVDD
Power Supply
H-Bridge Power Supply
B3
PGND
Ground
C1
IN-
Inverting Input
C2
GAIN
Gain Select:
GAIN = FLOAT: AV = 0dB
GAIN = VDD: AV = 3dB
GAIN = GND: AV = 6dB
GAIN = 20kΩ to GND = 9dB
GAIN = 20kΩ to VDD = 12dB
C3
OUTB
Inverting Output
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2) (3)
Supply Voltage
6.0V
−65°C to +150°C
Storage Temperature
− 0.3V to VDD +0.3V
Input Voltage
Power Dissipation (4)
Internally Limited
ESD Rating (5)
2000V
ESD Rating (6)
200V
Junction Temperature
Thermal Resistance
150°C
θJA
70°C/W
Soldering Information
See AN-1112 (SNVA009) "DSBGA Wafer Level Chip Scale Package."
(1)
(2)
(3)
(4)
(5)
(6)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at theAbsolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditionsindicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given inAbsolute Maximum Ratings,
whichever is lower.
Human body model, applicable std. JESD22-A114C.
Machine model, applicable std. JESD22-A115-A.
Operating Ratings (1) (2)
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage (VDD, PVDD)
(1)
(2)
−40°C ≤ TA ≤ +85°C
2.4V ≤ VDD ≤ 5.5V
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at theAbsolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditionsindicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
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Electrical Characteristics VDD = PVDD = 5V (1) (2)
The following specifications apply for AV = 6dB, RL = 8Ω, f = 1kHz, unless otherwise specified. Limits apply for TA = 25°C.
LM48312
Symbol
Parameter
Conditions
Min
(3)
VDD
Supply Voltage Range
IDD
Quiescent Power Supply Current
ISD
Shutdown Current
Shutdown enabled
VOS
Differential Output Offset Voltage
VIN = 0
VIH
Logic Input High Voltage
VIL
Logic Input Low Voltage
TWU
Wake Up Time
fSW
Switching Frequency
RIN
PO
PSRR
CMRR
Input Resistance
(1)
(2)
(3)
(4)
4
Common Mode Rejection Ratio
2.6
3.1
3.3
3.9
mA
mA
–48
0.01
1.0
μA
10
48
mV
V
= FLOAT
= VDD
= GND
= 20kΩ to GND
= 20kΩ to VDD
V
ms
300±30
AV = 0dB
AV = 3dB
AV = 6dB
AV = 9dB
AV = 12dB
Power Supply Rejection Ratio
V
7.5
Gain
Total Harmonic Distortion + Noise
5.5
0.4
kHz
–0.5
2.5
5.5
8.5
11.5
0
3
6
9
12
20
56
49
42
35
27
kΩ
kΩ
kΩ
kΩ
kΩ
RL = 4Ω, THD = 10%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.3V
VDD = 2.5V
2.6
1.1
580
W
W
mW
RL = 8Ω, THD = 10%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.3V
VDD = 2.5V
1.6
660
354
W
mW
mW
RL = 4Ω, THD = 1%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.3V
VDD = 2.5V
2.1
900
460
W
mW
mW
1.3
530
286
W (min)
mW
mW
PO = 200mW, RL = 8Ω, f = 1kHz
0.027
%
PO = 100mW, RL = 8Ω, f = 1kHz
0.03
%
71
70
dB
dB
65
dB
RL = 8Ω, THD = 1%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.3V
VDD = 2.5V
THD+N
Units
(Limits)
1.4
GAIN
GAIN
GAIN
GAIN
GAIN
Output Power
(3)
(4)
2.4
VIN = 0, RL = 8Ω
VDD = 3.3V
VDD = 5V
AV
Max
Typ
VRIPPLE = 200mVP-P Sine,
Inputs AC GND, AV = 0dB,
CIN = 1μF
fRIPPLE = 217Hz
fRIPPLE = 1kHz
VRIPPLE = 1VP-P , fRIPPLE = 217Hz
AV = 0dB
1.1
450
0.5
3.5
6.5
9.5
12.5
dB
dB
dB
dB
dB
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
RL is a resistive load in series with two inductors to simulate an actual speaker load. For RL = 8Ω, the load is 15µH + 8Ω, +15µH. For RL
= 4Ω, the load is 15µH + 4Ω + 15µH.
Datasheet min/max specification limits are specified by test or statistical analysis.
Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not ensured.
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Electrical Characteristics VDD = PVDD = 5V(1)(2) (continued)
The following specifications apply for AV = 6dB, RL = 8Ω, f = 1kHz, unless otherwise specified. Limits apply for TA = 25°C.
LM48312
Symbol
Parameter
Conditions
Min
(3)
η
Efficiency
VDD = 5V, POUT = 1W
VDD = 3.3V, POUT = 400mW
SNR
Signal to Noise Ratio
PO = 1W
CMVR
Common Mode Input Voltage Range
εOS
0
Un-weighted, AV = 0dB
A-weighted, AV = 0dB
Output Noise
Typ
(4)
Max
(3)
Units
(Limits)
88
85
%
%
95
dB
VDD – 0.25
V
69
48
μV
μV
Test Circuits
200 mVp-p
AUDIO
ANALYZER
VDD
+
VDD
-
LPF
IN+
ZL
DUT
IN-
Figure 3. PSRR Test Circuit
VDD
AUDIO
ANALYZER
-
+
VDD
LPF
IN+
DUT
IN-
ZL
200 mVp-p
Figure 4. CMRR Test Circuit
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Typical Performance Characteristics
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
100
THD+N vs Frequency
VDD = 2.5V, PO = 180mW, RL = 8Ω
100
10
THD+N (%)
THD+N (%)
10
1
0.1
0.01
1
0.1
0.01
0.001
10
100
1k
10k
0.001
10
100k
Figure 6.
100
100k
THD+N vs Frequency
VDD = 2.5V, PO = 300mW, RL = 8Ω
10
THD+N (%)
THD+N (%)
10k
Figure 5.
1
0.1
0.01
1
0.1
0.01
0.001
10
100
1k
10k
0.001
10
100k
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 7.
Figure 8.
THD+N vs Frequency
VDD = 3.3V, PO = 600mW, RL = 4Ω
THD+N vs Frequency
VDD = 5V, PO = 900mW, RL = 4Ω
100
1
0.1
0.01
0.001
10
100k
10
THD+N (%)
10
THD+N (%)
1k
FREQUENCY (Hz)
10
6
100
FREQUENCY (Hz)
THD+N vs Frequency
VDD = 5V, PO = 600mW, RL = 8Ω
100
100
THD+N vs Frequency
VDD = 3.3V, PO = 325mW, RL = 8Ω
1
0.1
0.01
100
1k
10k
100k
0.001
10
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9.
Figure 10.
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100k
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
THD+N vs Frequency
VDD = 5V, PO = 1W, RL = 3Ω
100
100
VDD = 5V
10
THD+N (%)
THD+N (%)
10
THD+N vs Output Power
AV = 0dB, f = 1kHz, RL = 8Ω
1
0.1
VDD = 3.3V
1
VDD = 2.5V
0.1
0.01
0.01
0.001
0.001
10
100
1k
10k
100k
0.01
0.1
1
10
OUTPUT POWER (W)
FREQUENCY (Hz)
Figure 11.
100
Figure 12.
THD+N vs Output Power
AV = 3dB, f = 1kHz, RL = 8Ω
100
THD+N vs Output Power
AV = 6dB, f = 1kHz, RL = 8Ω
VDD = 5V
VDD = 5V
10
VDD = 3.3V
1
THD+N (%)
THD+N (%)
10
VDD = 2.5V
0.1
0.01
0.001
VDD = 3.3V
1
0.1
0.01
0.1
1
0.01
0.001
10
OUTPUT POWER (W)
100
VDD = 2.5V
0.01
Figure 14.
THD+N vs Output Power
AV = 9dB, f = 1kHz, RL = 8Ω
THD+N vs Output Power
AV = 12dB, f = 1kHz, RL = 8Ω
100
10
VDD = 3.3V
THD+N (%)
THD+N (%)
10
VDD = 5V
10
VDD = 2.5V
0.1
0.01
0.001
1
Figure 13.
VDD = 5V
1
0.1
OUTPUT POWER (W)
VDD = 3.3V
1
VDD = 2.5V
0.1
0.01
0.1
1
10
OUTPUT POWER (W)
0.01
0.001
0.01
0.1
1
10
OUTPUT POWER (W)
Figure 15.
Figure 16.
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
100
THD+N vs Output Power
AV = 0dB, f = 1kHz, RL = 4Ω
VDD = 5V
10
THD+N (%)
THD+N (%)
100
VDD = 5V
10
THD+N vs Output Power
AV = 3dB, f = 1kHz, RL = 4Ω
VDD = 3.3V
1
VDD = 2.5V
0.1
VDD = 3.3V
1
VDD = 2.5V
0.1
0.01
0.001
0.01
0.1
1
0.01
0.001
10
OUTPUT POWER (W)
0.01
Figure 17.
100
1
10
Figure 18.
THD+N vs Output Power
AV = 6dB, f = 1kHz, RL = 4Ω
THD+N vs Output Power
AV = 9dB, f = 1kHz, RL = 4Ω
100
VDD = 5V
VDD = 5V
10
10
VDD = 3.3V
1
THD+N (%)
VDD = 3.3V
THD+N (%)
0.1
OUTPUT POWER (W)
VDD = 2.5V
1
VDD = 2.5V
0.1
0.1
0.01
0.001
0.01
0.1
1
10
0.01
0.001
OUTPUT POWER (W)
0.01
0.1
1
10
OUTPUT POWER (W)
100
Figure 19.
Figure 20.
THD+N vs Output Power
AV = 12dB, f = 1kHz, RL = 4Ω
THD+N vs Output Power
AV = 0dB, f = 1kHz, RL = 3Ω
100
VDD = 5V
VDD = 5V
10
10
VDD = 3.3V
THD+N (%)
THD+N (%)
VDD = 3.3V
1
VDD = 2.5V
0.1
0.01
0.001
VDD = 2.5V
0.1
0.01
0.1
1
10
OUTPUT POWER (W)
0.01
0.001
0.01
0.1
1
10
OUTPUT POWER (W)
Figure 21.
8
1
Figure 22.
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
100
THD+N vs Output Power
AV = 3dB, f = 1kHz, RL = 3Ω
100
THD+N vs Output Power
AV = 6dB, f = 1kHz, RL = 3Ω
VDD = 5V
VDD = 5V
10
VDD = 3.3V
VDD = 3.3V
THD+N (%)
THD+N (%)
10
1
VDD = 2.5V
1
VDD = 2.5V
0.1
0.01
0.001
0.1
0.01
0.1
1
0.01
0.001
10
0.01
OUTPUT POWER (W)
Figure 23.
100
0.1
1
10
OUTPUT POWER (W)
Figure 24.
THD+N vs Output Power
AV = 9dB, f = 1kHz, RL = 3Ω
100
THD+N vs Output Power
AV = 12dB, f = 1kHz, RL = 3Ω
VDD = 5V
VDD = 5V
10
10
VDD = 3.3V
THD+N (%)
THD+N (%)
VDD = 3.3V
1
VDD = 2.5V
1
0.1
0.01
0.001
VDD = 2.5V
0.1
0.01
0.1
1
0.01
0.001
10
0.01
OUTPUT POWER (W)
10
OUTPUT POWER (W)
Figure 26.
Efficiency vs Output Power
f = 1kHz, RL = 4Ω
Efficiency vs Output Power
f = 1kHz, RL = 8Ω
100
90
90
80
80
70
70
VDD = 3.3V
60
VDD = 2.5V
50
1
Figure 25.
EFFICIENCY (%)
EFFICIENCY (%)
100
0.1
VDD = 5V
40
30
VDD = 3.3V
VDD = 5V
VDD = 2.5V
60
50
40
30
20
20
10
10
0
0
0
500
1000
1500
2000
2500
0
250
500
750
1000
1250 1500
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 27.
Figure 28.
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
Power Dissipation vs Output Power
f = 1kHz, RL = 4Ω
VDD = 5V
150
125
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
400
300
VDD = 3.3V
200
VDD = 2.5V
100
Power Dissipation vs Output Power
f = 1kHz, RL = 8Ω
VDD = 5V
100
VDD = 2.5V
75
VDD = 3.3V
50
25
0
0
0
500
1000
1500
2000
2500
0
250
750
1000
1250
1500
OUTPUT POWER (mW)
OUTPUT POWER (mW)
3.5
500
Figure 29.
Figure 30.
Output Power vs Supply Voltage
f = 1kHz, RL = 4Ω
Output Power vs Supply Voltage
f = 1kHz, RL = 8Ω
2
3
1.5
OUTPUT POWER (W)
OUTPUT POWER (W)
THD + N = 10%
2.5
2
1.5
1
THD + N = 1%
THD + N = 10%
1
THD + N = 1%
0.5
0.5
0
2.5
3
3.5
4
4.5
5
0
2.5
5.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 31.
Figure 32.
PSRR vs Frequency
VDD = 5V, VRIPPLE = 200mVP-P, RL = 8Ω
CMRR vs Frequency
VDD = 5V, VRIPPLE = 1VP-P, RL = 8Ω
0
0
-10
-20
-30
CMRR(dB)
PSRR (dB)
-20
-40
-50
-60
-40
-60
-70
-80
10
100
1k
10k
100k
-80
10
FREQUENCY (Hz)
1k
10k
100k
FREQUENCY (Hz)
Figure 33.
10
100
Figure 34.
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
0
Spread Spectrum Output Spectrum
vs Frequency
VDD = 5V, VIN = 1VRMS, RL = 8Ω
Wideband Spread Spectrum Output Spectrum
vs Frequency
VDD = 5V, RL = 8Ω
0
-10
-20
-30
AMPLITUDE (dBV)
AMPLITUDE (dBV)
-20
-40
-60
-80
-40
-50
-60
-70
-80
-100
-90
-120
10
100
1k
10k
-100
100
100k
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 35.
Figure 36.
Supply Current vs Supply Voltage
No Load
Shutdown Supply Current vs Supply Voltage
No Load
4
0.05
3
SUPPLY CURRENT (PA)
SUPPLY CURRENT (mA)
10k
2
1
0
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
0.04
0.03
0.02
0.01
0
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
Figure 37.
Figure 38.
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APPLICATION INFORMATION
GENERAL AMPLIFIER FUNCTION
The LM48312 mono Class D audio power amplifier features a filterless modulation scheme that reduces external
component count, conserving board space and reducing system cost. The outputs of the device transition from
VDD to GND with a 300kHz switching frequency. With no signal applied, the outputs (VOUTA and VOUTB) switch
with a 50% duty cycle, in phase, causing the two outputs to cancel. This cancellation results in no net voltage
across the speaker, thus there is no current to the load in the idle state.
With the input signal applied, the duty cycle (pulse width) of the LM48312 outputs changes. For increasing output
voltage, the duty cycle of VOUTA increases, while the duty cycle of VOUTB decreases. For decreasing output
voltages, the converse occurs. The difference between the two pulse widths yields the differential output voltage.
ENHANCED EMISSIONS SUPPRESSION SYSTEM (E2S)
The LM48312 features TI’s patented E2S system that reduces EMI, while maintaining high quality audio
reproduction and efficiency. The E2S system features spread spectrum and advanced edge rate control (ERC).
The LM48312 ERC greatly reduces the high frequency components of the output square waves by controlling the
output rise and fall times, slowing the transitions to reduce RF emissions, while maximizing THD+N and
efficiency performance. The overall result of the E2S system is a filterless Class D amplifier that passes FCC
Class B radiated emissions standards with 20in of twisted pair cable, with excellent 0.03% THD+N and high 88%
efficiency.
SPREAD SPECTRUM
The spread spectrum modulation reduces the need for output filters, ferrite beads or chokes. The switching
frequency varies randomly by 30% about a 300kHz center frequency, reducing the wideband spectral contend,
improving EMI emissions radiated by the speaker and associated cables and traces. Where a fixed frequency
class D exhibits large amounts of spectral energy at multiples of the switching frequency, the spread spectrum
architecture of the LM48312 spreads that energy over a larger bandwidth (See Typical Performance
Characteristics). The cycle-to-cycle variation of the switching period does not affect the audio reproduction,
efficiency, or PSRR.
DIFFERENTIAL AMPLIFIER EXPLANATION
As logic supplies continue to shrink, system designers are increasingly turning to differential analog signal
handling to preserve signal to noise ratios with restricted voltage signs. The LM48312 features a fully differential
speaker amplifier. A differential amplifier amplifies the difference between the two input signals. Traditional audio
power amplifiers have typically offered only single-ended inputs resulting in a 6dB reduction of SNR relative to
differential inputs. The LM48312 also offers the possibility of DC input coupling which eliminates the input
coupling capacitors. A major benefit of the fully differential amplifier is the improved common mode rejection ratio
(CMRR) over single ended input amplifiers. The increased CMRR of the differential amplifier reduces sensitivity
to ground offset related noise injection, especially important in noisy systems.
POWER DISSIPATION AND EFFICIENCY
The major benefit of a Class D amplifier is increased efficiency versus a Class AB. The efficiency of the
LM48312 is attributed to the region of operation of the transistors in the output stage. The Class D output stage
acts as current steering switches, consuming negligible amounts of power compared to their Class AB
counterparts. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET onresistance, along with switching losses due to gate charge.
GAIN SETTING
The LM48312 features five internally configured gain settings, 0, 3, 6, 9, and 12dB. The device gain is selected
through a single pin (GAIN). The gain settings are shown in Table 1. The gain of the LM48312 is determined at
startup. When the LM48312 is powered up or brought out of shutdown, the device checks the state of GAIN, and
sets the amplifier gain accordingly. Once the gain is set, the state of GAIN is ignored and the device gain cannot
be changed until the device is either shutdown or powered down.
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Table 1. Gain Setting
GAIN
GAIN SETTING
FLOAT
0dB
VDD
3dB
GND
6dB
20kΩ to GND
9dB
20kΩ to VDD
12dB
For proper gain selection:
1. Use 20kΩ resistors with 10% tolerance or better for the 9dB and 12dB gain settings.
2. Short GAIN to either VDD or GND through 100Ω or less for the 3dB and 6dB gain settings.
3. FLOAT = 20MΩ or more for the 0dB gain setting.
SHUTDOWN FUNCTION
The LM48312 features a low current shutdown mode. Set SD = GND to disable the amplifier and reduce supply
current to 0.01µA.
Switch SD between GND and VDD for minimum current consumption is shutdown. The LM48312 may be disabled
with shutdown voltages in between GND and VDD, the idle current will be greater than the typical 0.1µA value.
Increased THD+N may also be observed when a voltage of less than VDD is applied to SD.
The LM48312 shutdown input has and internal pulldown resistor. The purpose of this resistor is to eliminate any
unwanted state changes when SD is floating. To minimize shutdown current, SD should be driven to GND or left
floating. If SD is not driven to GND or floating, an increase in shutdown supply current will be noticed.
PROPER SELECTION OF EXTERNAL COMPONENTS
Audio Amplifier Power Supply Bypassing/Filtering
Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass
capacitors as close to the device as possible. Typical applications employ a voltage regulator with 10µF and
0.1µF bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing
of the LM48312 supply pins. A 1µF capacitor is recommended.
Audio Amplifier Input Capacitor Selection
Input capacitors may be required for some applications, or when the audio source is single-ended. Input
capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of
the audio source and the bias voltage of the LM48312. The input capacitors create a high-pass filter with the
input resistors RIN. The -3dB point of the high pass filter is found using Equation 1 below.
f = 1 / 2πRINCIN
(1)
Where RIN is the value of the input resistor given in the Electrical Characteristics table.
The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers
cannot reproduce, and may even be damaged by low frequencies. High pass filtering the audio signal helps
protect the speakers. When the LM48312 is using a single-ended source, power supply noise on the ground is
seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217Hz in a
GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors
with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR.
Single-Ended Audio Amplifier Configuration
The LM48312 is compatible with single-ended sources. When configured for single-ended inputs, input
capacitors must be used to block and DC component at the input of the device. Figure 39 shows the typical
single-ended applications circuit.
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VDD
1 PF
VDD
PVDD
LM48312
SINGLE-ENDED
AUDIO INPUT
INOUTA
OUTB
IN+
Figure 39. Single-Ended Input Configuration
PCB LAYOUT GUIDELINES
As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and
power supply create a voltage drop. The voltage loss due to the traces between the LM48312 and the load
results in lower output power and decreased efficiency. Higher trace resistance between the supply and the
LM48312 has the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing
peak output power. The effects of residual trace resistance increases as output current increases due to higher
output power, decreased load impedance or both. To maintain the highest output voltage swing and
corresponding peak output power, the PCB traces that connect the output pins to the load and the supply pins to
the power supply should be as wide as possible to minimize trace resistance.
The use of power and ground planes will give the best THD+N performance. In addition to reducing trace
resistance, the use of power planes creates parasitic capacitors that help to filter the power supply line.
The inductive nature of the transducer load can also result in overshoot on one of both edges, clamped by the
parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that can
radiate or conduct to other components in the system and cause interference. In is essential to keep the power
and output traces short and well shielded if possible. Use of ground planes beads and micros-strip layout
techniques are all useful in preventing unwanted interference.
As the distance from the LM48312 and the speaker increases, the amount of EMI radiation increases due to the
output wires or traces acting as antennas become more efficient with length. Ferrite chip inductors places close
to the LM48312 outputs may be needed to reduce EMI radiation.
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Demo Board Schematic
Figure 40. LM48312 Demoboard Schematic
LM48312TL Demoboard Bill of Materials
Designator
Quantity
Description
C1
1
10µF ±10% 16V Tantalum Capacitor (B Case) AVX TPSB106K016R0800
C2
1
1µF ±10% 16V X5R Ceramic Capacitor (603) Panasonic ECJ-1VB1C105K
C3, C4
2
1µF ±10% 16V X7R Ceramic Capacitor (1206) Panasonic ECJ-3YB1C105K
R1, R2
2
20kΩ ± 5% 1/10W Thick Film Resistor (603) Vishay CRCW060320R0JNEA
LM48312TL
1
LM48312TL (9-Bump DSBGA)
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PC Board Layout
16
Figure 41. Top Silkscreen
Figure 42. Top Layer
Figure 43. Layer 2 (GND)
Figure 44. Layer 3 (VDD)
Figure 45. Bottom Layer
Figure 46. Bottom Silkscreen
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REVISION HISTORY
Rev
Date
1.0
01/20/10
Initial WEB released.
Description
1.01
03/19/10
Text edits under the ENHANCED EMISSIONS section.
1.02
05/13/10
Edited Table 1.
1.03
07/25/12
Corrected the cover page (at WEB) (TI) from LM483127 to LM48312.
Changes from Revision C (May 2013) to Revision D
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM48312TLE/NOPB
ACTIVE
DSBGA
YZR
9
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
G
N4
LM48312TLX/NOPB
ACTIVE
DSBGA
YZR
9
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
G
N4
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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