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LM4841 Boomer® Audio Power Amplifier Series Stereo 2W Amplifiers with DC Volume
Control, Transient Free Outputs, and Cap-less Headphone Drive
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FEATURES
DESCRIPTION
•
The LM4841 is a monolithic integrated circuit that
provides DC volume control and stereo bridged audio
power amplifiers capable of producing 2W into 4Ω or
2.2W into 3Ω with less than 1.0% THD (see (1) (2)).
1
23
•
•
•
•
•
•
Stereo Headphone Amplifier Mode that
Eliminates the Output Coupling Capacitors
(Patent Pending)
Acoustically Enhanced DC Volume Control
Taper
System Beep Detect
Stereo Switchable Bridged/Single-ended
Power Amplifiers
Selectable Internal/External Gain and Bass
Boost
Advanced “Click and Pop” Suppression
Circuitry
Thermal Shutdown Protection Circuitry
APPLICATIONS
•
•
•
Portable and Desktop Computers
Multimedia Monitors
Portable Radios, PDAs, and Portable TVs
KEY SPECIFICATIONS
•
•
•
PO at 1% THD+N
– Into 3Ω (MH and LQ): 2.2W (typ)
– Into 4Ω (MH and LQ): 2.0W (typ)
– Into 8Ω (MT, MH, and LQ): 1.1W (typ)
Single-Ended THD+N at 85mW into 32Ω:
1.0%(typ)
Shutdown Current: 0.7µA (typ)
The LM4841 uses advanced, latest generation
circuitry to eliminate all traces of clicks and pops
when the supply voltages is first applied. The
amplifier has a headphone-amplifier-select input pin
that is used to switch the amplifiers from bridge to
single-ended mode for driving headphones. A new
circuit topology eliminates headphone output coupling
capacitors (patent pending).
Boomer® audio integrated circuits are designed
specifically to provide high quality audio while
requiring a minimum amount of external components.
The LM4841 incorporates a DC volume control,
stereo bridged audio power amplifiers and a
selectable gain or bass boost, making it optimally
suited for multimedia monitors, portable radios,
desktop, and portable computer applications.
The LM4841 features an externally controlled, lowpower consumption shutdown mode (Shutdown Low),
and both a power amplifier and headphone mute for
maximum system flexibility and performance.
(1)
(2)
When properly mounted to the circuit board, LM4841MH and
LM4841LQ will deliver 2W into 4Ω. The LM4841MT will
deliver 1.1W into 8Ω. See the APPLICATION INFORMATION
section for LM4841MH usage information.
An LM4841MH that has been properly mounted to the circuit
board and forced-air cooled will deliver 2.2W into 3Ω.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Boomer is a registered trademark of Rockford Corporation.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
CONNECTION DIAGRAM
TSSOP Package (Top View)
Figure 1. See Package Number PW0028A and PWP0028A for Exposed-DAP
WQFN Package (Top View)
Figure 2. See Package Number NJB0028A for Exposed-DAP
2
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BLOCK DIAGRAM
Figure 3. LM4841 Block Diagram
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ABSOLUTE MAXIMUM RATINGS (1) (2)
Supply Voltage
6.0V
Storage Temperature
-65°C to +150°C
−0.3V to VDD +0.3V
Input Voltage
Power Dissipation
(3)
ESD Susceptibility
(4)
Internally limited
All pins except Pin 28
2500V
Pin 28
6500V
ESD Susceptibility
(5)
200V
Junction Temperature
150°C
Soldering Information
Small Outline Package
Vapor Phase (60 sec.)
215°C
Infrared (15 sec.)
220°C
θJC (typ)—NJB0028A
3°C/W
θJA (typ)—NJB0028A
42°C/W
θJC (typ)—PW0028A
20°C/W
θJA (typ)—PW0028A
80°C/W
θJC (typ)—PWP0028A
2°C/W
θJA (typ)—PWP0028A (exposed DAP) (6)
41°C/W
θJA (typ)—PWP0028A (exposed DAP) (7)
54°C/W
θJA (typ)—PWP0028A (exposed DAP) (8)
59°C/W
(9)
93°C/W
θJA (typ)—PWP0028A (exposed DAP)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θ JA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX − TA )/θJA. For the LM4841MT and LM4841LQ, TJMAX = 150°C. See
POWER DISSIPATION for further information.
Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Machine Model, 220 pF–240 pF discharged through all pins.
The θJA given is for an PWP0028A package whose exposed-DAP is soldered to a 2in2 piece of 1 ounce printed circuit board copper on
a bottom side layer through 21 8mil vias.
The θJA given is for an PWP0028A package whose exposed-DAP is soldered to an exposed 2in 2 piece of 1 ounce printed circuit board
copper.
The θJA given is for an PWP0028A package whose exposed-DAP is soldered to an exposed 1in 2 piece of 1 ounce printed circuit board
copper.
The θJA given is for an PWP0028A package whose exposed-DAP is not soldered to any copper.
OPERATING RATINGS
Temperature Range
TMIN ≤ TA ≤TMAX
−40°C ≤TA ≤ 85°C
2.7V≤ VDD ≤ 5.5V
Supply Voltage
4
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ELECTRICAL CHARACTERISTICS FOR ENTIRE IC (1) (2)
The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25°C.
LM4841
Symbol
Parameter
Conditions
Typical
Limit
(3)
VDD
(4)
Supply Voltage
2.7
V (min)
5.5
V (max)
mA (max)
IDD
Quiescent Power Supply Current
VIN = 0V, IO = 0A
15
30
ISD
Shutdown Current
Vshutdown = GND
0.7
2.0
VIH
Headphone Sense High Input Voltage
VIL
Headphone Sense Low Input Voltage
THum
Un-Mute Threshold Voltage
(1)
(2)
(3)
(4)
Gain 1st Stage = 1
Vshutdown = VDD
VIN applied to A or B input
22
Units
(Limits)
μA (max)
4
V (min)
0.8
V (max)
10
40
mVrms
mVrms
All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 3.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to AOQL ( Average Outgoing Quality Level). Data sheet min/max specification limits are specified by design, test, or
statistical analysis.
ELECTRICAL CHARACTERISTICS FOR VOLUME ATTENUATORS (1) (2)
The following specifications apply for VDD = 5V. Limits apply for TA = 25°C.
LM4841
Symbol
Parameter
Limit
(4)
Units
(Limits)
±0.75
dB (max)
Attenuation with VDCVol = 0V (BM & SE)
-75
dB (min)
Vmute = 5V, Bridged Mode (BM)
-78
dB (min)
Vmute = 5V, Single-Ended Mode (SE)
-78
dB (min)
Conditions
Typical
(3)
CRANGE
Attenuator Range
AM
Mute Attenuation
(1)
(2)
(3)
(4)
Gain with VDCVol = 5V, No Load
All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 3.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to AOQL ( Average Outgoing Quality Level). Data sheet min/max specification limits are specified by design, test, or
statistical analysis.
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ELECTRICAL CHARACTERISTICS FOR SINGLE-ENDED MODE OPERATION (1) (2)
The following specifications apply for VDD = 5V. Limits apply for TA = 25°C.
LM4841
Symbol
Parameter
Conditions
Typical
(3)
PO
Output Power
Limit
(4)
Units
(Limits)
THD = 1.0%; f = 1kHz; RL = 32Ω
85
mW
THD = 10%; f = 1 kHz; RL = 32Ω
95
mW
0.065
%
THD+N
Total Harmonic Distortion+Noise
VOUT = 1VRMS, f=1kHz, RL = 10kΩ, AVD
=1
PSRR
Power Supply Rejection Ratio
CB = 1.0 μF, f =120 Hz, VRIPPLE = 200
mVrms
58
dB
SNR
Signal to Noise Ratio
POUT =75 mW, R L = 32Ω, A-Wtd Filter
102
dB
Xtalk
Channel Separation
f=1kHz, CB = 1.0 μF
65
dB
(1)
All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 3.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to AOQL ( Average Outgoing Quality Level). Data sheet min/max specification limits are specified by design, test, or
statistical analysis.
(2)
(3)
(4)
ELECTRICAL CHARACTERISTICS FOR BRIDGED MODE OPERATION (1) (2)
The following specifications apply for VDD = 5V, unless otherwise noted. Limits apply for TA = 25°C.
LM4841
Symbol
Parameter
Conditions
Typical
Limit
(4)
Units
(Limits)
5
±50
mV (max)
(3)
VOS
Output Offset Voltage
VIN = 0V, No Load
PO
Output Power
THD + N = 1.0%; f=1kHz; RL = 3Ω (5)
THD + N = 1.0%; f=1kHz; RL = 4Ω
THD+N
Total Harmonic Distortion+Noise
(6)
2.2
W
2
W
THD = 1% (max);f = 1 kHz;
RL = 8Ω
1.1
1.0
W (min)
THD+N = 10%;f = 1 kHz; RL = 8Ω
1.5
W
PO = 1W, 20 Hz< f < 20 kHz,
RL = 8Ω, AVD = 2
0.3
%
PO = 340 mW, RL = 32Ω
1.0
%
PSRR
Power Supply Rejection Ratio
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms; RL = 8Ω
74
dB
SNR
Signal to Noise Ratio
VDD = 5V, POUT = 1.1W, RL = 8Ω, AWtd Filter
93
dB
Xtalk
Channel Separation
f=1kHz, CB = 1.0 μF
70
dB
(1)
(2)
(3)
(4)
(5)
(6)
6
All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 3.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to AOQL ( Average Outgoing Quality Level). Data sheet min/max specification limits are specified by design, test, or
statistical analysis.
When driving 3Ω loads from a 5V supply, LM4841MH and LM4841LQ must be mounted to the circuit board and forced-air cooled.
When driving 4Ω loads from a 5V supply, the LM4841MH and LM4841LQ must be mounted to the circuit board.
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TYPICAL APPLICATION
Figure 4. Typical Application Circuit ( MT / MH Package Pinout )
TRUTH TABLE FOR LOGIC INPUTS
(1)
Headphone Sense
Gain Select
Mode
Mute
Output Stage Set
To
Volume Control
X
0
0
0
Internal Gain
On
X
0
0
0
Internal Gain
On
X
1
0
0
External Gain
On
X
1
0
0
External Gain
On
On
0
1
0
Internal Gain
On
Off
0
1
0
External Gain
On
On
1
1
0
External Gain
On
Off
1
1
0
Internal Gain
On
X
X
X
1
X
Muted
(1)
If system beep is detected on the Beep In pin (pin 11), the system beep will be passed through the bridged amplifier regardless of the
logic of the Mute and HP sense pins.
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TYPICAL PERFORMANCE MH/LQ SPECIFIC CHARACTERISTICS
LM4841MH/LQ
THD+N vs Output Power
LM4841MH/LQ
THD+N vs Frequency
Figure 5.
Figure 6.
LM4841MH/LQ
THD+N vs Output Power
LM4841MH/LQ
THD+N vs Frequency
Figure 7.
Figure 8.
LM4841MH/LQ
Power Dissipation vs Output Power
Figure 9.
(1)
8
LM4841MH/LQ
Power Derating Curve
(1)
Figure 10.
These curves show the thermal dissipation ability of the LM4841MH/LQ at different ambient temperatures given these conditions:
500LFPM + 2in2: The part is soldered to a 2in2, 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.
2in2on bottom: The part is soldered to a 2in2, 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias.
2in2: The part is soldered to a 2in2, 1oz. copper plane.
1in2: The part is soldered to a 1in2, 1oz. copper plane.
Not Attached: The part is not soldered down and is not forced-air cooled.
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NON-MH/LQ SPECIFIC CHARACTERISTICS
THD+N vs Frequency
THD+N vs Frequency
Figure 11.
Figure 12.
THD+N vs Frequency
THD+N vs Frequency
Figure 13.
Figure 14.
THD+N vs Frequency
THD+N vs Frequency
Figure 15.
Figure 16.
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NON-MH/LQ SPECIFIC CHARACTERISTICS (continued)
10
THD+N vs Frequency
THD+N vs Frequency
Figure 17.
Figure 18.
THD+N vs Frequency
THD+N vs Frequency
Figure 19.
Figure 20.
THD+N vs Frequency
THD+N vs Output Power
Figure 21.
Figure 22.
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NON-MH/LQ SPECIFIC CHARACTERISTICS (continued)
THD+N vs Output Power
THD+N vs Output Power
Figure 23.
Figure 24.
THD+N vs Output Power
THD+N vs Output Power
Figure 25.
Figure 26.
THD+N vs Output Power
THD+N vs Output Power
Figure 27.
Figure 28.
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NON-MH/LQ SPECIFIC CHARACTERISTICS (continued)
12
THD+N vs Output Power
THD+N vs Output Power
Figure 29.
Figure 30.
THD+N vs Output Power
THD+N vs Output Power
Figure 31.
Figure 32.
THD+N vs Output Voltage
Docking Station Pins
THD+N vs Output Voltage
Docking Station Pins
Figure 33.
Figure 34.
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TYPICAL PERFORMANCE CHARACTERISTICS
Output Power vs
Load Resistance
Output Power vs
Load Resistance
Figure 35.
Figure 36.
Output Power vs
Load Resistance
Output Power vs
Load Resistance
Figure 37.
Figure 38.
Dropout Voltage
Output Power
vs Supply voltage
Figure 39.
Figure 40.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
14
Output Power
vs Supply Voltage
Supply Current
vs Supply Voltage
Figure 41.
Figure 42.
Power Dissipation
vs Output Power
Power Dissipation vs
Output Power
Figure 43.
Figure 44.
External Gain/
Bass Boost Characteristics
Power Derating Curve
Figure 45.
Figure 46.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Crosstalk
Power Supply
Rejection Ratio
Figure 47.
Figure 48.
Volume Control
Characteristics
Figure 49.
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APPLICATION INFORMATION
ELIMINATING OUTPUT COUPLING CAPACITORS
Typical single-supply audio amplifiers that can switch between driving bridge-tied-load (BTL) speakers and
single-ended (SE) headphones use a coupling capacitor on each SE output. This capacitor blocks the half-supply
voltage to which the output amplifiers are typically biased and couples the audio signal to the headphones. The
signal return to circuit ground is through the headphone jack's sleeve.
The LM4841 eliminates these coupling capacitors. AmplifierA+ (pin 28 on MT/MH) is internally configured to
apply VDD/2 to a stereo headphone jack's sleeve. This voltage matches the quiescent voltage present on the
AmpAout- and AmpBout- outputs that drive the headphones. The headphones operate in a manner very similar
to a bridge-tied-load (BTL). The same DC voltage is applied to both headphone speaker terminals. This results in
no net DC current flow through the speaker. AC current flows through a headphone speaker as an audio signal's
output amplitude increases on the speaker's terminal.
When operating as a headphone amplifier, the headphone jack sleeve is not connected to circuit ground. Using
the headphone output jack as a line-level output will place the LM4841's one-half supply voltage on a plug's
sleeve connection. Driving a portable notebook computer or audio-visual display equipment is possible. This
presents no difficulty when the external equipment uses capacitively coupled inputs. For the very small minority
of equipment that is DC-coupled, the LM4841 monitors the current supplied by the amplifier that drives the
headphone jack's sleeve. If this current exceeds 500mAPK, the amplifier is shutdown, protecting the LM4841 and
the external equipment.
OUTPUT TRANSIENT ("POPS AND CLICKS") ELIMINATED
The LM4841 contains advanced circuitry that eliminates output transients ("pop and click"). This circuitry
prevents all traces of transients when the supply voltage is first applied, when the part resumes operation after
shutdown, or when switching between BTL speakers and SE headphones. Two circuits combine to eliminate pop
and click. One circuit mutes the output when switching between speaker loads. Another circuit monitors the input
signal. It maintains the muted condition until there is sufficient input signal magnitude (>22mVRMS, typ) to mask
any remaining transient that may occur. (See TURN ON CHARACTERISTICS).
Differential output signal (Trace B) is devoid of transients. The SHUTDOWN pin is driven by a shutdown signal (Trace
A). The inverting output (Trace C) and the non-inverting output (Trace D) are applied across an 8Ω BTL load.
Figure 50.
Figure 50 shows the LM4841's lack of transients in the differential signal (Trace B) across a BTL 8Ω load. The
LM4841's active-high SHUTDOWN pin is driven by the logic signal shown in Trace A. Trace C is the VOUToutput signal and trace D is the VOUT+ output signal. The shutdown signal frequency is 1Hz with a 50% duty
cycle. Figure 51 is generated with the same conditions except that the output drives a 32Ω single-ended (SE)
load. Again, no trace of output transients on Trace B can be observed.
16
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Single-ended output signal (Trace B) is devoid of transients. The SHUTDOWN pin is driven by a shutdown signal
(Trace A). The inverting output (Trace C) and the VBYPASS output (Trace D) are applied across a 32Ω BTL load.
Figure 51.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4841's exposed-DAP (die attach paddle) packages (MH,LQ) provide a low thermal resistance between
the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to
the surrounding PCB copper traces, ground plane and, finally, surrounding air. The result is a low voltage audio
power amplifier that produces 2.1W at ≤ 1% THD with a 4Ω load. This high power is achieved through careful
consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4841's
high power performance and activate unwanted, though necessary, thermal shutdown protection.
The MH and LQ packages must have their exposed DAPs soldered to a grounded copper pad on the PCB. The
DAP's PCB copper pad is connected to a large grounded plane of continuous unbroken copper. This plane forms
a thermal mass heat sink and radiation area. Place the heat sink area on either outside plane in the case of a
two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the
inner layer or backside copper heat sink area with 32(4x8) (MH) vias or 6(3x2) LQ. The via diameter should be
0.012in–0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling
the vias.
Best thermal performance is achieved with the largest practical copper heat sink area. If the heatsink and
amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with a 4Ω load.
Heatsink areas not placed on the same PCB layer as the LM4841MH and LQ packages should be 5in2 (min) for
the same supply voltage and load resistance. The last two area recommendations apply for 25°C ambient
temperature. Increase the area to compensate for ambient temperatures above 25°C. The junction temperature
must be held below 150°C to prevent activating the LM4841's thermal shutdown protection. The LM4841's power
de-rating curve in the TYPICAL PERFORMANCE MH/LQ SPECIFIC CHARACTERISTICS shows the maximum
power dissipation versus temperature. Example PCB layouts for the exposed-DAP TSSOP and LQ packages are
shown in the RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT section. Further detailed and specific
information concerning PCB layout and fabrication is available in AN1187.
PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω
LOADS
Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load
impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and
wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes
a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1Ω
trace resistance reduces the output power dissipated by a 4Ω load from 2.1W to 2.0W. This problem of
decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load
dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide
as possible.
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Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output
voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output
signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the
same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps
maintain full output voltage swing.
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 4, the LM4841 output stage consists of two pairs of operational amplifiers, forming a twochannel (channel A and channel B) stereo amplifier. (Though the following discusses channel A, it applies
equally to channel B.)
Figure 4 shows that the first amplifier's negative (-) output serves as the second amplifier's input. This results in
both amplifiers producing signals identical in magnitude, but 180° out of phase. Taking advantage of this phase
difference, a load is placed between −OUTA and +OUTA and driven differentially (commonly referred to as
“bridge mode”). This results in a differential gain of
AVD = 2 * (RGFA/RGIA)
(1)
Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single
amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the singleended configuration: its differential output doubles the voltage swing across the load. This produces four
times the output power when compared to a single-ended amplifier under the same conditions. This increase in
attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped.
To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to the AUDIO
POWER AMPLIFIER DESIGN section.
Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by
biasing channel A's and channel B's outputs at half-supply. This eliminates the coupling capacitor that single
supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration
forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power
dissipation and may permanently damage loads such as speakers.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation 2
states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and
driving a specified output load.
PDMAX = (VDD)2/(2π2RL)
Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher
internal power dissipation for the same conditions.
The LM4841 has two operational amplifiers per channel. The maximum internal power dissipation per channel
operating in the bridge mode is four times that of a single-ended amplifier. From Equation 3, assuming a 5V
power supply and a 4Ω load, the maximum single channel power dissipation is 1.27W or 2.54W for stereo
operation.
PDMAX = 4 * (VDD)2/(2π2RL)
Bridge Mode
(3)
The LM4841's power dissipation is twice that given by Equation 2 or Equation 3 when operating in the singleended mode or bridge mode, respectively. Twice the maximum power dissipation point given by Equation 3 must
not exceed the power dissipation given by Equation 4:
PDMAX′ = (TJMAX − TA)/θJA
(4)
The LM4841's TJMAX = 150°C. In the LQ package soldered to a DAP pad that expands to a copper area of 5in2
on a PCB, the LM4841's θJA is 20°C/W. In the MH and LQ packages soldered to a DAP pad that expands to a
copper area of 2in2 on a PCB, the LM4841MH's and LQ's θJA is 41°C/W. For the LM4841MT package, θJA =
80°C/W. At any given ambient temperature TA, use Equation 4 to find the maximum internal power dissipation
supported by the IC packaging. Rearranging Equation 4 and substituting PDMAX for PDMAX′ results in Equation 5.
This equation gives the maximum ambient temperature that still allows maximum stereo power dissipation
without violating the LM4841's maximum junction temperature.
TA = TJMAX – 2*PDMAX θJA
18
(5)
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For a typical application with a 5V power supply and an 4Ω load, the maximum ambient temperature that allows
maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 45°C
for the MH package.
TJMAX = PDMAX θJA + TA
(6)
Equation 6 gives the maximum junction temperature TJMAX. If the result violates the LM4841's 150°C TJMAX,
reduce the maximum junction temperature by reducing the power supply voltage or increasing the load
resistance. Further allowance should be made for increased ambient temperatures.
The above examples assume that a device is a surface mount part operating around the maximum power
dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are
allowed as output power or duty cycle decreases.
If the result of Equation 2 is greater than that of Equation 3, then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to
reduce θJA. The heat sink can be created using additional copper area around the package, with connections to
the ground pin(s), supply pin and amplifier output pins. External, solder attached SMT heatsinks such as the
Thermalloy 7106D can also improve power dissipation. When adding a heat sink, the θJA is the sum of θJC, θCS,
and θSA. (θJC is the junction-to-case thermal impedance, θCS is the case-to-sink thermal impedance, and θSA is
the sink-to-ambient thermal impedance.) Refer to the TYPICAL PERFORMANCE MH/LQ SPECIFIC
CHARACTERISTICS curves for power dissipation information at lower output power levels.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically use a 10 µF in parallel with a 0.1 µF filter capacitor to
stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response.
However, their presence does not eliminate the need for a local 1.0 µF tantalum bypass capacitance connected
between the LM4841's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so
may cause oscillation. Keep the length of leads and traces that connect capacitors between the LM4841's power
supply pin and ground as short as possible. Connecting a 1µF capacitor, CB, between the BYPASS pin and
ground improves the internal bias voltage's stability and the amplifier's PSRR. The PSRR improvements increase
as the bypass pin capacitor value increases. Too large a capacitor, however, increases turn-on time and can
compromise the amplifier's click and pop performance. The selection of bypass capacitor values, especially CB,
depends on desired PSRR requirements, click and pop performance (as explained in the following section,
SELECTING PROPER EXTERNAL COMPONENTS), system cost, and size constraints.
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM4841's performance requires properly selecting external components. Though the LM4841
operates well when using external components with wide tolerances, best performance is achieved by optimizing
component values.
The LM4841 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more
than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-tonoise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain circuits
demand input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal
sources such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to the AUDIO POWER
AMPLIFIER DESIGN section for more information on selecting the proper gain.
INPUT CAPACITOR VALUE SELECTION
Amplifying the lowest audio frequencies requires a high value input coupling capacitor (0.33µF in Figure 4), but
high value capacitors can be expensive and may compromise space efficiency in portable designs. In many
cases, however, the speakers used in portable systems, whether internal or external, have little ability to
reproduce signals below 150 Hz. Applications using speakers with this limited frequency response reap little
improvement by using a large input capacitor.
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Besides effecting system cost and size, the input coupling capacitor has an affect on the LM4841's click and pop
performance. When the supply voltage is first applied, a transient (pop) is created as the charge on the input
capacitor changes from zero to a quiescent state. The magnitude of the pop is directly proportional to the input
capacitor's size. Higher value capacitors need more time to reach a quiescent DC voltage (usually VDD/2) when
charged with a fixed current. The amplifier's output charges the input capacitor through the feedback resistor, Rf.
Thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the
desired −6dB frequency.
As shown in Figure 4, the input resistor (RIA, RIB = 20k) ( and the input capacitor (CIA, CIB = 0.33µF) produce a
−6dB high pass filter cutoff frequency that is found using Equation 7.
(7)
As an example when using a speaker with a low frequency limit of 150Hz, the input coupling capacitor, using
Equation 7, is 0.063µF. The 0.33µF input coupling capacitor shown in Figure 4 allows the LM4841 to drive a high
efficiency, full range speaker whose response extends below 30Hz.
TURN ON CHARACTERISTICS
The LM4841 contains advanced circuitry that minimizes turn-on and shutdown transients or “clicks and pops”.
For this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is
deactivated. While the power supply is ramping to its final value, the LM4841's internal amplifiers are configured
as unity gain buffers. An internal current source changes the voltage of the BYPASS pin in a controlled, linear
manner. Ideally, the input and outputs track the voltage applied to the BYPASS pin. The gain of the internal
amplifiers remains unity until the voltage on the BYPASS pin reaches 1/2 VDD. As soon as the voltage on the
BYPASS pin is stable, the LM4841 is ready to be fully turned on. To turn the device on, the input signal must
exceed 22mVrms. This is accomplished through a threshold detect circuit that enables all appropriate output
amplifiers after the 22mVrms limit is reached. Until this threshold is reached, some of the amplifiers remain in a
tri-state mode. This insures that there is no current flowing through to the speakers or headphones during power
up. Without current flow, the speakers or headphones remain silent. During headphone mode, A+, B-, and B+
are in tri-state mode during power up. During speaker mode, A+ and B+ are in tri-state mode during power up.
Although the BYPASS pin current cannot be modified, changing the size of CBYP alters the device's turn-on time.
As the size of CBYP increases, the turn-on time increases. There is a linear relationship between the size of CBYP
and the turn-on time. Here are some typical turn-on times for various values of CBYP:
CBYP
TON
0.01µF
2ms
0.1µF
20ms
0.22µF
44ms
0.47µF
94ms
1.0µF
200ms
DOCKING STATION INTERFACE
Applications such as notebook computers can take advantage of a docking station to connect to external devices
such as monitors or audio/visual equipment that sends or receives line level signals. The LM4841 has two
outputs, Dock A and Dock B, which connect to outputs of the internal input amplifiers that drive the volume
control inputs. These input amplifiers can drive loads of >1kΩ (such as powered speakers) with a rail-to-rail
signal. Since the output signal present on the Dock A and Dock B pins are biased to VDD/2, coupling capacitors
should be connected in series with the load when using these outputs. Typical values for the output coupling
capacitors are 0.33µF to 1.0µF. If polarized coupling capacitors are used, connect their "+" terminals to the
respective output pin.
Since the Dock outputs precede the internal volume control, the signal amplitude will be equal to the input
signal's magnitude and cannot be adjusted. However, the input amplifier's closed-loop gain can be adjusted
using external resistors. These 20k resistors (RFA and RFB) are shown in Figure 4 and they set each input
amplifier's gain to -1. Use Equation 7 to determine the input and feedback resistor values for a desired gain.
- Av = RF / RIN
20
(8)
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Adjusting the input amplifier's gain sets the minimum gain for that channel. Although the single ended output of
the Bridge Output Amplifiers can be used to drive line level outputs, it is recommended that the A & B Dock
Outputs simpler signal path be used for better performance.
BEEP DETECT FUNCTION
Computers and notebooks produce a system “beep“ signal that drives a small speaker. The speaker's auditory
output signifies that the system requires user attention or input. To accommodate this system alert signal, the
LM4841's beep input pin is a mono input that accepts the beep signal. Internal level detection circuitry at this
input monitors the beep signal's magnitude. When a signal level greater than VDD/2 is detected on the BEEP IN
pin, the bridge output amplifiers are enabled. The beep signal is amplified and applied to the load connected to
the output amplifiers. A valid beep signal will be applied to the load even when MUTE is active. Use the input
resistors connected between the BEEP IN pin and the stereo input pins to accommodate different beep signal
amplitudes. These resistors are shown as 200kΩ devices in Figure 4. Use higher value resistors to reduce the
gain applied to the beep signal. The resistors must be used to pass the beep signal to the stereo inputs. The
BEEP IN pin is used only to detect the beep signal's magnitude: it does not pass the signal to the output
amplifiers. The LM4841's shutdown mode must be deactivated before a system alert signal is applied to BEEP
IN pin.
MICRO-POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the LM4841's shutdown function. Activate micro-power
shutdown by applying ground (logic low) to the SHUTDOWN pin. When activated, the LM4841's micro-power
shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. On the demo board, the
micro-power shutdown feature is controlled by a single pole switch that connects the shutdown pin to either VDD,
for normal operation, or directly to ground to enable shutdown. In a system with a microprocessor or a
microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin.
MODE FUNCTION
The LM4841's MODE function has 2 states controlled by the voltage applied to the MODE pin. In Mode 0 (mode
pin at GND), the HP Sense has no effect on the gain setting (only the Gain Select Input Controls either internal
or external gain). In Mode 1 (mode pin tied high), the HP Sense and Gain Select both can toggle between
Internal and External Gain. See Truth Table for Logic Inputs.
MUTE FUNCTION
The LM4841 mutes the amplifier and DOCK outputs when VDD is applied to the MUTE pin. Even while muted,
the LM4841 will amplify a system alert (beep) signal whose magnitude satisfies the BEEP DETECT circuitry.
Applying 0V to the MUTE pin returns the LM4841 to normal, unmuted operation. Prevent unanticipated mute
behavior by connecting the MUTE pin to VDD or ground. Do not let the mute pin float.
Figure 52. Headphone Sensing Circuit (MT & MH Packages)
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CAP-LESS HEADPHONE (SINGLE-ENDED) AMPLIFIER OPERATION
An internal pull−up circuit is connected to the HP Sense (Pin 21 HP-IN on the MT/MH packages) headphone
amplifier control pin. When this pin is left unconnected, VDD is applied to the HP−IN. This turns off Amp B +OUT
(not seen in Figure 52, see Figure 2 Pin 15) and switches Amp A +OUT's input signal from an audio signal to the
VDD/2 voltage present on pin 28 (Amp A + OUT). The result is muted bridge-connected loads. Quiescent current
consumption is reduced when the IC is in this single−ended mode.
Figure 52 shows the implementation of the LM4841's headphone control function. An internal comparator with a
nominal 400mV offset monitors the signal present at the −OUT B output. It compares this signal against the
signal applied to the HP−IN pin (Notice in Figure 52, Pin 21 is shorted to Pin 17 without a headphone plugged
in). When these signals are equal, as in the case when a BTL is connected to the amplifier, an internal
comparator forces the LM4841 to maintain bridged−amplifier operation. When the HP−IN pin is externally floated,
such as when headphones are connected to the jack shown in Figure 52, an internal pull−up forces VDD on the
internal comparator's HP−IN inputs. This changes the comparator's output state and enables the headphone
function: it turns off Amp B +OUT (not seen in Figure 52, see Figure 2 Pin 15), switches the Amp A +OUT input
signal from an audio signal to the VDD/2 DC voltage present on pin 28, and mutes the bridge-connected loads.
Amp A -OUT and Amp B -OUT drive the headphones.
Figure 2 and Figure 53 also show suggested headphone jack electrical connections. The jack is designed to
mate with a three−wire plug. The plug's tip and ring should each carry one of the two stereo output signals,
whereas the sleeve provides the return to Amp A +OUT. A headphone jack with one control pin contact is
sufficient to drive the HP−IN pin when connecting headphones
A switch can replace the headphone jack contact pin. When a switch shorts the HP−IN pin to VDD (An open
switch contact will accomplish this because there is an internal pull-up resistor), the bridge−connected speakers
are muted and Amp A -OUT and Amp B -OUT drive the stereo headphones. When a switch shorts the HP−IN pin
to GND (pulling down the internal pull-up resistor), the LM4841 operates in bridge mode. If headphone drive is
not needed, short the HP−IN pin to the −OUTB pin.
ESD PROTECTION
As stated in the Absolute Maximum Ratings, pin 28 on the MT/MH packages and pin 25 on the LQ package,
have a maximum ESD susceptibility rating of 6500V. For higher ESD voltages, the addition of a PACDN042 dual
transil (from California Micro Devices), as shown in Figure 53, will provide additional protection.
The PCDN042 provides additional ESD protection beyond the 6500V shown in the Absolute Maximum Ratings for the
AMP2A output
Figure 53.
GAIN SELECT FUNCTION (BASS BOOST)
The LM4841 features selectable gain, using either internal or external feedback resistors. Either set of feedback
resistors set the gain of the output amplifiers. The voltage applied to the GAIN SELECT pin controls which gain is
selected. Applying VDD to the GAIN SELECT pin selects the external gain mode. Applying 0V to the GAIN
SELECT pin selects the internally set unity gain.
22
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In some cases a designer may want to improve the low frequency response of the bridged amplifier or
incorporate a bass boost feature. This bass boost can be useful in systems where speakers are housed in small
enclosures. A resistor, RBA, and a capacitor, CBA, in parallel, can be placed in series with the feedback resistor of
the bridged amplifier as seen in Figure 54.
Figure 54. Low Frequency Enhancement ( MT/MH PINOUT )
At low, frequencies CBA is a virtual open circuit and at high frequencies, its nearly zero ohm impedance shorts
RBA. The result is increased bridge-amplifier gain at low frequencies. The combination of RBA and CBA form a 6dB corner frequency at
fC = 1/(2πRBACBA)
(9)
The bridged-amplifier low frequency differential gain is:
AVD = 2(RGFA + RBA) / RGIA
(10)
Using the component values shown in Figure 4 (RGFA = 20kΩ, RBA = 20kΩ, and CBA = 0.068µF), a first-order, 6dB pole is created at 120Hz. Assuming R GIA = 20kΩ, the low frequency differential gain is 4. The input (Cin A and
B) capacitor values must be selected for a low frequency response that covers the range of frequencies affected
by the desired bass-boost operation.
DC VOLUME CONTROL
The LM4841 has an internal stereo volume control whose setting is a function of the DC voltage applied to the
DC VOL CONTROL pin.
The LM4841 volume control consists of 31 steps that are individually selected by a variable DC voltage level on
the volume control pin. The range of the steps, controlled by the DC voltage, are from 0dB - 78dB. Each gain
step corresponds to a specific input voltage range, as shown in VOLUME CONTROL TABLE, (on the following
page.)
To minimize the effect of noise on the volume control pin, which can affect the selected gain level, hysteresis has
been implemented. The amount of hysteresis corresponds to half of the step width, as shown in Figure 49
(DS200133-40).
For highest accuracy, the voltage shown in the 'recommended voltage' column of the table is used to select a
desired gain. This recommended voltage is exactly halfway between the two nearest transitions to the next
highest or next lowest gain levels.
The gain levels are 1dB/step from 0dB to -6dB, 2dB/step from -6dB to -36dB, 3dB/step from -36dB to -47dB,
4dB/step from -47db to -51dB, 5dB/step from -51dB to -66dB, and 12dB to the last step at -78dB.
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VOLUME CONTROL TABLE
Gain
(dB)
Voltage Range (% of Vdd)
Voltage Range (Vdd = 5)
Voltage Range (Vdd = 3)
Low
High
Recommended
Low
High
Recommended
Low
High
Recommended
0
77.5%
100.00%
100.000%
3.875
5.000
5.000
2.325
3.000
3.000
-1
75.0%
78.5%
76.875%
3.750
3.938
3.844
2.250
2.363
2.306
-2
72.5%
76.25%
74.375%
3.625
3.813
3.719
2.175
2.288
2.231
-3
70.0%
73.75%
71.875%
3.500
3.688
3.594
2.100
2.213
2.156
-4
67.5%
71.25%
69.375%
3.375
3.563
3.469
2.025
2.138
2.081
-5
65.0%
68.75%
66.875%
3.250
3.438
3.344
1.950
2.063
2.006
-6
62.5%
66.25%
64.375%
3.125
3.313
3.219
1.875
1.988
1.931
-8
60.0%
63.75%
61.875%
3.000
3.188
3.094
1.800
1.913
1.856
-10
57.5%
61.25%
59.375%
2.875
3.063
2.969
1.725
1.838
1.781
-12
55.0%
58.75%
56.875%
2.750
2.938
2.844
1.650
1.763
1.706
-14
52.5%
56.25%
54.375%
2.625
2.813
2.719
1.575
1.688
1.631
-16
50.0%
53.75%
51.875%
2.500
2.688
2.594
1.500
1.613
1.556
-18
47.5%
51.25%
49.375%
2.375
2.563
2.469
1.425
1.538
1.481
-20
45.0%
48.75%
46.875%
2.250
2.438
2.344
1.350
1.463
1.406
-22
42.5%
46.25%
44.375%
2.125
2.313
2.219
1.275
1.388
1.331
-24
40.0%
43.75%
41.875%
2.000
2.188
2.094
1.200
1.313
1.256
-26
37.5%
41.25%
39.375%
1.875
2.063
1.969
1.125
1.238
1.181
-28
35.0%
38.75%
36.875%
1.750
1.938
1.844
1.050
1.163
1.106
-30
32.5%
36.25%
34.375%
1.625
1.813
1.719
0.975
1.088
1.031
-32
30.0%
33.75%
31.875%
1.500
1.688
1.594
0.900
1.013
0.956
-34
27.5%
31.25%
29.375%
1.375
1.563
1.469
0.825
0.937
0.881
-36
25.0%
28.75%
26.875%
1.250
1.438
1.344
0.750
0.862
0.806
-39
22.5%
26.25%
24.375%
1.125
1.313
1.219
0.675
0.787
0.731
-42
20.0%
23.75%
21.875%
1.000
1.188
1.094
0.600
0.712
0.656
-45
17.5%
21.25%
19.375%
0.875
1.063
0.969
0.525
0.637
0.581
-47
15.0%
18.75%
16.875%
0.750
0.937
0.844
0.450
0.562
0.506
-51
12.5%
16.25%
14.375%
0.625
0.812
0.719
0.375
0.487
0.431
-56
10.0%
13.75%
11.875%
0.500
0.687
0.594
0.300
0.412
0.356
-61
7.5%
11.25%
9.375%
0.375
0.562
0.469
0.225
0.337
0.281
-66
5.0%
8.75%
6.875%
0.250
0.437
0.344
0.150
0.262
0.206
-78
0.0%
6.25%
0.000%
0.000
0.312
0.000
0.000
0.187
0.000
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8Ω Load
The following are the desired operational parameters:
Power Output:
1 WRMS
Load Impedance:
8Ω
Input Level:
1 VRMS
Input Impedance:
20 kΩ
Bandwidth:
24
100 Hz−20 kHz ± 0.25 dB
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The design begins by specifying the minimum supply voltage necessary to obtain the specified output power.
One way to find the minimum supply voltage is to use the Output Power vs Supply Voltage curve in the TYPICAL
PERFORMANCE MH/LQ SPECIFIC CHARACTERISTICS section. Another way, using Equation 10, is to
calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. To
account for the amplifier's dropout voltage, two additional voltages, based on the Dropout Voltage vs Supply
Voltage in the TYPICAL PERFORMANCE MH/LQ SPECIFIC CHARACTERISTICS curves, must be added to the
result obtained by Equation 10. The result is Equation 11.
(11)
(12)
VDD ≥ (VOUTPEAK+ (VODTOP + VODBOT))
The Output Power vs Supply Voltage graph for an 8Ω load indicates a minimum supply voltage of 4.6V. This is
easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom,
allowing the LM4841 to produce peak output power in excess of 1W without clipping or other audible distortion.
The choice of supply voltage must also not create a situation that violates of maximum power dissipation as
explained above in the POWER DISSIPATION section.
After satisfying the LM4841's power dissipation requirements, the minimum differential gain needed to achieve
1W dissipation in an 8Ω load is found using Equation 12.
(13)
Thus, a minimum overall gain of 2.83 allows the LM4841's to reach full output swing and maintain low noise and
THD+N performance.
The last step in this design example is setting the amplifier's −6dB frequency bandwidth. To achieve the desired
±0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the
lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth
limit. The gain variation for both response limits is 0.17dB, well within the ±0.25dB desired limit. The results are
as follows:
fL = 100Hz/5 = 20Hz
(14)
and
fH = 20kHz x 5 = 100kHz
(15)
As mentioned in the SELECTING PROPER EXTERNAL COMPONENTS section, Rin A and B and Cin A and B create
a highpass filter that sets the amplifier's lower bandpass frequency limit. Find the input coupling capacitor's value
using Equation 14.
Cin A and B≥ 1/(2πRin A and BfL)
(16)
The result is
1/(2π*20kΩ*20Hz) = 0.397μF
(17)
Use a 0.39μF capacitor, the closest standard value.
The product of the desired high frequency cutoff (100kHz in this example) and the differential gain AVD,
determines the upper passband response limit. With AVD = 3 and fH = 100kHz, the closed-loop gain bandwidth
product (GBWP) is 300kHz. This is less than the LM4841's 3.5MHz GBWP. With this margin, the amplifier can
be used in designs that require more differential gain while avoiding performance, restricting bandwidth
limitations.
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT
Figure 55 through Figure 61 show the recommended PC board layout that is optimized for the LM4841 and
associated external components. This circuit is designed for use with an external 5V supply and 8Ω speakers.
This circuit board is easy to use. Apply 5V and ground to the board's VDD and GND pads, respectively. Connect
8Ω speakers between the board's −OUTA and +OUTA and -OUTB and +OUTB pads.
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OBSOLETE
LM4841
SNAS147E – MARCH 2002 – REVISED APRIL 2013
www.ti.com
LM4841LQ DEMO BOARD ARTWORK
Figure 55. Top Layer SilkScreen
Figure 56. Top Layer LQ
26
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OBSOLETE
LM4841
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SNAS147E – MARCH 2002 – REVISED APRIL 2013
Figure 57. Bottom Layer LQ
Table 1. Analog Audio LM4841LQ Eval Board
Assembly Part Number: 5510118313-001
Revision: A
Bill of Material
Item
Part Number
Part Description
Qty
1
551011373-001
LM4841 Eval Board PCB etch
001
1
Ref Designator
Remark
10
482911373-001
LM4841LQ
1
20
151911368-001
Cer Cap 0.068µF 50V 10%
1206
2
25
152911368-001
Tant Cap 0.1µF 10V 10% Size 3
= A 3216
C2, C3, C4
26
152911368-002
Tant Cap 0.33µF 10V 10%
Size = A 3216
3
CinA, CinB, Cinbeep
27
152911368-003
Tant Cap 1µF 16V 10% Size = 3
A 3216
CBYP, CoutA, CoutB
28
152911368-004
Tant Cap 10µF 10V 10% Size
= C 6032
1
C1
31
472911368-002
Res 20K Ohm 1/8W 1% 1206
10
RINAandB, RGFAandB, RBA, RBB,
RGIAandB, RFAandB
33
472911368-004
Res 200K Ohm 1/16W 1%
0603
2
RBeepAandB
40
131911368-001
Stereo Headphone Jack W/
Switch
1
41
131911368-002
Slide Switch
4
mute, mode, Gain, SD
Mouser # 10SP003
42
131911368-003
Potentiometer
1
Volume Control
Mouser # 317-2090-100K
43
131911368-004
RCA Jack
3
InA, InB, BeepIn
Mouser # 16PJ097
44
131911368-005
Banana Jack, Black
3
GND, AOUT-, BOUT-
Mouser # ME164-6219
45
131911368-006
Banana Jack, Red
3
VDD, AOUT+, BOUT+
Mouser # ME164-6218
CBA, CBB
Switchcraft 35RAPC4BH3
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OBSOLETE
LM4841
SNAS147E – MARCH 2002 – REVISED APRIL 2013
www.ti.com
LM4841 MT & MH DEMO BOARD ARTWORK
Figure 58. Top Layer SilkScreen
Figure 59. Top Layer TSSOP
28
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OBSOLETE
LM4841
www.ti.com
SNAS147E – MARCH 2002 – REVISED APRIL 2013
Figure 60. Bottom Layer TSSOP
Figure 61. Drill Drawing
Table 2. Analog Audio LM4841 MSOP Eval Board
Assembly Part Number: 980011373-100
Revision: A
Bill of Material
Item
Part Number
Part Description
Qty
1
551011373-001
LM4841 Eval Board PCB etch
001
1
10
482911373-001
LM4841 MSOP
1
20
151911368-001
Cer Cap 0.068µF 50V 10%
1206
2
Ref Designator
Remark
CBA, CBB
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OBSOLETE
LM4841
SNAS147E – MARCH 2002 – REVISED APRIL 2013
www.ti.com
Table 2. Analog Audio LM4841 MSOP Eval Board
Assembly Part Number: 980011373-100
Revision: A
Bill of Material (continued)
Item
Part Number
Part Description
25
152911368-001
Tant Cap 0.1µF 10V 10% Size 3
= A 3216
C2, C3, C4
26
152911368-002
Tant Cap 0.33µF 10V 10%
Size = A 3216
3
CinA, CinB, Cinbeep
27
152911368-003
Tant Cap 1µF 16V 10% Size = 3
A 3216
CBYP, CoutA, CoutB
28
152911368-004
Tant Cap 10µF 10V 10% Size
= C 6032
1
C1
31
472911368-002
Res 20K Ohm 1/8W 1% 1206
10
RINAandB, RGFAandB, RBA, RBB,
RGIAandB, RFAandB
33
472911368-004
Res 200K Ohm 1/16W 1%
0603
2
RBeepAandB
40
131911368-001
Stereo Headphone Jack W/
Switch
1
41
131911368-002
Slide Switch
4
mute, mode, Gain, SD
Mouser # 10SP003
42
131911368-003
Potentiometer
1
Volume Control
Mouser # 317-2090-100K
43
131911368-004
RCA Jack
3
InA, InB, BeepIn
Mouser # 16PJ097
44
131911368-005
Banana Jack, Black
3
GND, AOUT-, BOUT-
Mouser # ME164-6219
45
131911368-006
Banana Jack, Red
3
VDD, AOUT+, BOUT+
Mouser # ME164-6218
30
Qty
Ref Designator
Remark
Switchcraft 35RAPC4BH3
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OBSOLETE
LM4841
www.ti.com
SNAS147E – MARCH 2002 – REVISED APRIL 2013
REVISION HISTORY
Changes from Revision D (April 2013) to Revision E
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 30
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