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LM4843
Stereo 2W Audio Power Amplifiers
with DC Volume Control
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FEATURES
DESCRIPTION
•
The LM4843 is a monolithic integrated circuit that
provides DC volume control, and stereo bridged
audio power amplifiers capable of producing 2W into
4Ω (1) with less than 1.0% THD or 2.2W into 3Ω (2)
with less than 1.0% THD (see Notes below).
1
23
•
•
Acoustically Enhanced DC Volume Control
Taper
Stereo Bridged Power Amplifiers “Click and
Pop” Suppression Circuitry
Thermal Shutdown Protection Circuitry
APPLICATIONS
•
•
•
Portable and Desktop Computers
Multimedia Monitors
Portable Radios, PDAs, and Portable TVs
The LM4843 features an externally controlled, lowpower consumption shutdown mode, and both a
power amplifier and headphone mute for maximum
system flexibility and performance.
KEY SPECIFICATIONS
•
•
Boomer™ audio integrated circuits were designed
specifically to provide high quality audio while
requiring a minimum amount of external components.
The LM4843 incorporates a DC volume control with
stereo bridged audio power amplifiers making it
optimally suited for multimedia monitors, portable
radios, desktop, and portable computer applications.
PO at 1% THD+N
– Into 3Ω, 2.2W (Typ)
– Into 4Ω, 2.0W (Typ)
– Into 8Ω, 1.1W (Typ)
Shutdown Current, 0.7µA (Typ)
(1)
(2)
When properly mounted to the circuit board, the LM4843MH
will deliver 2W into 4Ω. See the Application Information
section for LM4843MH usage information.
LM4843MH that has been properly mounted to the circuit
board and forced-air cooled will deliver 2.2W into 3Ω.
Block Diagram
Figure 1. LM4843 Block Diagram
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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Connection Diagram
Figure 2. Standard LM4843MH
Top View
See Package Number PWP
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2) (3)
Supply Voltage
6.0V
Storage Temperature
-65°C to +150°C
−0.3V to VDD +0.3V
Input Voltage
Power Dissipation
ESD Susceptibility
Internally limited
(4)
2000V
ESD Susceptibility (5)
200V
Junction Temperature
150°C
Soldering Information
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
θJC (typ)—PWP
215°C
220°C
2°C/W
θJA (typ)—PWP (exposed DAP) (6)
41°C/W
(7)
54°C/W
θJA (typ)—PWP (exposed DAP) (8)
59°C/W
θJA (typ)—PWP (exposed DAP) (9)
93°C/W
θJA (typ)—PWP (exposed DAP)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
2
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Marshall Chiu feels there are better ways to obtain "More Wattage in the Cottage." Specifications are not ensured for
parameters where no limit is given, however, the typical value is a good indication of device performance.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θ JA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX − TA )/θJA. For the LM4843MH, TJMAX = 150°C, and the typical
junction-to-ambient thermal resistance, when board mounted, is 80°C/W for the MHC20 package.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Machine Model, 220 pF–240 pF discharged through all pins.
The θJA given is for an PWP package whose exposed-DAP is soldered to a 2in2 piece of 1 ounce printed circuit board copper on a
bottom side layer through 21 8mil vias.
The θJA given is for an PWP package whose exposed-DAP is soldered to an exposed 2in 2 piece of 1 ounce printed circuit board
copper.
The θJA given is for an PWP package whose exposed-DAP is soldered to an exposed 1in 2 piece of 1 ounce printed circuit board
copper.
The θJA given is for an PWP package whose exposed-DAP is not soldered to any copper.
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Operating Ratings
TMIN ≤ TA ≤TMAX
Temperature Range
−40°C ≤TA ≤ 85°C
2.7V≤ VDD ≤ 5.5V
Supply Voltage
Electrical Characteristics for Entire IC (1) (2)
The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25°C.
Symbol
VDD
Parameter
Conditions
LM4843
Typical
(3)
Limit (4)
Supply Voltage
Units
(Limits)
2.7
V (min)
5.5
V (max)
IDD
Quiescent Power Supply Current
VIN = 0V, IO = 0A
15
30
mA (max)
ISD
Shutdown Current
Vshutdown = VDD
0.7
2.0
μA (max)
(1)
(2)
(3)
(4)
All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 1.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Marshall Chiu feels there are better ways to obtain "More Wattage in the Cottage." Specifications are not ensured for
parameters where no limit is given, however, the typical value is a good indication of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are ensured to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured
by design, test, or statistical analysis.
Electrical Characteristics for Volume Attenuators (1) (2)
The following specifications apply for VDD = 5V. Limits apply for TA = 25°C.
Symbol
CRANGE
AM
(1)
(2)
(3)
(4)
(5)
Parameter
Attenuator Range (5)
Mute Attenuation
Conditions
Attenuation with VDCVol = 5V, No Load
LM4843
Typical (3)
Limit (4)
Units
(Limits)
±0.75
dB (max)
Attenuation with VDCVol = 0V
-75
dB (min)
Vmute = 5V, Bridged Mode (BM)
-78
dB (min)
All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 1.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Marshall Chiu feels there are better ways to obtain "More Wattage in the Cottage." Specifications are not ensured for
parameters where no limit is given, however, the typical value is a good indication of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are ensured to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured
by design, test, or statistical analysis.
Refers only to the internal Volume Attenuation steps. Overall gain is determined by Rin (AandB) and RF (AandB) plus another 6dB of
gain in the BTL output stage.
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Electrical Characteristics for Bridged Mode Operation (1) (2)
The following specifications apply for VDD = 5V, unless otherwise noted. Limits apply for TA = 25°C.
Symbol
Parameter
Conditions
LM4843
Typical
(3)
Limit (4)
Units
(Limits)
±50
mV (max)
VOS
Output Offset Voltage
VIN = 0V, No Load
10
PO
Output Power
THD + N = 1.0%; f=1kHz; RL = 3Ω (5)
2.2
W
THD + N = 1.0%; f=1kHz; RL = 4Ω (6)
2
W
THD = 1% (max);f = 1 kHz;
RL = 8Ω
1.1
1.0
W (min)
THD+N = 10%;f = 1 kHz; RL = 8Ω
1.5
W
PO = 1W, 20 Hz< f < 20 kHz,
RL = 8Ω, AVD = 2
0.3
%
THD+N
Total Harmonic Distortion+Noise
PO = 340 mW, RL = 32Ω
1.0
%
PSRR
Power Supply Rejection Ratio
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms; RL = 8Ω
74
dB
SNR
Signal to Noise Ratio
VDD = 5V, POUT = 1.1W, RL = 8Ω, AWtd Filter
93
dB
Xtalk
Channel Separation
f=1kHz, CB = 1.0 μF
70
dB
(1)
(2)
(3)
(4)
(5)
(6)
4
All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 1.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Marshall Chiu feels there are better ways to obtain "More Wattage in the Cottage." Specifications are not ensured for
parameters where no limit is given, however, the typical value is a good indication of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are ensured to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured
by design, test, or statistical analysis.
When driving 3Ω loads from a 5V supply the LM4843MH must be mounted to the circuit board and forced-air cooled.
When driving 4Ω loads from a 5V supply the LM4843MH must be mounted to the circuit board.
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Typical Application
Figure 3. Typical Application Circuit
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Typical Performance Characteristics
LM4843MH
THD+N vs Output Power
LM4843MH
THD+N vs Output Power
Figure 4.
Figure 5.
THD+N vs Output Power
THD+N vs Output Power
Figure 6.
Figure 7.
THD+N vs Output Power
THD+N vs Output Power
Figure 8.
6
These curves show the thermal dissipation ability of the LM4843MH at
different ambient temperatures given these conditions:
500LFPM + 2in2: The part is soldered to a 2in2, 1 oz. copper plane
with 500 linear feet per minute of forced-air flow across it.
2in2on bottom: The part is soldered to a 2in2, 1oz. copper plane that
is on the bottom side of the PC board through 21 8 mil vias.
2in2: The part is soldered to a 2in2, 1oz. copper plane.
1in2: The part is soldered to a 1in2, 1oz. copper plane.
Not Attached: The part is not soldered down and is not forced-air
cooled.
Figure 9.
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Typical Performance Characteristics (continued)
THD+N vs Output Power
LM4843MH
THD+N vs Frequency
Figure 10.
Figure 11.
LM4843MH
THD+N vs Frequency
THD+N vs Frequency
Figure 12.
Figure 13.
THD+N vs Frequency
THD+N vs Frequency
Figure 14.
Figure 15.
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Typical Performance Characteristics (continued)
8
THD+N vs Frequency
THD+N vs Frequency
Figure 16.
Figure 17.
Output Power vs
Load Resistance
Output Power vs
Load Resistance
Figure 18.
Figure 19.
Power Supply
Rejection Ratio
Dropout Voltage
Figure 20.
Figure 21.
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Typical Performance Characteristics (continued)
Volume Control
Characteristics
Power Dissipation vs
Output Power
Figure 22.
Figure 23.
Crosstalk
Output Power vs
Supply Voltage
Figure 24.
Figure 25.
Supply Current vs
Supply Voltage
LM4843MH
Power Dissipation vs Output Power
Figure 26.
Figure 27.
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Typical Performance Characteristics (continued)
LM4843MH
Power Derating Curve
These curves show the thermal dissipation ability of the LM4843MH at different ambient temperatures given these conditions:
500LFPM + 2in2: The part is soldered to a 2in2, 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.
2in2on bottom: The part is soldered to a 2in2, 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias.
2in2: The part is soldered to a 2in2, 1oz. copper plane.
1in2: The part is soldered to a 1in2, 1oz. copper plane.
Not Attached: The part is not soldered down and is not forced-air cooled.
Figure 28.
10
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APPLICATION INFORMATION
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4843's exposed-DAP (die attach paddle) package (MH) provides a low thermal resistance between the
die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the
surrounding PCB copper traces, ground plane and, finally, surrounding air. The result is a low voltage audio
power amplifier that produces 2.1W at ≤ 1% THD with a 4Ω load. This high power is achieved through careful
consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4843's
high power performance and activate unwanted, though necessary, thermal shutdown protection.
The MH package must have its exposed DAPs soldered to a grounded copper pad on the PCB. The DAP's PCB
copper pad is connected to a large grounded plane of continuous unbroken copper. This plane forms a thermal
mass heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided
PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer
or backside copper heat sink area with 32(4x8) (MH) vias. The via diameter should be 0.012in–0.013in with a
1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling the vias.
Best thermal performance is achieved with the largest practical copper heat sink area. If the heatsink and
amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with a 4Ω load.
Heatsink areas not placed on the same PCB layer as the LM4843 MH package should be 5in2 (min) for the same
supply voltage and load resistance. The last two area recommendations apply for 25°C ambient temperature.
Increase the area to compensate for ambient temperatures above 25°C. In systems using cooling fans, the
LM4843MH can take advantage of forced air cooling. With an air flow rate of 450 linear-feet per minute and a
2.5in2 exposed copper or 5.0in2 inner layer copper plane heatsink, the LM4843MH can continuously drive a 3Ω
load to full power. The junction temperature must be held below 150°C to prevent activating the LM4843's
thermal shutdown protection. The LM4843's power de-rating curve in the Typical Performance Characteristics
shows the maximum power dissipation versus temperature. Example PCB layouts for the HTSSOP package are
shown in the Demonstration Board Layout section. Further detailed and specific information concerning PCB
layout and fabrication is available in Texas Instruments' AN1187 (SNOA401).
PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω
LOADS
Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load
impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and
wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes
a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1Ω
trace resistance reduces the output power dissipated by a 4Ω load from 2.1W to 2.0W. This problem of
decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load
dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide
as possible.
Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output
voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output
signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the
same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps
maintain full output voltage swing.
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 3, the LM4843 output stage consists of two pairs of operational amplifiers, forming a twochannel (channel A and channel B) stereo amplifier. (Though the following discusses channel A, it applies
equally to channel B.)
Figure 3 shows that the first amplifier's negative (-) output serves as the second amplifier's input. This results in
both amplifiers producing signals identical in magnitude, but 180° out of phase. Taking advantage of this phase
difference, a load is placed between −OUTA and +OUTA and driven differentially (commonly referred to as
“bridge mode”). This results in a differential gain of
AVD = 2 * (Rf/R i)
(1)
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Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single
amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the singleended configuration: its differential output doubles the voltage swing across the load. This produces four
times the output power when compared to a single-ended amplifier under the same conditions. This increase in
attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped.
To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to the AUDIO
POWER AMPLIFIER DESIGN section.
Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by
biasing channel A's and channel B's outputs at half-supply. This eliminates the coupling capacitor that single
supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration
forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power
dissipation and may permanently damage loads such as speakers.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation 2
states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and
driving a specified output load.
PDMAX = (VDD)2/(2π2RL)
Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher
internal power dissipation for the same conditions.
The LM4843 has two operational amplifiers per channel. The maximum internal power dissipation per channel
operating in the bridge mode is four times that of a single-ended amplifier. From Equation 3, assuming a 5V
power supply and a 4Ω load, the maximum single channel power dissipation is 1.27W or 2.54W for stereo
operation.
PDMAX = 4 * (VDD)2/(2π2RL)
Bridge Mode
(3)
The LM4843's power dissipation is twice that given by Equation 2 or Equation 3 when operating in the singleended mode or bridge mode, respectively. Twice the maximum power dissipation point given by Equation 3 must
not exceed the power dissipation given by Equation 4:
PDMAX′ = (TJMAX − TA)/θJA
(4)
The LM4843's TJMAX = 150°C. In the LQ package soldered to a DAP pad that expands to a copper area of 5in2
on a PCB, the LM4843's θJA is 20°C/W. In the MH package soldered to a DAP pad that expands to a copper
area of 2in2 on a PCB, the LM4843MH's θJA is 41°C/W. For the LM4843MH package, θJA = 80°C/W. At any given
ambient temperature TA, use Equation 4 to find the maximum internal power dissipation supported by the IC
packaging. Rearranging Equation 4 and substituting PDMAX for PDMAX′ results in Equation 5. This equation gives
the maximum ambient temperature that still allows maximum stereo power dissipation without violating the
LM4843's maximum junction temperature.
TA = TJMAX – 2*PDMAX θJA
(5)
For a typical application with a 5V power supply and an 4Ω load, the maximum ambient temperature that allows
maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 99°C
for the LQ package and 45°C for the MH package.
TJMAX = PDMAX θJA + TA
(6)
Equation 6 gives the maximum junction temperature TJMAX. If the result violates the LM4843's 150°C TJMAX,
reduce the maximum junction temperature by reducing the power supply voltage or increasing the load
resistance. Further allowance should be made for increased ambient temperatures.
The above examples assume that a device is a surface mount part operating around the maximum power
dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are
allowed as output power or duty cycle decreases.
12
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If the result of Equation 2 is greater than that of Equation 3, then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to
reduce θJA. The heat sink can be created using additional copper area around the package, with connections to
the ground pin(s), supply pin and amplifier output pins. External, solder attached MH heatsinks such as the
Thermalloy 7106D can also improve power dissipation. When adding a heat sink, the θJA is the sum of θJC, θCS,
and θSA. (θJC is the junction-to-case thermal impedance, θCS is the case-to-sink thermal impedance, and θSA is
the sink-to-ambient thermal impedance.) Refer to the Typical Performance Characteristics curves for power
dissipation information at lower output power levels.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically use a 10 µF in parallel with a 0.1 µF filter capacitor to
stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response.
However, their presence does not eliminate the need for a local 1.0 µF tantalum bypass capacitance connected
between the LM4843's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so
may cause oscillation. Keep the length of leads and traces that connect capacitors between the LM4843's power
supply pin and ground as short as possible. Connecting a 1µF capacitor, CB, between the BYPASS pin and
ground improves the internal bias voltage's stability and the amplifier's PSRR. The PSRR improvements increase
as the bypass pin capacitor value increases. Too large a capacitor, however, increases turn-on time and can
compromise the amplifier's click and pop performance. The selection of bypass capacitor values, especially CB,
depends on desired PSRR requirements, click and pop performance (as explained in the following section,
SELECTING PROPER EXTERNAL COMPONENTS), system cost, and size constraints.
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM4843's performance requires properly selecting external components. Though the LM4843
operates well when using external components with wide tolerances, best performance is achieved by optimizing
component values.
The LM4843 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more
than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-tonoise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain circuits
demand input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal
sources such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to the AUDIO POWER
AMPLIFIER DESIGN section for more information on selecting the proper gain.
Input Capacitor Value Selection
Amplifying the lowest audio frequencies requires a high value input coupling capacitor (0.33µF in Figure 3), but
high value capacitors can be expensive and may compromise space efficiency in portable designs. In many
cases, however, the speakers used in portable systems, whether internal or external, have little ability to
reproduce signals below 150 Hz. Applications using speakers with this limited frequency response reap little
improvement by using a large input capacitor.
Besides effecting system cost and size, the input coupling capacitor has an affect on the LM4843's click and pop
performance. When the supply voltage is first applied, a transient (pop) is created as the charge on the input
capacitor changes from zero to a quiescent state. The magnitude of the pop is directly proportional to the input
capacitor's size. Higher value capacitors need more time to reach a quiescent DC voltage (usually VDD/2) when
charged with a fixed current. The amplifier's output charges the input capacitor through the feedback resistor, Rf.
Thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the
desired −6dB frequency.
As shown in Figure 3, the input resistor (RIR, RIL = 20k) ( and the input capacitor (CIR, CIL = 0.33µF) produce a
−6dB high pass filter cutoff frequency that is found using Equation 7.
(7)
As an example when using a speaker with a low frequency limit of 150Hz, the input coupling capacitor, using
Equation 7, is 0.063µF. The 0.33µF input coupling capacitor shown in Figure 3 allows the LM4843 to drive a high
efficiency, full range speaker whose response extends below 30Hz.
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OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE
The LM4843 contains circuitry that minimizes turn-on and shutdown transients or “clicks and pops”. For this
discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated.
While the power supply is ramping to its final value, the LM4843's internal amplifiers are configured as unity gain
buffers. An internal current source changes the voltage of the BYPASS pin in a controlled, linear manner. Ideally,
the input and outputs track the voltage applied to the BYPASS pin. The gain of the internal amplifiers remains
unity until the voltage on the bypass pin reaches 1/2 VDD . As soon as the voltage on the bypass pin is stable,
the device becomes fully operational. Although the BYPASS pin current cannot be modified, changing the size of
CB alters the device's turn-on time and the magnitude of “clicks and pops”. Increasing the value of CB reduces
the magnitude of turn-on pops. However, this presents a tradeoff: as the size of CB increases, the turn-on time
increases. There is a linear relationship between the size of CB and the turn-on time. Here are some typical turnon times for various values of CB:
CB
TON
0.01µF
2ms
0.1µF
20ms
0.22µF
44ms
0.47µF
94ms
1.0µF
200ms
MICRO-POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the LM4843's shutdown function. Activate micro-power
shutdown by applying VDD to the SHUTDOWN pin. When active, the LM4843's micro-power shutdown feature
turns off the amplifier's bias circuitry, reducing the supply current. The logic threshold is typically VDD/2. The low
0.7 µA typical shutdown current is achieved by applying a voltage that is as near as VDD as possible to the
SHUTDOWN pin. A voltage that is less than VDD may increase the shutdown current.
There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw
switch, a microprocessor, or a microcontroller. When using a switch, connect an external 10kΩ pull-up resistor
between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin and ground. Select
normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to VDD
through the pull-up resistor, activating micro-power shutdown. The switch and resistor ensure that the
SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a
microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN
pin with active circuitry eliminates the need for a pull up resistor.
DC VOLUME CONTROL
The LM4843 has an internal stereo volume control whose setting is a function of the DC voltage applied to the
DC VOL CONTROL pin.
The LM4843 volume control consists of 31 steps that are individually selected by a variable DC voltage level on
the volume control pin. The range of the steps, controlled by the DC voltage, are from 0dB - 78dB. Each
attenuation step corresponds to a specific input voltage range, as shown in Table 1.
To minimize the effect of noise on the volume control pin, which can affect the selected attenuation level,
hysteresis has been implemented. The amount of hysteresis corresponds to half of the step width, as shown in
Volume Control Characterization Graph (DS200133-40).
For highest accuracy, the voltage shown in the 'recommended voltage' column of the table is used to select a
desired attenuation level. This recommended voltage is exactly halfway between the two nearest transitions to
the next highest or next lowest attenuation levels.
The attenuation levels are 1dB/step from 0dB to -6dB, 2dB/step from -6dB to -36dB, 3dB/step from -36dB to 47dB, 4dB/step from -47db to -51dB, 5dB/step from -51dB to -66dB, and 12dB to the last step at -78dB.
14
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Table 1. Volume Control Table
Gain (dB)
Voltage Range (% of Vdd)
Voltage Range (Vdd = 5)
Voltage Range (Vdd = 3)
Low
High
Recommended
Low
High
Recommended
Low
High
Recommended
0
77.5%
100.00%
100.000%
3.875
5.000
5.000
2.325
3.000
3.000
-1
75.0%
78.5%
76.875%
3.750
3.938
3.844
2.250
2.363
2.306
-2
72.5%
76.25%
74.375%
3.625
3.813
3.719
2.175
2.288
2.231
-3
70.0%
73.75%
71.875%
3.500
3.688
3.594
2.100
2.213
2.156
-4
67.5%
71.25%
69.375%
3.375
3.563
3.469
2.025
2.138
2.081
-5
65.0%
68.75%
66.875%
3.250
3.438
3.344
1.950
2.063
2.006
-6
62.5%
66.25%
64.375%
3.125
3.313
3.219
1.875
1.988
1.931
-8
60.0%
63.75%
61.875%
3.000
3.188
3.094
1.800
1.913
1.856
-10
57.5%
61.25%
59.375%
2.875
3.063
2.969
1.725
1.838
1.781
-12
55.0%
58.75%
56.875%
2.750
2.938
2.844
1.650
1.763
1.706
-14
52.5%
56.25%
54.375%
2.625
2.813
2.719
1.575
1.688
1.631
-16
50.0%
53.75%
51.875%
2.500
2.688
2.594
1.500
1.613
1.556
-18
47.5%
51.25%
49.375%
2.375
2.563
2.469
1.425
1.538
1.481
-20
45.0%
48.75%
46.875%
2.250
2.438
2.344
1.350
1.463
1.406
-22
42.5%
46.25%
44.375%
2.125
2.313
2.219
1.275
1.388
1.331
-24
40.0%
43.75%
41.875%
2.000
2.188
2.094
1.200
1.313
1.256
-26
37.5%
41.25%
39.375%
1.875
2.063
1.969
1.125
1.238
1.181
-28
35.0%
38.75%
36.875%
1.750
1.938
1.844
1.050
1.163
1.106
-30
32.5%
36.25%
34.375%
1.625
1.813
1.719
0.975
1.088
1.031
-32
30.0%
33.75%
31.875%
1.500
1.688
1.594
0.900
1.013
0.956
-34
27.5%
31.25%
29.375%
1.375
1.563
1.469
0.825
0.937
0.881
-36
25.0%
28.75%
26.875%
1.250
1.438
1.344
0.750
0.862
0.806
-39
22.5%
26.25%
24.375%
1.125
1.313
1.219
0.675
0.787
0.731
-42
20.0%
23.75%
21.875%
1.000
1.188
1.094
0.600
0.712
0.656
-45
17.5%
21.25%
19.375%
0.875
1.063
0.969
0.525
0.637
0.581
-47
15.0%
18.75%
16.875%
0.750
0.937
0.844
0.450
0.562
0.506
-51
12.5%
16.25%
14.375%
0.625
0.812
0.719
0.375
0.487
0.431
-56
10.0%
13.75%
11.875%
0.500
0.687
0.594
0.300
0.412
0.356
-61
7.5%
11.25%
9.375%
0.375
0.562
0.469
0.225
0.337
0.281
-66
5.0%
8.75%
6.875%
0.250
0.437
0.344
0.150
0.262
0.206
-78
0.0%
6.25%
0.000%
0.000
0.312
0.000
0.000
0.187
0.000
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8Ω Load
The following are the desired operational parameters:
Power Output:
1 WRMS
Load Impedance:
8Ω
Input Level:
1 VRMS
Input Impedance:
20 kΩ
Bandwidth:
100 Hz−20 kHz ± 0.25 dB
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The design begins by specifying the minimum supply voltage necessary to obtain the specified output power.
One way to find the minimum supply voltage is to use the Output Power vs Supply Voltage curve in the Typical
Performance Characteristics section. Another way, using Equation 10, is to calculate the peak output voltage
necessary to achieve the desired output power for a given load impedance. To account for the amplifier's dropout
voltage, two additional voltages, based on the Dropout Voltage vs Supply Voltage in the Typical Performance
Characteristics curves, must be added to the result obtained by Equation 10. The result is Equation 11.
(8)
(9)
VDD ≥ (VOUTPEAK+ (VODTOP + VODBOT))
The Output Power vs Supply Voltage graph for an 8Ω load indicates a minimum supply voltage of 4.6V. This is
easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom,
allowing the LM4843 to produce peak output power in excess of 1W without clipping or other audible distortion.
The choice of supply voltage must also not create a situation that violates of maximum power dissipation as
explained above in the POWER DISSIPATION section.
After satisfying the LM4843's power dissipation requirements, the minimum differential gain needed to achieve
1W dissipation in an 8Ω load is found using Equation 12.
(10)
Thus, a minimum overall gain of 2.83 allows the LM4843's to reach full output swing and maintain low noise and
THD+N performance.
The last step in this design example is setting the amplifier's −6dB frequency bandwidth. To achieve the desired
±0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the
lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth
limit. The gain variation for both response limits is 0.17dB, well within the ±0.25dB desired limit. The results are
an
fL = 100Hz/5 = 20Hz
(11)
and an
fH = 20kHz x 5 = 100kHz
(12)
As mentioned in the SELECTING PROPER EXTERNAL COMPONENTS section, Ri (Right & Left) and Ci (Right
& Left) create a highpass filter that sets the amplifier's lower bandpass frequency limit. Find the input coupling
capacitor's value using Equation 14.
Ci≥ 1/(2πR ifL)
(13)
The result is
1/(2π*20kΩ*20Hz) = 0.397μF
(14)
Use a 0.39μF capacitor, the closest standard value.
The product of the desired high frequency cutoff (100kHz in this example) and the differential gain AVD,
determines the upper passband response limit. With AVD = 3 and fH = 100kHz, the closed-loop gain bandwidth
product (GBWP) is 300kHz. This is less than the LM4843's 3.5MHz GBWP. With this margin, the amplifier can
be used in designs that require more differential gain while avoiding performance, restricting bandwidth
limitations.
Recommended Printed Circuit Board Layout
Figure 29 through Figure 31show the recommended four-layer PC board layout that is optimized for the 24-pin
LQ-packaged LM4843 and associated external components. This circuit is designed for use with an external 5V
supply and 4Ω speakers.
This circuit board is easy to use. Apply 5V and ground to the board's VDD and GND pads, respectively. Connect
4Ω speakers between the board's −OUTA and +OUTA and OUTB and +OUTB pads.
16
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Table 2. Analog Audio LM4843 MSOP Eval Board
Assembly Part Number: 980011373-100
Revision: A
Bill of Material
Item
Part Number
Part Description
Qty
Ref Designator
Remark
1
551011373-001
LM4843 Eval Board
PCB etch 001
1
10
482911373-001
LM4843 MSOP
1
25
152911368-001
Tant Cap 0.1µF 10V
10% Size = A 3216
2
26
152911368-002
Tant Cap 0.33µF 10V 3
10% Size = A 3216
CinA, CinB
27
152911368-003
Tant Cap 1µF 16V
10% Size = A 3216
1
CBYP
28
152911368-004
Tant Cap 10µF 10V
10% Size = C 6032
1
C1
31
472911368-002
Res 20K Ohm 1/8W
1% 1206
4
RinA, RinB, RFA, RFB
40
131911368-001
Stereo Headphone
Jack W/ Switch
1
Mouser #
41
131911368-002
Slide Switch
2
SD, Mute
Mouser # 10SP003
42
131911368-003
Potentiometer
1
Volume Control
Mouser # 317-2090100K
43
131911368-004
RCA Jack
2
In A, In B
Mouser # 16PJ097
44
131911368-005
Banana Jack, Black
3
Aout-, Bout-, GND
Mouser # ME1646219
45
131911368-006
Banana Jack, Red
3
Aout+, Bou+, VDD
Mouser # ME1646218
C2, C3
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LM4843MH Demo Boards
Figure 29. Top Layer SilkScreen
Figure 30. Top Layer HTSSOP
18
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Figure 31. Bottom Layer (2) LM4843MH
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