LM48512
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SNAS497A – OCTOBER 2010 – REVISED APRIL 2012
LM48512 Boomer® Audio Power Amplifier Series PowerWise® Boosted, Ultra Low-EMI,
Mono, E2S Class D Audio Power Amplifier
Check for Samples: LM48512
FEATURES
•
1
•
2
•
•
•
"Click and Pop" suppression
2
E S System Reduces EMI while Preserving
Audio Quality and Efficiency
Integrated Boost Converter
Supply Voltage Level Detection on Boost
Converter
Low Power Shutdown Mode
APPLICATIONS
•
•
•
Mobile phones
Smart phones
PDAs
DESCRIPTION
Part of National’s PowerWise family or products, the LM48512 delivers 1.8W into 8Ω, while consuming 14.5mA
of quiescent current. The LM48512 also features National’s Enhanced Emissions Suppression (E2S) system, a
patented, ultra low EMI PWM architecture that significantly reduces RF emissions while preserving audio quality
and efficiency. LM48512 improves battery life, reduces external component count, board area consumption,
system cost, and simplifies design.
The LM48512 is designed to meet the demands of portable multimedia devices. The LM48512 features high
efficiency compared to other boosted amplifiers and low EMI Class D amplifiers. The LM48512 is capable of
driving an 8Ω speaker to 5.5V levels (1.8W) from a 3.6V supply while operating at 82% efficiency. Flexible power
supply requirements allow operation from 2.3V to 5.5V. The E2S system features a patented edge rate control
(ERC) architecture that further reduces emissions by minimizing the high frequency component of the device
output, while maintaining high quality audio reproduction (THD+N = 0.03%) and high efficiency. A low power
shutdown mode reduces supply current consumption to 0.04μA.
The LM48512 features a battery-saving automatic gain control (AGC). The AGC detects the battery voltage and
reduces the gain of the amplifier to limit the output as the battery voltage decreases.
Superior click and pop suppression eliminates audible transients on power-up/down and during shutdown.
Table 1. Key Specifications
VALUE
UNIT
■ Power Output at VDD = 3.6V
RL = 8Ω, THD+N ≤ 1%
1.8
W (typ)
■ Efficiency at 3.6V, 800mW into 8Ω
82% (typ)
■ Quiescent Power Supply Current
at 3.6V
14.5mA
■ Shutdown current
0.04μA (typ)
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2012, Texas Instruments Incorporated
LM48512
SNAS497A – OCTOBER 2010 – REVISED APRIL 2012
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Typical Application
+2.3V to +5.5V
L1
CS
10 PF
VDD
SW
PVOUT
SDREG
CS
BOOST
CONVERTER
22 PF
RTRIP
RTRIP
SDAMP
PVDD
OSCILLATOR
CIN = 0.1 PF
IN+
CS = 0.1 PF
OUTA
GAIN
STAGE
CIN = 0.1 PF
IN-
MODULATOR
H-BRIDGE
OUTB
GAIN
PGND
GND
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
TL Package
2.098mm x 2.098mm x 0.6mm
1
2
3
4
A
PVDD
PVOUT
SW
PGND
B
OUTA
GAIN
RTRIP
VDD
C
OUTB
PGND
SDAMP
GND
D
PGND
IN+
IN-
SDREG
Figure 2. Top View
Order Number LM48512TL
See NS Package Number TLA16QSA
2
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16 – Bump micro SMD Markings
XYTT
GN3
Figure 3. Top View
XY = Date Code
TT = Die Traceability
G = Boomer Family
N3 = LM48512TL
Pin Functions
Pin Descriptions
PIN
NAME
DESCRIPTION
A1
PVDD
A2
PVOUT
Amplifier Power Supply Input. Connect to PVOUT.
A3
SW
Boost Converter Switching Node
A4
PGND
Boost Converter Power Ground
B1
OUTA
Non-Inverting Amplifier Output
B2
GAIN
Gain Select Input
B3
RTRIP
Boost Supply Threshold Voltage Set Pin
Boost Converter Output
B4
VDD
C1
OUTB
Power Supply
Inverting Amplifier Output
C2, D1
PGND
Class D Power Ground
C3
SDAMP
C4
GND
D2
IN+
Non-Inverting Amplifier Input
D3
IN-
Inverting Amplifier Input
D4
SDREG
Active Low Amplifier Shutdown Input. Connect to VDD for normal operation.
Ground
Active Low Boost Converter Shutdown Input. Connect to VDD for normal operation.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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LM48512
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Absolute Maximum Ratings
Supply Voltage (VDD)
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(1) (2)
(1)
6.0V
Storage Temperature
−65°C to +150°C
(3)
Internally Limited
Power Dissipation
ESD Rating
(4)
ESD Rating
(5)
2000V
200V
Junction Temperature
150°C
Thermal Resistance
θJA (TLA16QSA)
50°C/W
Soldering Information
See AN-1112 “Micro SMD Wafer Level Chip
Scale Package”
(1)
(2)
(3)
(4)
(5)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not guaranteed.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX − TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower.
Human body model, applicable std. JESD22-A114C.
Machine model, applicable std. JESD22-A115-A.
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ +85°C
2.3V ≤ VDD ≤ 5.5V
Supply Voltage
4
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Electrical Characteristics VDD = 3.6V, PVDD = 5.75V
(1) (2)
The following specifications apply for AV = 2V/V, L = 2.2μH, RL = 15μH + 8Ω + 15μH
Limits apply for TA = 25°C.
(3)
, f = 1kHz, unless otherwise specified.
LM48512
Symbol
Parameter
Conditions
Typical
(4)
VOS
Limit
(5)
Units
(Limits)
Differential Output Offset Voltage
VIN = 0, VDD = 2.3V to 5.5V
IDD
Quiescent Power Supply Current
VIN = 0, RL = ∞
VDD = 3.6V
Boost Converter Only
PVOUT
Boost Converter Output Voltage
SDREG = VDD
SDAMP = GND
5.75
ISD
Shutdown Current
SDAMP = SDREG = GND
0.04
VIH
Logic Input High Voltage
1.35
V (min)
VIL
Logic Input Low Voltage
0.35
V (max)
TWU
Wake Up Time
fSW(AMP)
Class D Switching Frequency
AV
Gain
RIN
Input Resistance
VCM
Input Common Mode
VIN
Differential AC Input
PO
Output Power
THD+N
PSRR
(1)
(2)
(3)
(4)
(5)
Total Harmonic Distortion + Noise
Power Supply Rejection Ratio
3
10
mV
14.5
8.5
19
mA (max)
mA
V
1
μA (max)
9
ms
320
kHz
GAIN = GND (1.0V)
10
±5%
V/V (max)
AV = 2V/V (6dB)
AV = 6V/V (15.5dB)
AV = 10V/V (20dB)
30
15
10
8
kΩ
kΩ
kΩ (min)
SDAMP = SDREG = GND
70
kΩ
1.4
Device Enabled or Disabled
V
5.6
VP-P (max)
RL = 15μH+8Ω+15μH, THD+N =
10%
f = 1kHz, 22kHz BW
2.2
RL = 15μH+8Ω+15μH, THD+N = 1%
f = 1kHz, 22kHz BW
1.8
RL = 15μH+4Ω+15μH, THD+N = 1%
f = 1kHz, 22kHz BW
2.7
W
RL = 15μH+8Ω+15μH, f = 1kHz
PO = 100mW
PO = 1W
0.03
0.03
%
%
RL = 15μH+4Ω+15μH, f = 1kHz
PO = 1W
0.03
%
VRIPPLE = 200mVP-P Sine
Inputs AC GND, Input referred
CIN = 100nF, fRIPPLE = 217Hz
90
dB
VRIPPLE = 200mVP-P Sine
Inputs AC GND, Input referred
CIN = 100nF, fRIPPLE = 1kHz
85
dB
W
1.7
W (min)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not guaranteed.
RL is a resistive load in series with two inductors to simulate an actual speaker load. For RL = 8Ω, the load is 15µH+8Ω+15µH. For RL =
4Ω, the load is 15µH+4Ω+15µH.
Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Datasheet min/max specification limits are guaranteed by test or statistical analysis.
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Electrical Characteristics VDD = 3.6V, PVDD = 5.75V (continued)
(1) (2)
The following specifications apply for AV = 2V/V, L = 2.2μH, RL = 15μH + 8Ω + 15μH (3), f = 1kHz, unless otherwise specified.
Limits apply for TA = 25°C.
LM48512
Symbol
Parameter
Conditions
Typical
(4)
Limit
(5)
Units
(Limits)
Common Mode Rejection Ratio
VRIPPLE = 1VP-P
fRIPPLE = 217Hz
65
dB
η
Efficiency
RL = 15μH+8Ω+15μH, f = 1kHz
PO = 400mW
PO = 800mW
PO = 1.8W
78
82
81
%
%
%
SNR
Signal-To-Noise-Ratio
PO = 1.8W, A-weighted Filter
97
dB
εOS
Output Noise
Input referred, A-weighted Filter
25
μV
Input referred, Un-weighted
50
CMRR
RTRIP = 64.9kΩ
RTRIP = 27.5kΩ
RTRIP = 20kΩ
3.00
3.55
3.70
μV
±5%
±5%
±5%
V (max)
V (max)
V (max)
VDD(TRIP)
Supply Voltage AGC Trip Point
ILIMIT(SU)
Boost Converter Start-up Current
Limit
600
mA
IIND
Boost Converter Maximum Inductor
Current
2.25
A
Gain Compression Range
6
dB
tA
Attack Time
20
μs/dB
tR
Release Time
1600
ms/dB
fSW(REG)
Boost Converter Switching
Frequency
2
MHz
6
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Typical Performance Characteristics
THD+N
vs
Frequency
VDD = 3.6V, PO = 1W, RL = 8Ω
THD+N
vs
Output Power
VDD = 2.7V, RL = 8Ω, f = 1kHz
100
100
10
THD+N (%)
10
THD+N (%)
1
0.1
1
0.1
0.01
0.001
10
100
1000
10000
0.01
0.001
100000
0.01
0.1
1
10
FREQUENCY (Hz)
OUTPUT POWER (W)
THD+N
vs
Output Power
VDD = 3.6V, RL = 8Ω, f = 1kHz
100
100
10
10
THD+N (%)
THD+N (%)
THD+N
vs
Output Power
VDD = 3.6V, RL = 4Ω, f = 1kHz
1
0.1
0.1
0.01
0.001
1
0.01
0.1
1
0.01
0.001
10
OUTPUT POWER (W)
0.01
0.1
1
10
OUTPUT POWER (W)
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THD+N
vs
Output Power
VDD = 5.0V, RL = 8Ω, f = 1kHz
Efficiency
vs
Output Power
RL = 8Ω, f = 1kHz
100
100
80
VDD = 5V
Efficiency (%)
THD+N (%)
10
1
VDD = 3.6V
60
VDD = 2.7V
40
0.1
20
0.01
0.001
0.01
0.1
1
0
10
0
OUTPUT POWER (W)
400
800 1200 1600 2000 2400 2800
OUTPUT POWER (mW)
CMRR
vs
Frequency
VDD = 3.6V, f = 217Hz
VRIPPLE = 1VP-P, RL = 8Ω
PSRR
vs
Frequency
VDD = 3.6V, f = 1kHz
VRIPPLE = 200mVp-p, RL = 8Ω
0
0
-10
-20
-20
-40
PSRR (dB)
CMRR (dB)
-30
-40
-50
-60
-60
-80
-70
-100
-80
-90
10
100
1000
10000
100000
FREQUENCY (Hz)
8
-120
10
100
1000
10000
100000
FREQUENCY (Hz)
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Power Dissipation
vs
Output Power
RL = 8Ω, f = 1kHz
Output Power
vs
Supply Voltage
RL = 8Ω, f = 1kHz
1800
3
VDD = 2.7V
2.75
OUTPUT POWER (W)
POWER DISSIPATION (mW)
1600
1400
1200
1000
VDD = 3.6V
800
600
2.25
2
1.75
THD+N = 1%
1.5
400
1.25
200
VDD = 5V
0
0
400
800
1200 1600
2000
1
2.3
2400
2.8
3.3
3.8
4.3
OUTPUT POWER (mW)
SUPPLY VOLTAGE (V)
Supply Current
vs
Supply Voltage
No Load
Boost Output Voltage
vs
Load Current
VDD = 2.7V
25
4.8
6
BOOST OUTPUT VOLTAGE (V)
SUPPLY CURRENT (mA)
THD+N = 10%
2.5
20
VDD = 2.7V
Boost Converter
+ Amplifier
15
10
5
5.8
5.6
5.4
5.2
Boost Converter Only
5
0
2
3
4
5
0
6
100
200
300
400
500
600
LOAD CURRENT (mA)
SUPPLY VOLTAGE (V)
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Boost Output Voltage
vs
Load Current
VDD = 3.6V
Boost Output Voltage
vs
Load Current
VDD = 5.0V
6
BOOST OUTPUT VOLTAGE (V)
BOOST OUTPUT VOLTAGE (V)
6
5.8
5.6
5.4
5.2
5
0
200
400
600
800
1000
LOAD CURRENT (mA)
5.8
5.6
5.4
5.2
5
0
200
400
600
800
1000
LOAD CURRENT (mA)
Application Information
GENERAL AMPLIFIER FUNCTION
The LM48512 mono Class D audio power amplifier features a filterless modulation scheme that reduces external
component count, conserving board space and reducing system cost. The outputs of the device transition from
VDD to GND with a 300kHz switching frequency. With no signal applied, the outputs (VOUTA and VOUTB) switch
with a 50% duty cycle, in phase, causing the two outputs to cancel. This cancellation results in no net voltage
across the speaker, thus there is no current to the load in the idle state.
With the input signal applied, the duty cycle (pulse width) of the LM48512 outputs changes. For increasing output
voltage, the duty cycle of VOUTA increases, while the duty cycle of VOUTB decreases. For decreasing output
voltages, the converse occurs. The difference between the two pulse widths yields the differential output voltage.
ENHANCED EMISSIONS SUPPRESSION SYSTEM (E2S)
The LM48512 features National’s patent-pending E2S system that reduces EMI, while maintaining high quality
audio reproduction and efficiency. The E2S system features advanced edge rate control (ERC), greatly reducing
the high frequency components of the output square waves by controlling the output rise and fall times, slowing
the transitions to reduce RF emissions, while maximizing THD+N and efficiency performance. The overall result
of the E2S system is a filterless Class D amplifier that passes FCC Class B radiated emissions standards with
20in of twisted pair cable, with excellent 0.03% THD+N and high 82% efficiency.
DIFFERENTIAL AMPLIFIER EXPLANATION
As logic supplies continue to shrink, system designers are increasingly turning to differential analog signal
handling to preserve signal to noise ratios with restricted supply level. The LM48512 features a fully differential
speaker amplifier. A differential amplifier amplifies the difference between the two input signals. Traditional audio
power amplifiers have typically offered only single-ended inputs resulting in a 6dB reduction of SNR relative to
differential inputs. The LM48512 also offers the possibility of DC input coupling which eliminates the input
coupling capacitors. A major benefit of the fully differential amplifier is the improved common mode rejection ratio
(CMRR) over single ended input amplifiers. The increased CMRR of the differential amplifier reduces sensitivity
to ground offset related noise injection, especially important in noisy systems.
When evaluating the LM48512, use BAL-GND inputs and provide clean grounding to ensure proper operation.
SYNCHRONOUS RECTIFIER
The LM48512 uses an internal synchronous series switch in place of an external Schottcky diode, which reduces
the number of external components required for its application. Efficiency is also increased since the power
dissipation of the switch is less than the power dissipation of a diode.
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BOOST INPUT CAPACITOR SELECTION
An input capacitor is required to serve as an energy reservoir for the current which must flow into the coil each
time the switch turns ON. The input capacitor will also help keep the noise low from the power supply. This
capacitor must have extremely low ESR, so ceramic capacitors are recommended. A nominal value of 10μF is
recommended for this application.
MAXIMUM CURRENT
The boost converter of the LM48512 has two maximum current limits to prevent damage to the device and also
battery shutdown when the current gets too high. First is the control of the start-up current, where the boost
converter internally limits it to 600mA (ILIMIT(SU)). The second limit is on the inductor current, where it is typically
internally limited to 2.25A.
AUTOMATIC GAIN CONTROL AND AUTOMATIC LEVEL CONTROL
The LM48512 features either Automatic Gain Control (AGC) or Automatic Level Control (ALC) by configuring the
RTRIP pin B3. The settings are shown in Table 2.
Table 2. Automatic Gain/Level Control Table
RTRIP
Operation
VDD
Disable AGC and ALC
Resistor
AGC
GND
ALC
Automatic Gain Control Operation
The AGC circuitry is designed to limit the output swing to the load for speaker protection and to prolong battery
life. When RTRIP is connected to a resistor, AGC activates by detecting the VDD level in combination with the input
level. The user can set the VDD level (VDD(TRIP)) at which AGC trips by connecting different resistor values (RTRIP)
to ground, refer to Table 3.
Table 3. AGC Table
RTRIP (kΩ)
VDD(TRIP) (V)
20.0
3.7
24.8
3.6
27.5
3.55
30.3
3.5
36.3
3.4
42.8
3.3
49.7
3.2
57.1
3.1
64.9
3.0
73.2
2.9
82.0
2.8
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Once VDD drops below the VDD(TRIP) voltage set by RTRIP, AGC operation begins. While AGC is in operation, VDD
sets the output swing as shown in Figure 4.
6
Output Swing Limit (VP)
5
4
RTRIP = 20 k:
3
2
RTRIP = 27.5 k:
1
RTRIP = 64.9 k:
0
2.7
2.9
3.1
3.3
3.5
3.7
3.9
4.1
Supply Voltage (V)
Figure 4. AGC Output Swing vs Supply Voltage Graph
If output swing of the amplifier exceeds the limit determined by VDD, gain of the amplifier will be adjusted
accordingly.
See Figure 5 for the following:
Attack: AGC attack occurs at increments of -1dB steps every 20μs until the output is below the output swing
limit or when it reaches the maximum gain compression of -6dB.
Release: AGC releases at increments of 0.5dB steps per every 800ms if the output does not reach the output
swing limit.
Adjusting: While the part is in compression mode, the first attack following a release is at increments of 0.5dB
steps, this is also referred to as Adjusting.
Release
Vin decreases
Attack
VDD decreases
Vin increases
Adjusting
Vin increases
Attack
VDD decreases
20 Ps
1 dB
0.5 dB
0.5 dB
1 dB
800 ms
Figure 5. AGC Operation
Automatic Level Control
The ALC circuitry is similar to AGC in that it also limits the output swing of the amplifier, but the difference is that
ALC is always activated once the RTRIP pin is connected to GND. The output limit swing of the amplifier will be
limited to 90% of PVOUT, with the same Attack, Release, and Adjusting characteristics as the AGC.
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POWER DISSIPATION AND EFFICIENCY
The major benefit of a Class D amplifier is increased efficiency versus a Class AB. The efficiency of the
LM48512 is attributed to the region of operation of the transistors in the output stage. The Class D output stage
acts as current steering switches, consuming negligible amounts of power compared to their Class AB
counterparts. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET onresistance, along with switching losses due to gate charge.
SHUTDOWN FUNCTION
The LM48512 features a low current shutdown mode. Set SDREG = SDAMP = GND to disable the amplifier and
reduce supply current to 0.04μA.
Switch SDREG and SDAMP between GND and VDD for minimum current consumption is shutdown. The
LM48512 may be disabled with shutdown voltages in between GND and VDD, the idle current will be greater than
the typical 0.1μA value. Increased THD+N may also be observed when a voltage of less than VDD is applied to
SDREG and SDAMP.
PROPER SELECTION OF EXTERNAL COMPONENTS
Inductor Selection
The LM48512 is designed to use a 2.2μH inductor. When the boost converter is boosting, the inductor will
typically be the biggest area of efficiency loss in the boost converter circuitry, therefore, choosing an inductor with
the lowest possible series resistance is important. In addition to the series resistance, the saturation rating of the
inductor should also be greater than the maximum operating peak current.
Boost Output Capacitor Selection
The boost converter in the LM48512 is designed to operate with a 22μF ceramic output capacitor. When the
boost converter is running, the output capacitor supplies the load current during the boost converter on-time.
When the NMOS switch turns off, the inductor energy is discharged through the internal PMOS switch, supplying
power to the load and restoring charge to the output capacitor. This causes a sag in the output voltage (PVOUT)
during the on-time and a rise in the output voltage during the off-time. The output capacitor is chosen to limit this
output ripple and to ensure the converter remains stable.
AUDIO AMPLIFIER POWER SUPPLY BYPASSING/FILTERING
Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass
capacitors as close to the device as possible. A 10μF and a 1μF bypass capacitors are recommended to
increase supply stability.
AUDIO AMPLIFIER INPUT CAPACITOR SELECTION
Input capacitors may be required for some applications, or when the audio source is single-ended. Input
capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of
the audio source and the bias voltage of the LM48512. The input capacitors create a high-pass filter with the
input resistors RIN. The -3dB point of the high pass filter is found using Equation 1 below.
f = 1 / 2πRINCIN
(1)
Where RIN is the value of the input resistor given in the Electrical Characteristics table.
The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers
cannot reproduce, and may even be damaged by low frequencies. High pass filtering the audio signal helps
protect the speakers. When the LM48512 is using a single-ended source, power supply noise on the ground is
seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies (for example,
217Hz in a GSM phone), filters out the noise such that it is not amplified and heard on the output. Capacitors
with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR.
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AUDIO AMPLIFIER GAIN
The LM48512 features three logic configured gain settings. The device gain is selected through the GAIN input.
The gain settings are as shown in Table 4.
Table 4. Gain Settings
GAIN pin input
AV
GND (1.0V)
20dB
SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION
The LM48512 is compatible with single-ended sources. When configured for single-ended inputs, input
capacitors must be used to block and DC component at the input of the device. One thing to note is that the
Differential AC Input specification of 5.6VP-P (max) will be 2.8VP-P in the Single-Ended application. Figure 6 shows
the typical single-ended applications circuit.
+2.3V to +5.5V
L1
CS
VDD
SW
PVOUT
SDREG
CS
BOOST
CONVERTER
RLIMIT
RTRIP
SDAMP
PVDD
OSCILLATOR
CS
CIN
IN+
OUTA
GAIN
STAGE
CIN
IN-
MODULATOR
H-BRIDGE
OUTB
GAIN
GND
PGND
Figure 6. Single-Ended Input Configuration
PCB LAYOUT GUIDELINES
As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and
power supply create a voltage drop. The voltage loss due to the traces between the LM48512 and the load
results in lower output power and decreased efficiency. Higher trace resistance between the supply and the
LM48512 has the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing
peak output power. The effects of residual trace resistance increases as output current increases due to higher
output power, decreased load impedance or both. To maintain the highest output voltage swing and
corresponding peak output power, the PCB traces that connect the output pins to the load and the supply pins to
the power supply should be as wide as possible to minimize trace resistance.
The use of power and ground planes will give the best THD+N performance. In addition to reducing trace
resistance, the use of power planes creates parasitic capacitors that help to filter the power supply line.
14
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The inductive nature of the transducer load can also result in overshoot on one of both edges, clamped by the
parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that can
radiate or conduct to other components in the system and cause interference. In is essential to keep the power
and output traces short and well shielded if possible. Use of ground planes beads and micros-strip layout
techniques are all useful in preventing unwanted interference.
As the distance from the LM48512 and the speaker increases, the amount of EMI radiation increases due to the
output wires or traces acting as antennas become more efficient with length. Ferrite chip inductors places close
to the LM48512 outputs may be needed to reduce EMI radiation.
LM48512 Demo Board Schematic
*RLIMIT on demoboard is equilvalent to RTRIP resistor in datasheet.
Figure 7. FIGURE 8. LM48512 Demo Board Schematic
Demo Boards
Figure 8. FIGURE 9. Top Silkscreen
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Figure 9. FIGURE 10. Top Layer
Figure 10. FIGURE 11. Layer 2 (GND)
Figure 11. FIGURE 12. Layer 3 (VDD )
16
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Figure 12. FIGURE 13. Bottom Layer
Figure 13. FIGURE 14. Bottom Silkscreen
Revision History
Rev
Date
1.0
04/09/12
Description
Initial WEB released.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM48512TL/NOPB
ACTIVE
DSBGA
YZR
16
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
GN3
LM48512TLX/NOPB
ACTIVE
DSBGA
YZR
16
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
GN3
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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