LM48555TLBD

User's Guide SNAA041A – April 2007 – Revised May 2013 AN-1611 LM48555 Evaluation Board 1 Quick Start Guide 1. 2. 3. 4. 2 Apply power supply voltage to positive terminal of JU4, and source ground to the negative terminal. Short the terminals of JU1 to release the device from shutdown mode. Connect a ceramic speaker, and series resistance load across the output terminals of JU3. Apply a differential audio signal to the positive and negative terminals of JU2. Introduction The LM48555 is an audio power amplifier designed to drive ceramic speakers in portable applications. The LM48555 outputs15.5VP-P with less than 1% THD + N while operating from a 3.2V power supply. The LM48555 features differential inputs for improved noise rejection and a low power shutdown mode. The LM48555 includes advanced click and pop suppression that eliminates audible turn-on and turn-off transients. Additionally, the integrated boost regulator features a soft start function that minimizes transient current during power-up. The LM48555 is unity-gain stable and uses external gain-setting resistors. The LM48555 Evaluation board (Figure 1) allows you to easily evaluate the performance and characteristics of the LM48555 device. It provides connectors for audio inputs, audio outputs, power supply, and shutdown control. The ceramic speaker load is not included on the demo board, an external ceramic speaker plus series resistor is needed for evaluation. 3 Operating Conditions • • Temperature Range -40°C ≤ TA ≤ +85°C Supply Voltage 2.7V < VDD < 6.5V All trademarks are the property of their respective owners. SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback AN-1611 LM48555 Evaluation Board Copyright © 2007–2013, Texas Instruments Incorporated 1 LM48555 Evaluation Board 4 www.ti.com LM48555 Evaluation Board Figure 1. LM48555 Evaluation Board 2 AN-1611 LM48555 Evaluation Board SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Evaluation Board Schematic www.ti.com 5 Evaluation Board Schematic RIN20 k: Soft Start CSS 100 nF CIN470 nF INRSD SD JU1 1 k: JU4 CF82 pF RF200 k: CF+ 82 pF RF+ 200 k: VDD GND OUT+ L1 10 PH LM48555 GND INPUT JU2 CS 4.7 PF OUTPUT JU3 VDD OUT- SW D1 GND (SW) CO 10 PF IN+ RIN+ 20 k: Bootstrap VAMP CIN+ 470 nF Figure 2. Evaluation Board Schematic 6 Connectors The LM48555 evaluation boards features connectors for the audio inputs, audio outputs, power supply, and shutdown control. The functionality and designators of each connector are specified in Table 1. Table 1. Connectors 7 Designator Label JU1 Shutdown Function JU2 Audio Input JU3 Audio Output This connector provides a connection to the amplifier outputs. A ceramic speaker load, and series resistors, should be connected across these terminals. JU4 Power Supply This connector provides the power supply connection. Apply an external power supply’s positive voltage to the pin labeled VDD and the ground source to the pin labeled GND. This connector is used to control the Shutdown function: If JU1 is open, then the LM48555 is in Shutdown. If JU1 is shorted, then the LM48555 is active. This connector connects the audio input signal to the device inputs. Apply the positive signal source to the pin labeled “+” and the negative signal source to the pin labeled “-”. Bill of Materials Table 2. Bill of Materials Designator Part Description D2 Diode Schottky 20V 0.5A SOD123 L1 INDUCTOR 10μH 20% SMD CIN+, CIN- Capacitor Ceramic 0.47μF 10V X5R 0402 Manufacturer Part Number ON Semi MBR0520LT1G Taiyo Yuden NR3010T100M Murata GRM155R61A474KE15D CO Capacitor Ceramic 10μF 16V X5R 0805 Taiyo Yuden EMK212BJ106KG-T CSS Capacitor Ceramic 0.1μF 25V X5R 0402 Murata TMK105BJ104KV-F Capacitor Ceramic 82pF 50V 5% C0G 0402 Murata GRM1555C1H820JZ01D CF+, CFCS Capacitor Ceramic 4.7μF 16V X5R 0805 Taiyo Yuden SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback EMK212BJ475KG-T AN-1611 LM48555 Evaluation Board Copyright © 2007–2013, Texas Instruments Incorporated 3 Evaluation Board Components www.ti.com Table 2. Bill of Materials (continued) Designator 8 Part Description Manufacturer Part Number RF+, RF- Resistor 200kΩ 1/16W 1% 0402 SMD Panasonic ERJ-2RKF2003X RIN+, RIN- Resistor 20kΩ 1/16W 1% 0402 SMD Panasonic ERJ-2RKF2002X RSD Resistor 1.0kΩ 1/16W 1% 0402 SMD Panasonic ERJ-2RKF1001X Evaluation Board Components Part number and manufacturer information for the components on the LM48555 evaluation board can be found in the Bill of Materials (Table 2). For more information on component selection refer to the LM48555 datasheet. 9 PCB Layout Guidelines High frequency boost converters require very careful layout of components in order to get stable operation and low noise. All components must be as close as possible to the LM4962 device. It is recommended that a four-layer PCB be used so that internal ground planes are available. See Figure 3 through Figure 8 for demo board reference schematic and layout. Some additional guidelines to be observed: • Keep the path between L1, D1, and CO extremely short. Parasitic trace inductance in series with D1 and C0 will increase noise and ringing. • If internal ground planes are available (recommended) use vias to connect directly to ground at the GND (SW) and GND pins of U1, as well as the negative sides of capacitors CS and CO. 10 General Layout Recommendations This section provides practical guidelines for PCB layouts. Designers should note that these are only ruleof-thumb recommendations and the actual results will depend heavily on the final layout. 10.1 Power and Ground Circuits For multi-layer boards, it is important to isolate the switching power and ground trace paths from the amplifier power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even device. This technique will require a greater amount of design time but will not increase the final price of the board. 10.2 Avoiding Typical Design / Layout Problems Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB layer. When traces must cross over each other, do it at 90 degrees. Running digital and analog traces at 90 degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise coupling and crosstalk. 11 Micro SMD Wafer Level Chip Scale Package: PCB, Layout, and Mounting Considerations Please refer to AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009) for possible updates to the μSMD package information. 4 AN-1611 LM48555 Evaluation Board SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated PCB Layout www.ti.com 12 PCB Layout Figure 3. Silkscreen Top Figure 4. Top Layer SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback AN-1611 LM48555 Evaluation Board Copyright © 2007–2013, Texas Instruments Incorporated 5 PCB Layout www.ti.com Figure 5. Layer 2 Figure 6. Layer 3 6 AN-1611 LM48555 Evaluation Board SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated PCB Layout www.ti.com Figure 7. Bottom Layer Figure 8. Silkscreen Bottom SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback AN-1611 LM48555 Evaluation Board Copyright © 2007–2013, Texas Instruments Incorporated 7 Revision Table 13 8 www.ti.com Revision Table Rev Date Description 1.0 04/03/07 Initial release. AN-1611 LM48555 Evaluation Board SNAA041A – April 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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