LM4917SDBD

LM4917 www.ti.com SNAS238G – AUGUST 2004 – REVISED MAY 2013 LM4917 Boomer™ Audio Power Amplifier Series Ground-Referenced, 95mW Stereo Headphone Amplifier Check for Samples: LM4917 FEATURES DESCRIPTION • • • • • The LM4917 is a stereo, output capacitor-less headphone amplifier capable of delivering 95mW of continuous average power into a 16Ω load with less than 1% THD+N from a single 3V power supply. 1 23 • • • Ground Referenced Outputs High PSRR Available in Space-Saving TSSOP Package Ultra Low Current Shutdown Mode Improved Pop and Click Circuitry eliminates Noises During Turn-On and Turn-Off Transitions 1.4 – 3.6V Operation No Output Coupling Capacitors, Snubber Networks, Bootstrap Capacitors Shutdown Either Channel Independently APPLICATIONS • • • • • Notebook PCs Desktop PCs Mobile Phone PDAs Portable Electronic Devices The LM4917 provides high quality audio reproduction with minimal external components. A ground referenced output eliminates the output coupling capacitors typically required by single-ended loads, reducing component count, cost and board space consumption. This makes the LM4917 ideal for mobile phones and other portable equipment where board space is at a premium. Eliminating the output coupling capacitors also improves low frequency response. The LM4917 operates from a single 1.4V to 3.6V power supply, features low 0.02% THD+N and 70dB PSRR. Independent right/left channel low-power shutdown controls provide power saving flexibility for mono/stereo applications. Superior click and pop suppression eliminates audible transients during start up and shutdown. Short circuit and thermal overload protection protects the device during fault conditions. KEY SPECIFICATIONS • • • Improved PSRR at 1kHz: 70dB (Typ) Power Output at VDD = 3V, RL = 16Ω, THD ≦ 1%: 95mW (Typ) Shutdown Current: 0.01µA (Typ) 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Boomer is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2013, Texas Instruments Incorporated LM4917 SNAS238G – AUGUST 2004 – REVISED MAY 2013 www.ti.com Block Diagram 2 9 10 - 8 + 1 Shutdown Control 12 Click/Pop Suppression 3 Charge Pump + 5 11 13 6 7 4 14 Figure 1. Circuit Block Diagram Typical Application 20 k: CPVDD Rf + C3 Ci 20 k: C4 0.1 PF 2 9 0.39 PF + 4.7 PF 10 - 8 Ri + SD_LC 1 VIN1 Shutdown Control Headphone Jack SD_RC 12 Click/Pop Suppression C1 2.2 PF 0.39 PF + Ci 20 k: 3 Charge Pump + 5 11 Ri 13 6 VIN2 2.2 PF 7 4 14 C2 20 k: Rf Figure 2. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 LM4917 www.ti.com SNAS238G – AUGUST 2004 – REVISED MAY 2013 SD_LC CPVDD CCP+ PGND CCPVCP_OUT -AVDD 1 14 2 13 3 12 4 11 5 10 6 9 7 8 SGND R_IN SD_RC R_OUT L_IN AVDD L_OUT TSSOP Package Top View See Package Number PW SD_LC SGND CPVDD R_IN CCP+ PGND SD_RC R_OUT CCP- L_IN VCP_OUT AVDD -AVDD L_OUT WSON Package Top View See Package Number NHK0014A PIN DESCRIPTIONS Pin Name Function 1 SD_LC Active_Low Shutdown, Left Channel 2 CPVDD Charge Pump Power Supply 3 CCP+ Positive Terminal-Charge Pump Flying Capacitor 4 PGND Power Ground 5 CCP- Negative Terminal- Charge Pump Flying Capacitor 6 VCP_OUT Charge Pump Output 7 -AVDD Negative Power Supply-Amplifier 8 L_OUT Left Channel Output 9 AVDD Positive Power Supply-Amplifier 10 L_IN Left Channel Input 11 R_OUT Right Channel Output 12 SD_RC Active_Low Shutdown, Right Channel 13 R_IN Right Channel Input 14 SGND Signal Ground Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 3 LM4917 SNAS238G – AUGUST 2004 – REVISED MAY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Absolute Maximum Ratings (1) Supply Voltage 4.0V −65°C to +150°C Storage Temperature Input Voltage -0.3V to VDD + 0.3V Power Dissipation (2) Internally Limited ESD Susceptibility (3) 2000V ESD Susceptibility (4) 200V Junction Temperature Thermal Resistance (1) (2) (3) (4) 150°C θJC (TSSOP) 40°C/W θJA (TSSOP) 109°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not specify performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions that ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication of device performance. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4917, see power de-rating currents for more information. Human body model, 100pF discharged through a 1.5kΩ resistor. Machine Model, 220pF-240pF discharged through all pins. Operating Ratings Temperature Range (1) 4 TMIN ≤ TA ≤ TMAX Supply Voltage (VDD) (1) −40°C ≤ TA ≤ 85°C 1.4V ≤ VCC ≤ 3.6V If the product is in shutdown mode and VDD exceeds 3.6V (to a max of 4V VDD) then most of the excess current will flow through the ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the part will be protected. If the part is enabled when VDD is above 4V circuit performance will be curtailed or the part may be permanently damaged. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 LM4917 www.ti.com SNAS238G – AUGUST 2004 – REVISED MAY 2013 Electrical Characteristics VDD = 3V (1) The following specifications apply for VDD = 3V, AV = 1, and 16Ω load unless otherwise specified. Limits apply to TA = 25°C. Symbol Parameter IDD LM4917 Conditions Quiescent Power Supply Current Limit (3) (4) Units (Limits) 20 mA (max) 0.01 1 µA (max) Typ (2) VIN = 0V, IO = 0A, both channels enabled 11 VIN = 0V, IO = 0A, one channel enabled 9 mA ISD Shutdown Current VSD_LC = VSD_RC = GND VOS Output Offset Voltage RL = 32Ω 1 10 mV (max) PO Output Power THD+N = 1% (max); f = 1kHz, RL = 16Ω 95 50 mW (min) THD+N = 1% (max); f = 1kHz, RL = 32Ω 82 mW 0.02 % 70 55 dB THD+N Total Harmonic Distortion + Noise PO = 50mW, f = 1kHz, RL = 32Ω (A-weighted) single channel PSRR Power Supply Rejection Ratio VRIPPLE = 200mV sine p-p, f = 1kHz f = 20kHz SNR Signal-to-Noise Ratio RL = 32Ω, POUT = 20mW, f = 1kHz 100 dB V (min) VIH Shutdown Input Voltage High VIH = 0.7*CPVDD VIL Shutdown Input Voltage Low VIL = 0.3*CPVDD V (max) TWU Wake Up Time From Shutdown 339 µs (max) XTALK Crosstalk 70 dB IL Input Leakage Current ±0.1 nA (1) (2) (3) (4) RL = 16Ω, PO = 1.6mW, f = 1kHz All voltages are measured with respect to the GND pin unless otherwise specified. Typicals are measured at 25°C and represent the parametric norm. Limits are specifed to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. External Components Description (See Figure 1) Components Functional Description 1. Ri Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high-pass filter with Ci at fc = 1 / (2πRiCi). 2. Ci Input coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a high-pass filter with Ri at fc = 1 / (2πRiCi). Refer to the section Proper Selection of External Components, for an explanation of how to determine the value of Ci. 3. Rf Feedback resistance which sets the closed-loop gain in conjunction with Ri. 4. C1 Flying capacitor. Low ESR ceramic capacitor (≤100mΩ) 5. C2 Output capacitor. Low ESR ceramic capacitor (≤100mΩ) 6. C3 Tantalum capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for information concerning proper placement and selection of the supply bypass capacitor. 7. C4 Ceramic capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for information concerning proper placement and selection of the supply bypass capacitor. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 5 LM4917 SNAS238G – AUGUST 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics 6 THD+N vs Frequency VDD = 1.4V, RL = 32Ω, PO = 1mW THD+N vs Frequency VDD = 1.8V, RL = 16Ω, PO = 5mW Figure 3. Figure 4. THD+N vs Frequency VDD = 1.8V, RL = 32Ω, PO = 5mW THD+N vs Frequency VDD = 1.8V, RL = 32Ω, PO = 10mW Figure 5. Figure 6. THD+N vs Frequency VDD = 3.0V, RL = 16Ω, PO = 10mW THD+N vs Frequency VDD = 3.0V, RL = 16Ω, PO = 25mW Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 LM4917 www.ti.com SNAS238G – AUGUST 2004 – REVISED MAY 2013 Typical Performance Characteristics (continued) THD+N vs Frequency VDD = 3.0V, RL = 16Ω, PO = 50mW THD+N vs Frequency VDD = 3.0V, RL = 32Ω, PO = 5mW Figure 9. Figure 10. THD+N vs Frequency VDD = 3.0V, RL = 32Ω, PO = 10mW THD+N vs Frequency VDD = 3.0V, RL = 32Ω, PO = 25mW Figure 11. Figure 12. Gain Flatness vs Frequency RIN = 20kΩ, CIN = 0.39µF Output Power vs Supply Voltage RL = 16Ω Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 7 LM4917 SNAS238G – AUGUST 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Output Power vs Supply Voltage RL = 32Ω PSRR vs Frequency VDD = 1.8V, RL = 16Ω 180 OUTPUT POWER (mW) 160 140 10% THD+N 120 1% THD+N 100 80 60 40 20 0 1.5 2.0 2.5 3.0 3.5 4.0 SUPPLY VOLTAGE (V) 8 Figure 15. Figure 16. PSRR vs Frequency VDD = 1.8V, RL = 32Ω PSRR vs Frequency VDD = 3.0V, RL = 16Ω Figure 17. Figure 18. PSRR vs Frequency VDD = 3.0V, RL = 32Ω THD+N vs Output Power VDD = 1.4V, RL = 32Ω, f = 1kHz Figure 19. Figure 20. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 LM4917 www.ti.com SNAS238G – AUGUST 2004 – REVISED MAY 2013 Typical Performance Characteristics (continued) THD+N vs Output Power VDD = 1.8V, RL = 16Ω, f = 1kHz THD+N vs Output Power VDD = 1.8V, RL = 32Ω, f = 1kHz Figure 21. Figure 22. THD+N vs Output Power VDD = 3.0V, RL = 16Ω, f = 1kHz THD+N vs Output Power VDD = 3.0V, RL = 32Ω, f = 1kHz Figure 23. Figure 24. Power Dissipation vs Output Power VDD = 1.8V, RL = 16Ω Power Dissipation vs Output Power VDD = 1.8V, RL = 32Ω Figure 25. Figure 26. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 9 LM4917 SNAS238G – AUGUST 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Power Dissipation vs Output Power VDD = 3V, RL = 16Ω Power Dissipation vs Output Power VDD = 3V, RL = 32Ω Figure 27. Figure 28. Supply Current vs Supply Voltage Figure 29. 10 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 LM4917 www.ti.com SNAS238G – AUGUST 2004 – REVISED MAY 2013 APPLICATION INFORMATION ELIMINATING THE OUTPUT COUPLING CAPACITOR The LM4917 features a low noise inverting charge pump that generates an internal negative supply voltage. This allows the outputs of the LM4917 to be biased about GND instead of a nominal DC voltage, like traditional headphone amplifiers. Because there is no DC component, the large DC blocking capacitors (typically 220µF) are not necessary. The coupling capacitors are replaced by two, small ceramic charge pump capacitors, saving board space and cost. Eliminating the output coupling capacitors also improves low frequency response. The headphone impedance and the output capacitor form a high pass filter that not only blocks the DC component of the output, but also attenuates low frequencies, impacting the bass response. Because the LM4917 does not require the output coupling capacitors, the low frequency response of the device is not degraded by external components. In addition to eliminating the output coupling capacitors, the ground referenced output nearly doubles the available dynamic range of the LM4917 when compared to a traditional headphone amplifier operating from the same supply voltage. OUTPUT TRANSIENT ('CLICK AND POPS') ELIMINATED The LM4917 contains advanced circuitry that virtually eliminates output transients ('clicks and pops'). This circuitry prevents all traces of transients when the supply voltage is first applied or when the part resumes operation after coming out of shutdown mode. To ensure optimal click and pop performance under low gain configurations (less than 0dB), it is critical to minimize the RC combination of the feedback resistor RF and stray input capacitance at the amplifier inputs. A more reliable way to lower gain or reduce power delivered to the load is to place a current limiting resistor in series with the load as explained in the Minimizing Output Noise / Reducing Output Power section. AMPLIFIER CONFIGURATION EXPLANATION As shown in Figure 2, the LM4917 has two operational amplifiers internally. The two amplifiers have externally configurable gain, and the closed loop gain is set by selecting the ratio of Rf to Ri. Consequently, the gain for each channel of the IC is AV = -(Rf / Ri) (1) Since this an output ground-referenced amplifier, by driving the headphone through ROUT (Pin 11) and LOUT (Pin 8), the LM4917 does not require output coupling capacitors. The typical single-ended amplifier configuration where one side of the load is connected to ground requires large, expensive output capacitors. POWER DISSIPATION Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to ensure a successful design. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (VDD) 2 / (2π2RL) (2) Since the LM4917 has two operational amplifiers in one package, the maximum internal power dissipation point is twice that of the number which results from Equation 2. Even with the large internal power dissipation, the LM4917 does not require heat sinking over a large range of ambient temperature. From Equation 2, assuming a 3V power supply and a 16Ω load, the maximum power dissipation point is 28mW per amplifier. Thus the maximum package dissipation point is 56mW. The maximum power dissipation point obtained must not be greater than the power dissipation that results from Equation 3: PDMAX = (TJMAX - TA) / (θJA) (3) Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4917 11 LM4917 SNAS238G – AUGUST 2004 – REVISED MAY 2013 www.ti.com For package TSSOP, θJA = 109°C/W. TJMAX = 150°C for the LM4917. Depending on the ambient temperature, TA, of the system surroundings, Equation 3 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 2 is greater than that of Equation 3, then either the supply voltage must be decreased, the load impedance increased or TA reduced. For the typical application of a 3V power supply, with a 16Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 119.9°C provided that device operation is around the maximum power dissipation point. Power dissipation is a function of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may be increased accordingly. Refer to the Typical Performance Characteristics curves for power dissipation information for lower output powers. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 3V power supply typically use a 4.7µF in parallel with a 0.1µF ceramic filter capacitors to stabilize the power supply's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for a local 0.1µF supply bypass capacitor, CS, connected between the LM4917's supply pins and ground. Keep the length of leads and traces that connect capacitors between the LM4917's power supply pin and ground as short as possible. MICRO POWER SHUTDOWN The voltage applied to the SD_LC (shutdown left channel) pin and the SD_RC (shutdown right channel) pin controls the LM4917’s shutdown function. When active, the LM4917’s micropower shutdown feature turns off the amplifiers’ bias circuitry, reducing the supply current. The trigger point is 0.3*CPVDD for a logic-low level, and 0.7 x CPVDD for logic-high level. The low 0.01µA(typ) shutdown current is achieved by appling a voltage that is as near as ground a possible to the SD_LC/SD_RC pins. A voltage that is higher than ground may increase the shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external 100kΩ pull-up resistor between the SD_LC/SD_RC pins and VDD. Connect the switch between the SD_LC/SD_RC pins and ground. Select normal amplifier operation by opening the switch. Closing the switch connects the SD_LC/SD_RC pins to ground, activating micro-power shutdown. The switch and resistor ensure that the SD_LC/SD_RC pins will not float. This prevents unwanted state changes. In a system with a microprocessor or microcontroller, use a digital output to apply the control voltage to the SD_LC/SD_RC pins. Driving the SD_LC/SD_RC pins with active circuitry eliminates the pull-up resistor. SELECTING PROPER EXTERNAL COMPONENTS Optimizing the LM4917's performance requires properly selecting external components. Though the LM4917 operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. The LM4917 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-tonoise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain demands input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal sources such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to the AUDIO POWER AMPLIFIER DESIGN section for more information on selecting the proper gain. Charge Pump Capacitor Selection Choose low ESR (