User's Guide
SNAA044A – May 2007 – Revised May 2013
AN-1638 LM49270 Demonstration Board
1
General Description
The LM49270SQ demoboard is a fully assembled circuit board for use of evaluating the LM49270 Stereo
Class D audio subsystem with OCL headphone amplifier, 3D enhancement, and headphone sense. The
LM49270 operates from a 2.4V to 5.5V power supply. The filterless stereo class D amplifiers delivers
2.2W/channel into a 4Ω load with less than 10% THD+N with a 5V supply. The headphone amplifiers
feature Output Capacitor-less(OCL) architecture that eliminates the output coupling capacitors required by
traditional headphone amplifiers. Additionally, the headphone amplifier can be configured as capacitively
coupled loads.
The LM49270 features a 32 step volume control for the headphone and stereo output. The device mode
select and volume are controlled through an I2C compatible interface.
2
Bill of Materials
Designator
Quantity
Description
C1–C2
2
100μF ± 10% 10V
C Case Tantalum Capacitors
AVX TPSC107K010R0075
C4
1
0.22μF ± 10% 16V X7R
0603 Ceramic Capacitor
Murata GRM188R71C223KA01D
C5
1
2.2μF ± 10% 16V X7R
0805 Ceramic Capacitor
Murata GRM21BR71A225KA01L
C6–C7
2
1μF ± 10% 16V 1206
Ceramic Capacitors
Murata GRM31MR71C105KA01L
C8
1
10μF ± 10% 16V
B Case Tantalum Capacitor
AVX TPSB106K016R0500
C9–C12
4
1μF ± 10% 16V 0805
Ceramic Capacitors
Murata GRM21BR71C105KA01L
R1
1
4.7kΩ ± 0.1%
Panasonic-ECG ERA-3AEB472V
R2
1
1kΩ ± 0.1%
Panasonic-ECG ERA-3AEB102V
R3
1
100kΩ Potentiometer
Digikey ST4B104CT
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AN-1638 LM49270 Demonstration Board
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Connectors
3
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Connectors
Connecting to the world is accomplished through the headers on the LM49270 demonstration board. The
functions of the different headers are detailed in Table 1.
Table 1. LM49270 Demonstration Board Connections
Designator
Label
These connectors are used to switch between CC or OCL mode.
If JP1 and JP3 are open, then the LM49270 is in CC mode.
If JP1 and JP3 are closed, then the LM49270 is in OCL mode.
JP1, JP2
JP3 is used to ground the VOC pin of the LM49270.
In CC mode, JP3 should be closed, and the VOC amplifier is disabled.
JP3
VOC
JP4, JP5
LIN, RIN
These connectors are used for connecting the input to the LM49270. LIN (JP4) is
for left input, and RIN (JP5) is for right input.
JP6
VDDLS
This connector is for the loudspeaker power supply connection. Apply an external
power supply’s positive voltage to the pin labeled VDDLS and the ground source to
the pin labeled GND.
JP7, JP9
RIGHT SPEAKER,
LEFT SPEAKER
These connectors are for the right speaker output (JP7) and left speaker output
(JP9).
JP8
VDDI2C/ADR/GND
There are three pins on this connector, VDDI2C, ADR, and GND. It is used to set
the LM49270 address. To set the ADR bit to 1, close VDDI2C and ADR. To set the
ADR bit to 0, close GND and ADR.
This connector should be closed when the user wants to use the VDDLS as the
VDD source for the I2CVDD.
JP10
VDDI2C
This connector can be used to connect to a VDD source if the user wants to power
the VDDI2C externally.
JP12
HPS
This connector is connected to the headphone sense pin of the part and the
headphone jack.
If JP12 is closed, then the headphone sense function works as designed with a
headphone jack.
If JP12 is open, then the user does not need a headphone jack to test the function
of the HPS. To set to HP mode, set the right pin of JP12 to low. To set to speaker
mode, set the right pin to high.
JP13, JP14
RHP, LHP
JP15
VDD
JP11
2
Function
These connectors are for the right headphone output (JP13) and the left
headphone output (JP14).
This connector provides the power supply connection. Apply an external power
supply’s positive voltage to the pin labeled VDD and the ground source to the pin
labeled GND.
JP16
This connector is used to short the LHP to a pull down resistor.
In CC mode, JP16 should be closed.
In OCL mode, JP16 should be open.
JP17
This connector is used to short VDD and VDDLS together. If the user wanted to
use only one power supply, then closing JP17 will allow the power supply to be
connected to JP15 or JP6 only.
AN-1638 LM49270 Demonstration Board
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Quick Start - in CC Mode
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4
Quick Start - in CC Mode
Connect a shunt across the ADR and GND pins of jumper JP8. (I2C address bit = 0)
Connect a shunt across jumper JP3 (VOC = GND, Capacitor Coupled (CC) headphone mode).
Connect a shunt across jumper JP16 (for Capacitor Coupled (CC) headphone mode).
Connect a shunt across jumper JP12 to use the headphone sense function.
Connect an 8Ω speaker across jumper JP7 (Right Speaker output).
Connect an 8Ω speaker across jumper JP9 (Left Speaker output).
Connect a headphone to jack J1 (headphone jack).
Connect the 3.3V power supply to the VDD pin of jumper JP15 and the VDDLS pin of jumper JP6, and
the power supply ground terminal to the GND pin of jumper JP15 and jumper JP6.
9. Connect the audio source to JP4 (left input) and JP5 (right input).
10. Connect I2C from PC to I2C Interface jumper.
11. Open LM49270 I2C control software.
12. Turn on power supply and audio source.
13. In the LM49270 I2C control panel, select “C-CUPL” in HEADPHONE OUTPUT COUPLING, and select
CHIP POWER-ON mode “ON” to enable the device.
14. Adjust the volume controls to change the speaker and headphone volumes.
15. To enable the speakers, disconnect the headphone from jack J1.
1.
2.
3.
4.
5.
6.
7.
8.
5
Board Connections
5.1
Power Connections
Power Connections The LM49270 demoboard offers separate connections for the speaker amplifier and
headphone amplifier power supplies. The separate power supplies allow the speakers to operate at a
higher voltage for maximum headroom, while the headphones operate at a lower voltage, improving power
dissipation. Connect the headphone amplifier power supply to the VDD pin and the power supply ground
to the GND pin of jumper JP15. Connect the speaker amplifier power supply to the VDDLS pin and the
power supply ground to the GND pin of JP6. As for the I2CVDD, if powered from JP11, it allows the I2C
portion of the LM49270 to interface with lower voltage digital controllers.
5.2
Audio Input Connections
The left and right channel inputs of the LM49270 demoboard is configured for single-ended sources.
Connect a left channel input source to the LIN pin and GND pin of JP4 and connect the a right channel
input source to the RIN pin and GND pin of JP5.
5.3
Audio Output Connections
Jumpers JP9 and JP7 are the connections for the left and right channel speakers output respectively. The
jack, J1 is a 3.5mm stereo headphone jack with a headphone sense pin.
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Jumper Selection
In CC mode, install a shunt across jumper JP3 and jumper JP16. In OCL mode, install a shunt across
jumper JP1 and jumper JP2.
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I2C Interface
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I2C Interface
The LM49270 is controlled through an I2C compatible serial interface. The LM49270 evaluation software
provides an easy to use graphical user interface (Figure 1). Each button corresponds to bits in an I2C
command byte. See the LM49270 data sheet for detailed I2C information.
Figure 1. LM49270 Software User's Interface
7.1
CHIP POWER-ON
The CHIP POWER-ON button enables or disables the entire device. The device will not output any audio
if the CHIP POWER-ON is set to “Off.”
7.2
I2C ADDRESS BIT
The I2C ADDRESS BIT button should correspond to the selection on jumper JP8. If the ADR pin is set to
GND, then the I2C ADDRESS BIT should be set to ‘0’; if the ADR pin is set to VDDI2C, then the I2C
ADDRESS BIT should be set to ‘1’.
7.3
LOUDSPEAKER 3D, HEADPHONE 3D
The LOUDSPEAKER 3D and HEADPHONE 3D button enables 3D sound enhancement for loudspeaker
and headphone, respectively. By setting it to “ON”, turns on 3D and allows the user to increase or
decrease the 3D effect on the demoboard by changing the value of the potentiometer in the external RC
network of the LM49270.
7.4
VOLUME CONTROL
The LM49270 headphone and speaker channels feature separate volume controls. The loudspeaker
volume has a range of -49dB to 30dB and the headphone has a range of -59dB to 18dB, each with
32 steps.
4
AN-1638 LM49270 Demonstration Board
Copyright © 2007–2013, Texas Instruments Incorporated
SNAA044A – May 2007 – Revised May 2013
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Schematic and Layout Pictures
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8
Schematic and Layout Pictures
VDDI2C
I2C
SCL VDD
2
6
SDA GND
VDDLS
JP10
I2C PIN HEADER
JP11
GNDLS
GNDLS
VDDLS
JP12
22
LLS-
VDDLS
LLS+
23
24
25
SCL
SDA
26
27
GNDLS
JP9
LEFT OUTPUT
NC
21
VDDI2C
JP8
2
+
R
VOC
100 PF
VOC
ADR
1
2
3
20
HPS
CRT
JP2
3
4
100 PF
JP14
VDD
HPVDD
19
C10
1 PF
U1
LM49270
JP15
VDDI2C
C4
5
R3DIN
A1
Header 3
VDD
C3
1 PF
JP16
R2
1k
LHP
VDD
C2
HP JACK
+
L
RHP
C1
C11
1 PF
1M
HPS
J1
1
HPGND
33
VOC
JP1
EP
JP13
28
HPS
R5
R1 0.22 PF
4.7k
R3
I2CVDD
2
GNDLS
17
18
C9
1 PF
6
L3DIN
NC
C6
1 PF
C7
1 PF
RLS-
GNDLS
VDDLS
VDD
JP17
JP7
RIGHT OUTPUT
+
JP5
NC
15
VDDLS
C12
JP4
14
13
RLS+
VDDLS
C8
10 PF
12
NC
11
10
RIN
9
8
C5
1 PF
GND
BYPASS
JP3
16
7
LIN
3
100k
VOC
1 PF
JP6
GNDLS
Figure 2. LM49270 Demoboard Schematic
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Demonstration Board PCB Layout
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Demonstration Board PCB Layout
Figure 3. Top Silkscreen Layer
Figure 4. Top Layer
6
AN-1638 LM49270 Demonstration Board
Copyright © 2007–2013, Texas Instruments Incorporated
SNAA044A – May 2007 – Revised May 2013
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Demonstration Board PCB Layout
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Figure 5. Mid Layer 1
Figure 6. Mid Layer 2
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AN-1638 LM49270 Demonstration Board
Copyright © 2007–2013, Texas Instruments Incorporated
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Demonstration Board PCB Layout
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Figure 7. Bottom Layer
Figure 8. Bottom Silkscreen
8
AN-1638 LM49270 Demonstration Board
Copyright © 2007–2013, Texas Instruments Incorporated
SNAA044A – May 2007 – Revised May 2013
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Revision History
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Revision History
Rev
Date
Description
1.0
05/24/07
Initial release.
SNAA044A – May 2007 – Revised May 2013
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AN-1638 LM49270 Demonstration Board
Copyright © 2007–2013, Texas Instruments Incorporated
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